1 /*- 2 * Copyright (c) 2004 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 34 #include <machine/bus.h> 35 #include <machine/vmparam.h> 36 37 #include <dev/uart/uart.h> 38 #include <dev/uart/uart_cpu.h> 39 40 #define UART_TAG_BR 0 41 #define UART_TAG_CH 1 42 #define UART_TAG_DB 2 43 #define UART_TAG_DT 3 44 #define UART_TAG_IO 4 45 #define UART_TAG_MM 5 46 #define UART_TAG_PA 6 47 #define UART_TAG_RS 7 48 #define UART_TAG_SB 8 49 #define UART_TAG_XO 9 50 51 static struct uart_class *uart_classes[] = { 52 &uart_ns8250_class, 53 &uart_sab82532_class, 54 &uart_z8530_class, 55 #if defined(__arm__) 56 &uart_lpc_class, 57 &uart_s3c2410_class, 58 #endif 59 }; 60 static size_t uart_nclasses = sizeof(uart_classes) / sizeof(uart_classes[0]); 61 62 static bus_addr_t 63 uart_parse_addr(const char **p) 64 { 65 return (strtoul(*p, (char**)(uintptr_t)p, 0)); 66 } 67 68 static struct uart_class * 69 uart_parse_class(struct uart_class *class, const char **p) 70 { 71 struct uart_class *uc; 72 const char *nm; 73 size_t len; 74 u_int i; 75 76 for (i = 0; i < uart_nclasses; i++) { 77 uc = uart_classes[i]; 78 nm = uart_getname(uc); 79 if (nm == NULL || *nm == '\0') 80 continue; 81 len = strlen(nm); 82 if (strncmp(nm, *p, len) == 0) { 83 *p += len; 84 return (uc); 85 } 86 } 87 return (class); 88 } 89 90 static long 91 uart_parse_long(const char **p) 92 { 93 return (strtol(*p, (char**)(uintptr_t)p, 0)); 94 } 95 96 static int 97 uart_parse_parity(const char **p) 98 { 99 if (!strncmp(*p, "even", 4)) { 100 *p += 4; 101 return UART_PARITY_EVEN; 102 } 103 if (!strncmp(*p, "mark", 4)) { 104 *p += 4; 105 return UART_PARITY_MARK; 106 } 107 if (!strncmp(*p, "none", 4)) { 108 *p += 4; 109 return UART_PARITY_NONE; 110 } 111 if (!strncmp(*p, "odd", 3)) { 112 *p += 3; 113 return UART_PARITY_ODD; 114 } 115 if (!strncmp(*p, "space", 5)) { 116 *p += 5; 117 return UART_PARITY_SPACE; 118 } 119 return (-1); 120 } 121 122 static int 123 uart_parse_tag(const char **p) 124 { 125 int tag; 126 127 if ((*p)[0] == 'b' && (*p)[1] == 'r') { 128 tag = UART_TAG_BR; 129 goto out; 130 } 131 if ((*p)[0] == 'c' && (*p)[1] == 'h') { 132 tag = UART_TAG_CH; 133 goto out; 134 } 135 if ((*p)[0] == 'd' && (*p)[1] == 'b') { 136 tag = UART_TAG_DB; 137 goto out; 138 } 139 if ((*p)[0] == 'd' && (*p)[1] == 't') { 140 tag = UART_TAG_DT; 141 goto out; 142 } 143 if ((*p)[0] == 'i' && (*p)[1] == 'o') { 144 tag = UART_TAG_IO; 145 goto out; 146 } 147 if ((*p)[0] == 'm' && (*p)[1] == 'm') { 148 tag = UART_TAG_MM; 149 goto out; 150 } 151 if ((*p)[0] == 'p' && (*p)[1] == 'a') { 152 tag = UART_TAG_PA; 153 goto out; 154 } 155 if ((*p)[0] == 'r' && (*p)[1] == 's') { 156 tag = UART_TAG_RS; 157 goto out; 158 } 159 if ((*p)[0] == 's' && (*p)[1] == 'b') { 160 tag = UART_TAG_SB; 161 goto out; 162 } 163 if ((*p)[0] == 'x' && (*p)[1] == 'o') { 164 tag = UART_TAG_XO; 165 goto out; 166 } 167 return (-1); 168 169 out: 170 *p += 2; 171 if ((*p)[0] != ':') 172 return (-1); 173 (*p)++; 174 return (tag); 175 } 176 177 /* 178 * Parse a device specification. The specification is a list of attributes 179 * separated by commas. Each attribute is a tag-value pair with the tag and 180 * value separated by a colon. Supported tags are: 181 * 182 * br = Baudrate 183 * ch = Channel 184 * db = Data bits 185 * dt = Device type 186 * io = I/O port address 187 * mm = Memory mapped I/O address 188 * pa = Parity 189 * rs = Register shift 190 * sb = Stopbits 191 * xo = Device clock (xtal oscillator) 192 * 193 * The io and mm tags are mutually exclusive. 194 */ 195 196 int 197 uart_getenv(int devtype, struct uart_devinfo *di, struct uart_class *class) 198 { 199 const char *spec; 200 bus_addr_t addr = ~0U; 201 int error; 202 203 /* 204 * All uart_class references are weak. Make sure the default 205 * device class has been compiled-in. 206 */ 207 if (class == NULL) 208 return (ENXIO); 209 210 /* 211 * Check the environment variables "hw.uart.console" and 212 * "hw.uart.dbgport". These variables, when present, specify 213 * which UART port is to be used as serial console or debug 214 * port (resp). 215 */ 216 if (devtype == UART_DEV_CONSOLE) 217 spec = getenv("hw.uart.console"); 218 else if (devtype == UART_DEV_DBGPORT) 219 spec = getenv("hw.uart.dbgport"); 220 else 221 spec = NULL; 222 if (spec == NULL) 223 return (ENXIO); 224 225 /* Set defaults. */ 226 di->bas.chan = 0; 227 di->bas.regshft = 0; 228 di->bas.rclk = 0; 229 di->baudrate = 0; 230 di->databits = 8; 231 di->stopbits = 1; 232 di->parity = UART_PARITY_NONE; 233 234 /* Parse the attributes. */ 235 while (1) { 236 switch (uart_parse_tag(&spec)) { 237 case UART_TAG_BR: 238 di->baudrate = uart_parse_long(&spec); 239 break; 240 case UART_TAG_CH: 241 di->bas.chan = uart_parse_long(&spec); 242 break; 243 case UART_TAG_DB: 244 di->databits = uart_parse_long(&spec); 245 break; 246 case UART_TAG_DT: 247 class = uart_parse_class(class, &spec); 248 break; 249 case UART_TAG_IO: 250 di->bas.bst = uart_bus_space_io; 251 addr = uart_parse_addr(&spec); 252 break; 253 case UART_TAG_MM: 254 di->bas.bst = uart_bus_space_mem; 255 addr = uart_parse_addr(&spec); 256 break; 257 case UART_TAG_PA: 258 di->parity = uart_parse_parity(&spec); 259 break; 260 case UART_TAG_RS: 261 di->bas.regshft = uart_parse_long(&spec); 262 break; 263 case UART_TAG_SB: 264 di->stopbits = uart_parse_long(&spec); 265 break; 266 case UART_TAG_XO: 267 di->bas.rclk = uart_parse_long(&spec); 268 break; 269 default: 270 return (EINVAL); 271 } 272 if (*spec == '\0') 273 break; 274 if (*spec != ',') 275 return (EINVAL); 276 spec++; 277 } 278 279 /* 280 * If we still have an invalid address, the specification must be 281 * missing an I/O port or memory address. We don't like that. 282 */ 283 if (addr == ~0U) 284 return (EINVAL); 285 286 /* 287 * Accept only the well-known baudrates. Any invalid baudrate 288 * is silently replaced with a 0-valued baudrate. The 0 baudrate 289 * has special meaning. It means that we're not supposed to 290 * program the baudrate and simply communicate with whatever 291 * speed the hardware is currently programmed for. 292 */ 293 if (di->baudrate >= 19200) { 294 if (di->baudrate % 19200) 295 di->baudrate = 0; 296 } else if (di->baudrate >= 1200) { 297 if (di->baudrate % 1200) 298 di->baudrate = 0; 299 } else if (di->baudrate > 0) { 300 if (di->baudrate % 75) 301 di->baudrate = 0; 302 } else 303 di->baudrate = 0; 304 305 /* Set the ops and create a bus space handle. */ 306 di->ops = uart_getops(class); 307 error = bus_space_map(di->bas.bst, addr, uart_getrange(class), 0, 308 &di->bas.bsh); 309 return (error); 310 } 311