xref: /freebsd/sys/dev/uart/uart_core.c (revision bfe691b2f75de2224c7ceb304ebcdef2b42d4179)
1 /*-
2  * Copyright (c) 2003 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #ifndef KLD_MODULE
31 #include "opt_comconsole.h"
32 #endif
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/cons.h>
39 #include <sys/fcntl.h>
40 #include <sys/interrupt.h>
41 #include <sys/kdb.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/queue.h>
45 #include <sys/reboot.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48 #include <sys/termios.h>
49 #include <sys/tty.h>
50 #include <machine/resource.h>
51 #include <machine/stdarg.h>
52 
53 #include <dev/uart/uart.h>
54 #include <dev/uart/uart_bus.h>
55 #include <dev/uart/uart_cpu.h>
56 
57 #include "uart_if.h"
58 
59 devclass_t uart_devclass;
60 char uart_driver_name[] = "uart";
61 
62 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
63     SLIST_HEAD_INITIALIZER(uart_sysdevs);
64 
65 MALLOC_DEFINE(M_UART, "UART", "UART driver");
66 
67 void
68 uart_add_sysdev(struct uart_devinfo *di)
69 {
70 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
71 }
72 
73 const char *
74 uart_getname(struct uart_class *uc)
75 {
76 	return ((uc != NULL) ? uc->name : NULL);
77 }
78 
79 struct uart_ops *
80 uart_getops(struct uart_class *uc)
81 {
82 	return ((uc != NULL) ? uc->uc_ops : NULL);
83 }
84 
85 int
86 uart_getrange(struct uart_class *uc)
87 {
88 	return ((uc != NULL) ? uc->uc_range : 0);
89 }
90 
91 /*
92  * Schedule a soft interrupt. We do this on the 0 to !0 transition
93  * of the TTY pending interrupt status.
94  */
95 static void
96 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
97 {
98 	uint32_t new, old;
99 
100 	do {
101 		old = sc->sc_ttypend;
102 		new = old | ipend;
103 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
104 
105 	if ((old & SER_INT_MASK) == 0)
106 		swi_sched(sc->sc_softih, 0);
107 }
108 
109 /*
110  * A break condition has been detected. We treat the break condition as
111  * a special case that should not happen during normal operation. When
112  * the break condition is to be passed to higher levels in the form of
113  * a NUL character, we really want the break to be in the right place in
114  * the input stream. The overhead to achieve that is not in relation to
115  * the exceptional nature of the break condition, so we permit ourselves
116  * to be sloppy.
117  */
118 static __inline int
119 uart_intr_break(void *arg)
120 {
121 	struct uart_softc *sc = arg;
122 
123 #if defined(KDB) && defined(BREAK_TO_DEBUGGER)
124 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
125 		kdb_enter("Line break on console");
126 		return (0);
127 	}
128 #endif
129 	if (sc->sc_opened)
130 		uart_sched_softih(sc, SER_INT_BREAK);
131 	return (0);
132 }
133 
134 /*
135  * Handle a receiver overrun situation. We lost at least 1 byte in the
136  * input stream and it's our job to contain the situation. We grab as
137  * much of the data we can, but otherwise flush the receiver FIFO to
138  * create some breathing room. The net effect is that we avoid the
139  * overrun condition to happen for the next X characters, where X is
140  * related to the FIFO size at the cost of loosing data right away.
141  * So, instead of having multiple overrun interrupts in close proximity
142  * to each other and possibly pessimizing UART interrupt latency for
143  * other UARTs in a multiport configuration, we create a longer segment
144  * of missing characters by freeing up the FIFO.
145  * Each overrun condition is marked in the input buffer by a token. The
146  * token represents the loss of at least one, but possible more bytes in
147  * the input stream.
148  */
149 static __inline int
150 uart_intr_overrun(void *arg)
151 {
152 	struct uart_softc *sc = arg;
153 
154 	if (sc->sc_opened) {
155 		UART_RECEIVE(sc);
156 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
157 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
158 		uart_sched_softih(sc, SER_INT_RXREADY);
159 	}
160 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
161 	return (0);
162 }
163 
164 /*
165  * Received data ready.
166  */
167 static __inline int
168 uart_intr_rxready(void *arg)
169 {
170 	struct uart_softc *sc = arg;
171 	int rxp;
172 
173 	rxp = sc->sc_rxput;
174 	UART_RECEIVE(sc);
175 #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER)
176 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
177 		while (rxp != sc->sc_rxput) {
178 			if (kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk))
179 				kdb_enter("Break sequence on console");
180 			if (rxp == sc->sc_rxbufsz)
181 				rxp = 0;
182 		}
183 	}
184 #endif
185 	if (sc->sc_opened)
186 		uart_sched_softih(sc, SER_INT_RXREADY);
187 	else
188 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
189 	return (1);
190 }
191 
192 /*
193  * Line or modem status change (OOB signalling).
194  * We pass the signals to the software interrupt handler for further
195  * processing. Note that we merge the delta bits, but set the state
196  * bits. This is to avoid loosing state transitions due to having more
197  * than 1 hardware interrupt between software interrupts.
198  */
199 static __inline int
200 uart_intr_sigchg(void *arg)
201 {
202 	struct uart_softc *sc = arg;
203 	int new, old, sig;
204 
205 	sig = UART_GETSIG(sc);
206 
207 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
208 		if (sig & UART_SIG_DPPS) {
209 			pps_capture(&sc->sc_pps);
210 			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
211 			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
212 		}
213 	}
214 
215 	/*
216 	 * Keep track of signal changes, even when the device is not
217 	 * opened. This allows us to inform upper layers about a
218 	 * possible loss of DCD and thus the existence of a (possibly)
219 	 * different connection when we have DCD back, during the time
220 	 * that the device was closed.
221 	 */
222 	do {
223 		old = sc->sc_ttypend;
224 		new = old & ~SER_MASK_STATE;
225 		new |= sig & SER_INT_SIGMASK;
226 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
227 
228 	if (sc->sc_opened)
229 		uart_sched_softih(sc, SER_INT_SIGCHG);
230 	return (1);
231 }
232 
233 /*
234  * The transmitter can accept more data.
235  */
236 static __inline int
237 uart_intr_txidle(void *arg)
238 {
239 	struct uart_softc *sc = arg;
240 
241 	if (sc->sc_txbusy) {
242 		sc->sc_txbusy = 0;
243 		uart_sched_softih(sc, SER_INT_TXIDLE);
244 	}
245 	return (0);
246 }
247 
248 static int
249 uart_intr(void *arg)
250 {
251 	struct uart_softc *sc = arg;
252 	int flag = 0, ipend;
253 
254 	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
255 		flag = 1;
256 		if (ipend & SER_INT_OVERRUN)
257 			uart_intr_overrun(sc);
258 		if (ipend & SER_INT_BREAK)
259 			uart_intr_break(sc);
260 		if (ipend & SER_INT_RXREADY)
261 			uart_intr_rxready(sc);
262 		if (ipend & SER_INT_SIGCHG)
263 			uart_intr_sigchg(sc);
264 		if (ipend & SER_INT_TXIDLE)
265 			uart_intr_txidle(sc);
266 	}
267 	return((flag)?FILTER_HANDLED:FILTER_STRAY);
268 }
269 
270 serdev_intr_t *
271 uart_bus_ihand(device_t dev, int ipend)
272 {
273 
274 	switch (ipend) {
275 	case SER_INT_BREAK:
276 		return (uart_intr_break);
277 	case SER_INT_OVERRUN:
278 		return (uart_intr_overrun);
279 	case SER_INT_RXREADY:
280 		return (uart_intr_rxready);
281 	case SER_INT_SIGCHG:
282 		return (uart_intr_sigchg);
283 	case SER_INT_TXIDLE:
284 		return (uart_intr_txidle);
285 	}
286 	return (NULL);
287 }
288 
289 int
290 uart_bus_ipend(device_t dev)
291 {
292 	struct uart_softc *sc;
293 
294 	sc = device_get_softc(dev);
295 	return (UART_IPEND(sc));
296 }
297 
298 int
299 uart_bus_sysdev(device_t dev)
300 {
301 	struct uart_softc *sc;
302 
303 	sc = device_get_softc(dev);
304 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
305 }
306 
307 int
308 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
309 {
310 	struct uart_softc *sc;
311 	struct uart_devinfo *sysdev;
312 	int error;
313 
314 	sc = device_get_softc(dev);
315 
316 	/*
317 	 * All uart_class references are weak. Check that the needed
318 	 * class has been compiled-in. Fail if not.
319 	 */
320 	if (sc->sc_class == NULL)
321 		return (ENXIO);
322 
323 	/*
324 	 * Initialize the instance. Note that the instance (=softc) does
325 	 * not necessarily match the hardware specific softc. We can't do
326 	 * anything about it now, because we may not attach to the device.
327 	 * Hardware drivers cannot use any of the class specific fields
328 	 * while probing.
329 	 */
330 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
331 	sc->sc_dev = dev;
332 	if (device_get_desc(dev) == NULL)
333 		device_set_desc(dev, uart_getname(sc->sc_class));
334 
335 	/*
336 	 * Allocate the register resource. We assume that all UARTs have
337 	 * a single register window in either I/O port space or memory
338 	 * mapped I/O space. Any UART that needs multiple windows will
339 	 * consequently not be supported by this driver as-is. We try I/O
340 	 * port space first because that's the common case.
341 	 */
342 	sc->sc_rrid = rid;
343 	sc->sc_rtype = SYS_RES_IOPORT;
344 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
345 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
346 	if (sc->sc_rres == NULL) {
347 		sc->sc_rrid = rid;
348 		sc->sc_rtype = SYS_RES_MEMORY;
349 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
350 		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
351 		    RF_ACTIVE);
352 		if (sc->sc_rres == NULL)
353 			return (ENXIO);
354 	}
355 
356 	/*
357 	 * Fill in the bus access structure and compare this device with
358 	 * a possible console device and/or a debug port. We set the flags
359 	 * in the softc so that the hardware dependent probe can adjust
360 	 * accordingly. In general, you don't want to permanently disrupt
361 	 * console I/O.
362 	 */
363 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
364 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
365 	sc->sc_bas.chan = chan;
366 	sc->sc_bas.regshft = regshft;
367 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
368 
369 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
370 		if (chan == sysdev->bas.chan &&
371 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
372 			/* XXX check if ops matches class. */
373 			sc->sc_sysdev = sysdev;
374 			sysdev->bas.rclk = sc->sc_bas.rclk;
375 		}
376 	}
377 
378 	error = UART_PROBE(sc);
379 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
380 	return ((error) ? error : BUS_PROBE_DEFAULT);
381 }
382 
383 int
384 uart_bus_attach(device_t dev)
385 {
386 	struct uart_softc *sc, *sc0;
387 	const char *sep;
388 	int error;
389 
390 	/*
391 	 * The sc_class field defines the type of UART we're going to work
392 	 * with and thus the size of the softc. Replace the generic softc
393 	 * with one that matches the UART now that we're certain we handle
394 	 * the device.
395 	 */
396 	sc0 = device_get_softc(dev);
397 	if (sc0->sc_class->size > sizeof(*sc)) {
398 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
399 		bcopy(sc0, sc, sizeof(*sc));
400 		device_set_softc(dev, sc);
401 	} else
402 		sc = sc0;
403 
404 	/*
405 	 * Protect ourselves against interrupts while we're not completely
406 	 * finished attaching and initializing. We don't expect interrupts
407 	 * until after UART_ATTACH() though.
408 	 */
409 	sc->sc_leaving = 1;
410 
411 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
412 	if (sc->sc_hwmtx == NULL)
413 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
414 
415 	/*
416 	 * Re-allocate. We expect that the softc contains the information
417 	 * collected by uart_bus_probe() intact.
418 	 */
419 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
420 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
421 	if (sc->sc_rres == NULL) {
422 		mtx_destroy(&sc->sc_hwmtx_s);
423 		return (ENXIO);
424 	}
425 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
426 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
427 
428 	sc->sc_irid = 0;
429 	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
430 	    RF_ACTIVE | RF_SHAREABLE);
431 	if (sc->sc_ires != NULL) {
432 		error = bus_setup_intr(dev,
433 		    sc->sc_ires, INTR_TYPE_TTY,
434 		    uart_intr, NULL, sc, &sc->sc_icookie);
435 		if (error)
436 			error = bus_setup_intr(dev,
437 			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
438 			    NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
439 		else
440 			sc->sc_fastintr = 1;
441 
442 		if (error) {
443 			device_printf(dev, "could not activate interrupt\n");
444 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
445 			    sc->sc_ires);
446 			sc->sc_ires = NULL;
447 		}
448 	}
449 	if (sc->sc_ires == NULL) {
450 		/* XXX no interrupt resource. Force polled mode. */
451 		sc->sc_polled = 1;
452 	}
453 
454 	sc->sc_rxbufsz = IBUFSIZ;
455 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
456 	    M_UART, M_WAITOK);
457 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
458 	    M_UART, M_WAITOK);
459 
460 	error = UART_ATTACH(sc);
461 	if (error)
462 		goto fail;
463 
464 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
465 		sep = "";
466 		device_print_prettyname(dev);
467 		if (sc->sc_hwiflow) {
468 			printf("%sRTS iflow", sep);
469 			sep = ", ";
470 		}
471 		if (sc->sc_hwoflow) {
472 			printf("%sCTS oflow", sep);
473 			sep = ", ";
474 		}
475 		printf("\n");
476 	}
477 
478 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
479 		sep = "";
480 		device_print_prettyname(dev);
481 		if (sc->sc_fastintr) {
482 			printf("%sfast interrupt", sep);
483 			sep = ", ";
484 		}
485 		if (sc->sc_polled) {
486 			printf("%spolled mode", sep);
487 			sep = ", ";
488 		}
489 		printf("\n");
490 	}
491 
492 	if (sc->sc_sysdev != NULL) {
493 		if (sc->sc_sysdev->baudrate == 0) {
494 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
495 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
496 				sc->sc_sysdev->baudrate = -1;
497 		}
498 		switch (sc->sc_sysdev->type) {
499 		case UART_DEV_CONSOLE:
500 			device_printf(dev, "console");
501 			break;
502 		case UART_DEV_DBGPORT:
503 			device_printf(dev, "debug port");
504 			break;
505 		case UART_DEV_KEYBOARD:
506 			device_printf(dev, "keyboard");
507 			break;
508 		default:
509 			device_printf(dev, "unknown system device");
510 			break;
511 		}
512 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
513 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
514 		    sc->sc_sysdev->stopbits);
515 	}
516 
517 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
518 	pps_init(&sc->sc_pps);
519 
520 	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
521 	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
522 	if (error)
523 		goto fail;
524 
525 	if (sc->sc_sysdev != NULL)
526 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
527 
528 	sc->sc_leaving = 0;
529 	uart_intr(sc);
530 	return (0);
531 
532  fail:
533 	free(sc->sc_txbuf, M_UART);
534 	free(sc->sc_rxbuf, M_UART);
535 
536 	if (sc->sc_ires != NULL) {
537 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
538 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
539 		    sc->sc_ires);
540 	}
541 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
542 
543 	mtx_destroy(&sc->sc_hwmtx_s);
544 
545 	return (error);
546 }
547 
548 int
549 uart_bus_detach(device_t dev)
550 {
551 	struct uart_softc *sc;
552 
553 	sc = device_get_softc(dev);
554 
555 	sc->sc_leaving = 1;
556 
557 	if (sc->sc_sysdev != NULL)
558 		sc->sc_sysdev->hwmtx = NULL;
559 
560 	UART_DETACH(sc);
561 
562 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
563 		(*sc->sc_sysdev->detach)(sc);
564 	else
565 		uart_tty_detach(sc);
566 
567 	free(sc->sc_txbuf, M_UART);
568 	free(sc->sc_rxbuf, M_UART);
569 
570 	if (sc->sc_ires != NULL) {
571 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
572 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
573 		    sc->sc_ires);
574 	}
575 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
576 
577 	mtx_destroy(&sc->sc_hwmtx_s);
578 
579 	if (sc->sc_class->size > sizeof(*sc)) {
580 		device_set_softc(dev, NULL);
581 		free(sc, M_UART);
582 	} else
583 		device_set_softc(dev, NULL);
584 
585 	return (0);
586 }
587