1 /*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/cons.h> 35 #include <sys/fcntl.h> 36 #include <sys/interrupt.h> 37 #include <sys/kdb.h> 38 #include <sys/kernel.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/reboot.h> 42 #include <machine/bus.h> 43 #include <sys/rman.h> 44 #include <machine/resource.h> 45 #include <machine/stdarg.h> 46 47 #include <dev/uart/uart.h> 48 #include <dev/uart/uart_bus.h> 49 #include <dev/uart/uart_cpu.h> 50 51 #include "uart_if.h" 52 53 devclass_t uart_devclass; 54 char uart_driver_name[] = "uart"; 55 56 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 57 SLIST_HEAD_INITIALIZER(uart_sysdevs); 58 59 static MALLOC_DEFINE(M_UART, "UART", "UART driver"); 60 61 #ifndef UART_POLL_FREQ 62 #define UART_POLL_FREQ 50 63 #endif 64 static int uart_poll_freq = UART_POLL_FREQ; 65 TUNABLE_INT("debug.uart_poll_freq", &uart_poll_freq); 66 67 void 68 uart_add_sysdev(struct uart_devinfo *di) 69 { 70 SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 71 } 72 73 const char * 74 uart_getname(struct uart_class *uc) 75 { 76 return ((uc != NULL) ? uc->name : NULL); 77 } 78 79 struct uart_ops * 80 uart_getops(struct uart_class *uc) 81 { 82 return ((uc != NULL) ? uc->uc_ops : NULL); 83 } 84 85 int 86 uart_getrange(struct uart_class *uc) 87 { 88 return ((uc != NULL) ? uc->uc_range : 0); 89 } 90 91 /* 92 * Schedule a soft interrupt. We do this on the 0 to !0 transition 93 * of the TTY pending interrupt status. 94 */ 95 void 96 uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 97 { 98 uint32_t new, old; 99 100 do { 101 old = sc->sc_ttypend; 102 new = old | ipend; 103 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 104 105 if ((old & SER_INT_MASK) == 0) 106 swi_sched(sc->sc_softih, 0); 107 } 108 109 /* 110 * A break condition has been detected. We treat the break condition as 111 * a special case that should not happen during normal operation. When 112 * the break condition is to be passed to higher levels in the form of 113 * a NUL character, we really want the break to be in the right place in 114 * the input stream. The overhead to achieve that is not in relation to 115 * the exceptional nature of the break condition, so we permit ourselves 116 * to be sloppy. 117 */ 118 static __inline int 119 uart_intr_break(void *arg) 120 { 121 struct uart_softc *sc = arg; 122 123 #if defined(KDB) 124 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 125 if (kdb_break()) 126 return (0); 127 } 128 #endif 129 if (sc->sc_opened) 130 uart_sched_softih(sc, SER_INT_BREAK); 131 return (0); 132 } 133 134 /* 135 * Handle a receiver overrun situation. We lost at least 1 byte in the 136 * input stream and it's our job to contain the situation. We grab as 137 * much of the data we can, but otherwise flush the receiver FIFO to 138 * create some breathing room. The net effect is that we avoid the 139 * overrun condition to happen for the next X characters, where X is 140 * related to the FIFO size at the cost of losing data right away. 141 * So, instead of having multiple overrun interrupts in close proximity 142 * to each other and possibly pessimizing UART interrupt latency for 143 * other UARTs in a multiport configuration, we create a longer segment 144 * of missing characters by freeing up the FIFO. 145 * Each overrun condition is marked in the input buffer by a token. The 146 * token represents the loss of at least one, but possible more bytes in 147 * the input stream. 148 */ 149 static __inline int 150 uart_intr_overrun(void *arg) 151 { 152 struct uart_softc *sc = arg; 153 154 if (sc->sc_opened) { 155 UART_RECEIVE(sc); 156 if (uart_rx_put(sc, UART_STAT_OVERRUN)) 157 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 158 uart_sched_softih(sc, SER_INT_RXREADY); 159 } 160 UART_FLUSH(sc, UART_FLUSH_RECEIVER); 161 return (0); 162 } 163 164 /* 165 * Received data ready. 166 */ 167 static __inline int 168 uart_intr_rxready(void *arg) 169 { 170 struct uart_softc *sc = arg; 171 int rxp; 172 173 rxp = sc->sc_rxput; 174 UART_RECEIVE(sc); 175 #if defined(KDB) 176 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 177 while (rxp != sc->sc_rxput) { 178 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); 179 if (rxp == sc->sc_rxbufsz) 180 rxp = 0; 181 } 182 } 183 #endif 184 if (sc->sc_opened) 185 uart_sched_softih(sc, SER_INT_RXREADY); 186 else 187 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 188 return (1); 189 } 190 191 /* 192 * Line or modem status change (OOB signalling). 193 * We pass the signals to the software interrupt handler for further 194 * processing. Note that we merge the delta bits, but set the state 195 * bits. This is to avoid losing state transitions due to having more 196 * than 1 hardware interrupt between software interrupts. 197 */ 198 static __inline int 199 uart_intr_sigchg(void *arg) 200 { 201 struct uart_softc *sc = arg; 202 int new, old, sig; 203 204 sig = UART_GETSIG(sc); 205 206 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 207 if (sig & UART_SIG_DPPS) { 208 pps_capture(&sc->sc_pps); 209 pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? 210 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 211 } 212 } 213 214 /* 215 * Keep track of signal changes, even when the device is not 216 * opened. This allows us to inform upper layers about a 217 * possible loss of DCD and thus the existence of a (possibly) 218 * different connection when we have DCD back, during the time 219 * that the device was closed. 220 */ 221 do { 222 old = sc->sc_ttypend; 223 new = old & ~SER_MASK_STATE; 224 new |= sig & SER_INT_SIGMASK; 225 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 226 227 if (sc->sc_opened) 228 uart_sched_softih(sc, SER_INT_SIGCHG); 229 return (1); 230 } 231 232 /* 233 * The transmitter can accept more data. 234 */ 235 static __inline int 236 uart_intr_txidle(void *arg) 237 { 238 struct uart_softc *sc = arg; 239 240 if (sc->sc_txbusy) { 241 sc->sc_txbusy = 0; 242 uart_sched_softih(sc, SER_INT_TXIDLE); 243 } 244 return (0); 245 } 246 247 static int 248 uart_intr(void *arg) 249 { 250 struct uart_softc *sc = arg; 251 int cnt, ipend; 252 253 if (sc->sc_leaving) 254 return (FILTER_STRAY); 255 256 cnt = 0; 257 while (cnt < 20 && (ipend = UART_IPEND(sc)) != 0) { 258 cnt++; 259 if (ipend & SER_INT_OVERRUN) 260 uart_intr_overrun(sc); 261 if (ipend & SER_INT_BREAK) 262 uart_intr_break(sc); 263 if (ipend & SER_INT_RXREADY) 264 uart_intr_rxready(sc); 265 if (ipend & SER_INT_SIGCHG) 266 uart_intr_sigchg(sc); 267 if (ipend & SER_INT_TXIDLE) 268 uart_intr_txidle(sc); 269 } 270 271 if (sc->sc_polled) { 272 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 273 (timeout_t *)uart_intr, sc); 274 } 275 276 return ((cnt == 0) ? FILTER_STRAY : 277 ((cnt == 20) ? FILTER_SCHEDULE_THREAD : FILTER_HANDLED)); 278 } 279 280 serdev_intr_t * 281 uart_bus_ihand(device_t dev, int ipend) 282 { 283 284 switch (ipend) { 285 case SER_INT_BREAK: 286 return (uart_intr_break); 287 case SER_INT_OVERRUN: 288 return (uart_intr_overrun); 289 case SER_INT_RXREADY: 290 return (uart_intr_rxready); 291 case SER_INT_SIGCHG: 292 return (uart_intr_sigchg); 293 case SER_INT_TXIDLE: 294 return (uart_intr_txidle); 295 } 296 return (NULL); 297 } 298 299 int 300 uart_bus_ipend(device_t dev) 301 { 302 struct uart_softc *sc; 303 304 sc = device_get_softc(dev); 305 return (UART_IPEND(sc)); 306 } 307 308 int 309 uart_bus_sysdev(device_t dev) 310 { 311 struct uart_softc *sc; 312 313 sc = device_get_softc(dev); 314 return ((sc->sc_sysdev != NULL) ? 1 : 0); 315 } 316 317 int 318 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 319 { 320 struct uart_softc *sc; 321 struct uart_devinfo *sysdev; 322 int error; 323 324 sc = device_get_softc(dev); 325 326 /* 327 * All uart_class references are weak. Check that the needed 328 * class has been compiled-in. Fail if not. 329 */ 330 if (sc->sc_class == NULL) 331 return (ENXIO); 332 333 /* 334 * Initialize the instance. Note that the instance (=softc) does 335 * not necessarily match the hardware specific softc. We can't do 336 * anything about it now, because we may not attach to the device. 337 * Hardware drivers cannot use any of the class specific fields 338 * while probing. 339 */ 340 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 341 sc->sc_dev = dev; 342 if (device_get_desc(dev) == NULL) 343 device_set_desc(dev, uart_getname(sc->sc_class)); 344 345 /* 346 * Allocate the register resource. We assume that all UARTs have 347 * a single register window in either I/O port space or memory 348 * mapped I/O space. Any UART that needs multiple windows will 349 * consequently not be supported by this driver as-is. We try I/O 350 * port space first because that's the common case. 351 */ 352 sc->sc_rrid = rid; 353 sc->sc_rtype = SYS_RES_IOPORT; 354 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 355 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 356 if (sc->sc_rres == NULL) { 357 sc->sc_rrid = rid; 358 sc->sc_rtype = SYS_RES_MEMORY; 359 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, 360 &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), 361 RF_ACTIVE); 362 if (sc->sc_rres == NULL) 363 return (ENXIO); 364 } 365 366 /* 367 * Fill in the bus access structure and compare this device with 368 * a possible console device and/or a debug port. We set the flags 369 * in the softc so that the hardware dependent probe can adjust 370 * accordingly. In general, you don't want to permanently disrupt 371 * console I/O. 372 */ 373 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 374 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 375 sc->sc_bas.chan = chan; 376 sc->sc_bas.regshft = regshft; 377 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 378 379 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 380 if (chan == sysdev->bas.chan && 381 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 382 /* XXX check if ops matches class. */ 383 sc->sc_sysdev = sysdev; 384 sysdev->bas.rclk = sc->sc_bas.rclk; 385 } 386 } 387 388 error = UART_PROBE(sc); 389 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 390 return ((error) ? error : BUS_PROBE_DEFAULT); 391 } 392 393 int 394 uart_bus_attach(device_t dev) 395 { 396 struct uart_softc *sc, *sc0; 397 const char *sep; 398 int error, filt; 399 400 /* 401 * The sc_class field defines the type of UART we're going to work 402 * with and thus the size of the softc. Replace the generic softc 403 * with one that matches the UART now that we're certain we handle 404 * the device. 405 */ 406 sc0 = device_get_softc(dev); 407 if (sc0->sc_class->size > sizeof(*sc)) { 408 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 409 bcopy(sc0, sc, sizeof(*sc)); 410 device_set_softc(dev, sc); 411 } else 412 sc = sc0; 413 414 /* 415 * Now that we know the softc for this device, connect the back 416 * pointer from the sysdev for this device, if any 417 */ 418 if (sc->sc_sysdev != NULL) 419 sc->sc_sysdev->sc = sc; 420 421 /* 422 * Protect ourselves against interrupts while we're not completely 423 * finished attaching and initializing. We don't expect interrupts 424 * until after UART_ATTACH() though. 425 */ 426 sc->sc_leaving = 1; 427 428 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 429 if (sc->sc_hwmtx == NULL) 430 sc->sc_hwmtx = &sc->sc_hwmtx_s; 431 432 /* 433 * Re-allocate. We expect that the softc contains the information 434 * collected by uart_bus_probe() intact. 435 */ 436 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 437 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 438 if (sc->sc_rres == NULL) { 439 mtx_destroy(&sc->sc_hwmtx_s); 440 return (ENXIO); 441 } 442 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 443 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 444 445 /* 446 * Ensure there is room for at least three full FIFOs of data in the 447 * receive buffer (handles the case of low-level drivers with huge 448 * FIFOs), and also ensure that there is no less than the historical 449 * size of 384 bytes (handles the typical small-FIFO case). 450 */ 451 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); 452 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 453 M_UART, M_WAITOK); 454 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 455 M_UART, M_WAITOK); 456 457 error = UART_ATTACH(sc); 458 if (error) 459 goto fail; 460 461 if (sc->sc_hwiflow || sc->sc_hwoflow) { 462 sep = ""; 463 device_print_prettyname(dev); 464 if (sc->sc_hwiflow) { 465 printf("%sRTS iflow", sep); 466 sep = ", "; 467 } 468 if (sc->sc_hwoflow) { 469 printf("%sCTS oflow", sep); 470 sep = ", "; 471 } 472 printf("\n"); 473 } 474 475 if (sc->sc_sysdev != NULL) { 476 if (sc->sc_sysdev->baudrate == 0) { 477 if (UART_IOCTL(sc, UART_IOCTL_BAUD, 478 (intptr_t)&sc->sc_sysdev->baudrate) != 0) 479 sc->sc_sysdev->baudrate = -1; 480 } 481 switch (sc->sc_sysdev->type) { 482 case UART_DEV_CONSOLE: 483 device_printf(dev, "console"); 484 break; 485 case UART_DEV_DBGPORT: 486 device_printf(dev, "debug port"); 487 break; 488 case UART_DEV_KEYBOARD: 489 device_printf(dev, "keyboard"); 490 break; 491 default: 492 device_printf(dev, "unknown system device"); 493 break; 494 } 495 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 496 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 497 sc->sc_sysdev->stopbits); 498 } 499 500 sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 501 pps_init(&sc->sc_pps); 502 503 sc->sc_leaving = 0; 504 filt = uart_intr(sc); 505 506 /* 507 * Don't use interrupts if we couldn't clear any pending interrupt 508 * conditions. We may have broken H/W and polling is probably the 509 * safest thing to do. 510 */ 511 if (filt != FILTER_SCHEDULE_THREAD) { 512 sc->sc_irid = 0; 513 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, 514 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); 515 } 516 if (sc->sc_ires != NULL) { 517 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, 518 uart_intr, NULL, sc, &sc->sc_icookie); 519 sc->sc_fastintr = (error == 0) ? 1 : 0; 520 521 if (!sc->sc_fastintr) 522 error = bus_setup_intr(dev, sc->sc_ires, 523 INTR_TYPE_TTY | INTR_MPSAFE, NULL, 524 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 525 526 if (error) { 527 device_printf(dev, "could not activate interrupt\n"); 528 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 529 sc->sc_ires); 530 sc->sc_ires = NULL; 531 } 532 } 533 if (sc->sc_ires == NULL) { 534 /* No interrupt resource. Force polled mode. */ 535 sc->sc_polled = 1; 536 callout_init(&sc->sc_timer, 1); 537 } 538 539 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 540 sep = ""; 541 device_print_prettyname(dev); 542 if (sc->sc_fastintr) { 543 printf("%sfast interrupt", sep); 544 sep = ", "; 545 } 546 if (sc->sc_polled) { 547 printf("%spolled mode (%dHz)", sep, uart_poll_freq); 548 sep = ", "; 549 } 550 printf("\n"); 551 } 552 553 error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) 554 ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc); 555 if (error) 556 goto fail; 557 558 if (sc->sc_sysdev != NULL) 559 sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 560 561 return (0); 562 563 fail: 564 free(sc->sc_txbuf, M_UART); 565 free(sc->sc_rxbuf, M_UART); 566 567 if (sc->sc_ires != NULL) { 568 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 569 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 570 sc->sc_ires); 571 } 572 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 573 574 mtx_destroy(&sc->sc_hwmtx_s); 575 576 return (error); 577 } 578 579 int 580 uart_bus_detach(device_t dev) 581 { 582 struct uart_softc *sc; 583 584 sc = device_get_softc(dev); 585 586 sc->sc_leaving = 1; 587 588 if (sc->sc_sysdev != NULL) 589 sc->sc_sysdev->hwmtx = NULL; 590 591 UART_DETACH(sc); 592 593 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 594 (*sc->sc_sysdev->detach)(sc); 595 else 596 uart_tty_detach(sc); 597 598 free(sc->sc_txbuf, M_UART); 599 free(sc->sc_rxbuf, M_UART); 600 601 if (sc->sc_ires != NULL) { 602 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 603 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 604 sc->sc_ires); 605 } 606 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 607 608 mtx_destroy(&sc->sc_hwmtx_s); 609 610 if (sc->sc_class->size > sizeof(*sc)) { 611 device_set_softc(dev, NULL); 612 free(sc, M_UART); 613 } else 614 device_set_softc(dev, NULL); 615 616 return (0); 617 } 618 619 int 620 uart_bus_resume(device_t dev) 621 { 622 struct uart_softc *sc; 623 624 sc = device_get_softc(dev); 625 return (UART_ATTACH(sc)); 626 } 627 628 void 629 uart_grab(struct uart_devinfo *di) 630 { 631 632 if (di->sc) 633 UART_GRAB(di->sc); 634 } 635 636 void 637 uart_ungrab(struct uart_devinfo *di) 638 { 639 640 if (di->sc) 641 UART_UNGRAB(di->sc); 642 } 643