xref: /freebsd/sys/dev/uart/uart_core.c (revision bb15ca603fa442c72dde3f3cb8b46db6970e3950)
1 /*-
2  * Copyright (c) 2003 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/cons.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
37 #include <sys/kdb.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <machine/bus.h>
43 #include <sys/rman.h>
44 #include <machine/resource.h>
45 #include <machine/stdarg.h>
46 
47 #include <dev/uart/uart.h>
48 #include <dev/uart/uart_bus.h>
49 #include <dev/uart/uart_cpu.h>
50 
51 #include "uart_if.h"
52 
53 devclass_t uart_devclass;
54 char uart_driver_name[] = "uart";
55 
56 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
57     SLIST_HEAD_INITIALIZER(uart_sysdevs);
58 
59 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
60 
61 void
62 uart_add_sysdev(struct uart_devinfo *di)
63 {
64 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
65 }
66 
67 const char *
68 uart_getname(struct uart_class *uc)
69 {
70 	return ((uc != NULL) ? uc->name : NULL);
71 }
72 
73 struct uart_ops *
74 uart_getops(struct uart_class *uc)
75 {
76 	return ((uc != NULL) ? uc->uc_ops : NULL);
77 }
78 
79 int
80 uart_getrange(struct uart_class *uc)
81 {
82 	return ((uc != NULL) ? uc->uc_range : 0);
83 }
84 
85 /*
86  * Schedule a soft interrupt. We do this on the 0 to !0 transition
87  * of the TTY pending interrupt status.
88  */
89 void
90 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
91 {
92 	uint32_t new, old;
93 
94 	do {
95 		old = sc->sc_ttypend;
96 		new = old | ipend;
97 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
98 
99 	if ((old & SER_INT_MASK) == 0)
100 		swi_sched(sc->sc_softih, 0);
101 }
102 
103 /*
104  * A break condition has been detected. We treat the break condition as
105  * a special case that should not happen during normal operation. When
106  * the break condition is to be passed to higher levels in the form of
107  * a NUL character, we really want the break to be in the right place in
108  * the input stream. The overhead to achieve that is not in relation to
109  * the exceptional nature of the break condition, so we permit ourselves
110  * to be sloppy.
111  */
112 static __inline int
113 uart_intr_break(void *arg)
114 {
115 	struct uart_softc *sc = arg;
116 
117 #if defined(KDB)
118 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
119 		if (kdb_break())
120 			return (0);
121 	}
122 #endif
123 	if (sc->sc_opened)
124 		uart_sched_softih(sc, SER_INT_BREAK);
125 	return (0);
126 }
127 
128 /*
129  * Handle a receiver overrun situation. We lost at least 1 byte in the
130  * input stream and it's our job to contain the situation. We grab as
131  * much of the data we can, but otherwise flush the receiver FIFO to
132  * create some breathing room. The net effect is that we avoid the
133  * overrun condition to happen for the next X characters, where X is
134  * related to the FIFO size at the cost of loosing data right away.
135  * So, instead of having multiple overrun interrupts in close proximity
136  * to each other and possibly pessimizing UART interrupt latency for
137  * other UARTs in a multiport configuration, we create a longer segment
138  * of missing characters by freeing up the FIFO.
139  * Each overrun condition is marked in the input buffer by a token. The
140  * token represents the loss of at least one, but possible more bytes in
141  * the input stream.
142  */
143 static __inline int
144 uart_intr_overrun(void *arg)
145 {
146 	struct uart_softc *sc = arg;
147 
148 	if (sc->sc_opened) {
149 		UART_RECEIVE(sc);
150 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
151 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
152 		uart_sched_softih(sc, SER_INT_RXREADY);
153 	}
154 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
155 	return (0);
156 }
157 
158 /*
159  * Received data ready.
160  */
161 static __inline int
162 uart_intr_rxready(void *arg)
163 {
164 	struct uart_softc *sc = arg;
165 	int rxp;
166 
167 	rxp = sc->sc_rxput;
168 	UART_RECEIVE(sc);
169 #if defined(KDB)
170 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
171 		while (rxp != sc->sc_rxput) {
172 			kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
173 			if (rxp == sc->sc_rxbufsz)
174 				rxp = 0;
175 		}
176 	}
177 #endif
178 	if (sc->sc_opened)
179 		uart_sched_softih(sc, SER_INT_RXREADY);
180 	else
181 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
182 	return (1);
183 }
184 
185 /*
186  * Line or modem status change (OOB signalling).
187  * We pass the signals to the software interrupt handler for further
188  * processing. Note that we merge the delta bits, but set the state
189  * bits. This is to avoid loosing state transitions due to having more
190  * than 1 hardware interrupt between software interrupts.
191  */
192 static __inline int
193 uart_intr_sigchg(void *arg)
194 {
195 	struct uart_softc *sc = arg;
196 	int new, old, sig;
197 
198 	sig = UART_GETSIG(sc);
199 
200 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
201 		if (sig & UART_SIG_DPPS) {
202 			pps_capture(&sc->sc_pps);
203 			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
204 			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
205 		}
206 	}
207 
208 	/*
209 	 * Keep track of signal changes, even when the device is not
210 	 * opened. This allows us to inform upper layers about a
211 	 * possible loss of DCD and thus the existence of a (possibly)
212 	 * different connection when we have DCD back, during the time
213 	 * that the device was closed.
214 	 */
215 	do {
216 		old = sc->sc_ttypend;
217 		new = old & ~SER_MASK_STATE;
218 		new |= sig & SER_INT_SIGMASK;
219 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
220 
221 	if (sc->sc_opened)
222 		uart_sched_softih(sc, SER_INT_SIGCHG);
223 	return (1);
224 }
225 
226 /*
227  * The transmitter can accept more data.
228  */
229 static __inline int
230 uart_intr_txidle(void *arg)
231 {
232 	struct uart_softc *sc = arg;
233 
234 	if (sc->sc_txbusy) {
235 		sc->sc_txbusy = 0;
236 		uart_sched_softih(sc, SER_INT_TXIDLE);
237 	}
238 	return (0);
239 }
240 
241 static int
242 uart_intr(void *arg)
243 {
244 	struct uart_softc *sc = arg;
245 	int flag = 0, ipend;
246 
247 	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
248 		flag = 1;
249 		if (ipend & SER_INT_OVERRUN)
250 			uart_intr_overrun(sc);
251 		if (ipend & SER_INT_BREAK)
252 			uart_intr_break(sc);
253 		if (ipend & SER_INT_RXREADY)
254 			uart_intr_rxready(sc);
255 		if (ipend & SER_INT_SIGCHG)
256 			uart_intr_sigchg(sc);
257 		if (ipend & SER_INT_TXIDLE)
258 			uart_intr_txidle(sc);
259 	}
260 	return((flag)?FILTER_HANDLED:FILTER_STRAY);
261 }
262 
263 serdev_intr_t *
264 uart_bus_ihand(device_t dev, int ipend)
265 {
266 
267 	switch (ipend) {
268 	case SER_INT_BREAK:
269 		return (uart_intr_break);
270 	case SER_INT_OVERRUN:
271 		return (uart_intr_overrun);
272 	case SER_INT_RXREADY:
273 		return (uart_intr_rxready);
274 	case SER_INT_SIGCHG:
275 		return (uart_intr_sigchg);
276 	case SER_INT_TXIDLE:
277 		return (uart_intr_txidle);
278 	}
279 	return (NULL);
280 }
281 
282 int
283 uart_bus_ipend(device_t dev)
284 {
285 	struct uart_softc *sc;
286 
287 	sc = device_get_softc(dev);
288 	return (UART_IPEND(sc));
289 }
290 
291 int
292 uart_bus_sysdev(device_t dev)
293 {
294 	struct uart_softc *sc;
295 
296 	sc = device_get_softc(dev);
297 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
298 }
299 
300 int
301 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
302 {
303 	struct uart_softc *sc;
304 	struct uart_devinfo *sysdev;
305 	int error;
306 
307 	sc = device_get_softc(dev);
308 
309 	/*
310 	 * All uart_class references are weak. Check that the needed
311 	 * class has been compiled-in. Fail if not.
312 	 */
313 	if (sc->sc_class == NULL)
314 		return (ENXIO);
315 
316 	/*
317 	 * Initialize the instance. Note that the instance (=softc) does
318 	 * not necessarily match the hardware specific softc. We can't do
319 	 * anything about it now, because we may not attach to the device.
320 	 * Hardware drivers cannot use any of the class specific fields
321 	 * while probing.
322 	 */
323 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
324 	sc->sc_dev = dev;
325 	if (device_get_desc(dev) == NULL)
326 		device_set_desc(dev, uart_getname(sc->sc_class));
327 
328 	/*
329 	 * Allocate the register resource. We assume that all UARTs have
330 	 * a single register window in either I/O port space or memory
331 	 * mapped I/O space. Any UART that needs multiple windows will
332 	 * consequently not be supported by this driver as-is. We try I/O
333 	 * port space first because that's the common case.
334 	 */
335 	sc->sc_rrid = rid;
336 	sc->sc_rtype = SYS_RES_IOPORT;
337 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
338 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
339 	if (sc->sc_rres == NULL) {
340 		sc->sc_rrid = rid;
341 		sc->sc_rtype = SYS_RES_MEMORY;
342 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
343 		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
344 		    RF_ACTIVE);
345 		if (sc->sc_rres == NULL)
346 			return (ENXIO);
347 	}
348 
349 	/*
350 	 * Fill in the bus access structure and compare this device with
351 	 * a possible console device and/or a debug port. We set the flags
352 	 * in the softc so that the hardware dependent probe can adjust
353 	 * accordingly. In general, you don't want to permanently disrupt
354 	 * console I/O.
355 	 */
356 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
357 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
358 	sc->sc_bas.chan = chan;
359 	sc->sc_bas.regshft = regshft;
360 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
361 
362 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
363 		if (chan == sysdev->bas.chan &&
364 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
365 			/* XXX check if ops matches class. */
366 			sc->sc_sysdev = sysdev;
367 			sysdev->bas.rclk = sc->sc_bas.rclk;
368 		}
369 	}
370 
371 	error = UART_PROBE(sc);
372 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
373 	return ((error) ? error : BUS_PROBE_DEFAULT);
374 }
375 
376 int
377 uart_bus_attach(device_t dev)
378 {
379 	struct uart_softc *sc, *sc0;
380 	const char *sep;
381 	int error;
382 
383 	/*
384 	 * The sc_class field defines the type of UART we're going to work
385 	 * with and thus the size of the softc. Replace the generic softc
386 	 * with one that matches the UART now that we're certain we handle
387 	 * the device.
388 	 */
389 	sc0 = device_get_softc(dev);
390 	if (sc0->sc_class->size > sizeof(*sc)) {
391 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
392 		bcopy(sc0, sc, sizeof(*sc));
393 		device_set_softc(dev, sc);
394 	} else
395 		sc = sc0;
396 
397 	/*
398 	 * Protect ourselves against interrupts while we're not completely
399 	 * finished attaching and initializing. We don't expect interrupts
400 	 * until after UART_ATTACH() though.
401 	 */
402 	sc->sc_leaving = 1;
403 
404 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
405 	if (sc->sc_hwmtx == NULL)
406 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
407 
408 	/*
409 	 * Re-allocate. We expect that the softc contains the information
410 	 * collected by uart_bus_probe() intact.
411 	 */
412 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
413 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
414 	if (sc->sc_rres == NULL) {
415 		mtx_destroy(&sc->sc_hwmtx_s);
416 		return (ENXIO);
417 	}
418 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
419 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
420 
421 	sc->sc_irid = 0;
422 	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
423 	    RF_ACTIVE | RF_SHAREABLE);
424 	if (sc->sc_ires != NULL) {
425 		error = bus_setup_intr(dev,
426 		    sc->sc_ires, INTR_TYPE_TTY,
427 		    uart_intr, NULL, sc, &sc->sc_icookie);
428 		if (error)
429 			error = bus_setup_intr(dev,
430 			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
431 			    NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
432 		else
433 			sc->sc_fastintr = 1;
434 
435 		if (error) {
436 			device_printf(dev, "could not activate interrupt\n");
437 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
438 			    sc->sc_ires);
439 			sc->sc_ires = NULL;
440 		}
441 	}
442 	if (sc->sc_ires == NULL) {
443 		/* XXX no interrupt resource. Force polled mode. */
444 		sc->sc_polled = 1;
445 	}
446 
447 	sc->sc_rxbufsz = 384;
448 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
449 	    M_UART, M_WAITOK);
450 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
451 	    M_UART, M_WAITOK);
452 
453 	error = UART_ATTACH(sc);
454 	if (error)
455 		goto fail;
456 
457 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
458 		sep = "";
459 		device_print_prettyname(dev);
460 		if (sc->sc_hwiflow) {
461 			printf("%sRTS iflow", sep);
462 			sep = ", ";
463 		}
464 		if (sc->sc_hwoflow) {
465 			printf("%sCTS oflow", sep);
466 			sep = ", ";
467 		}
468 		printf("\n");
469 	}
470 
471 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
472 		sep = "";
473 		device_print_prettyname(dev);
474 		if (sc->sc_fastintr) {
475 			printf("%sfast interrupt", sep);
476 			sep = ", ";
477 		}
478 		if (sc->sc_polled) {
479 			printf("%spolled mode", sep);
480 			sep = ", ";
481 		}
482 		printf("\n");
483 	}
484 
485 	if (sc->sc_sysdev != NULL) {
486 		if (sc->sc_sysdev->baudrate == 0) {
487 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
488 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
489 				sc->sc_sysdev->baudrate = -1;
490 		}
491 		switch (sc->sc_sysdev->type) {
492 		case UART_DEV_CONSOLE:
493 			device_printf(dev, "console");
494 			break;
495 		case UART_DEV_DBGPORT:
496 			device_printf(dev, "debug port");
497 			break;
498 		case UART_DEV_KEYBOARD:
499 			device_printf(dev, "keyboard");
500 			break;
501 		default:
502 			device_printf(dev, "unknown system device");
503 			break;
504 		}
505 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
506 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
507 		    sc->sc_sysdev->stopbits);
508 	}
509 
510 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
511 	pps_init(&sc->sc_pps);
512 
513 	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
514 	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
515 	if (error)
516 		goto fail;
517 
518 	if (sc->sc_sysdev != NULL)
519 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
520 
521 	sc->sc_leaving = 0;
522 	uart_intr(sc);
523 	return (0);
524 
525  fail:
526 	free(sc->sc_txbuf, M_UART);
527 	free(sc->sc_rxbuf, M_UART);
528 
529 	if (sc->sc_ires != NULL) {
530 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
531 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
532 		    sc->sc_ires);
533 	}
534 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
535 
536 	mtx_destroy(&sc->sc_hwmtx_s);
537 
538 	return (error);
539 }
540 
541 int
542 uart_bus_detach(device_t dev)
543 {
544 	struct uart_softc *sc;
545 
546 	sc = device_get_softc(dev);
547 
548 	sc->sc_leaving = 1;
549 
550 	if (sc->sc_sysdev != NULL)
551 		sc->sc_sysdev->hwmtx = NULL;
552 
553 	UART_DETACH(sc);
554 
555 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
556 		(*sc->sc_sysdev->detach)(sc);
557 	else
558 		uart_tty_detach(sc);
559 
560 	free(sc->sc_txbuf, M_UART);
561 	free(sc->sc_rxbuf, M_UART);
562 
563 	if (sc->sc_ires != NULL) {
564 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
565 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
566 		    sc->sc_ires);
567 	}
568 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
569 
570 	mtx_destroy(&sc->sc_hwmtx_s);
571 
572 	if (sc->sc_class->size > sizeof(*sc)) {
573 		device_set_softc(dev, NULL);
574 		free(sc, M_UART);
575 	} else
576 		device_set_softc(dev, NULL);
577 
578 	return (0);
579 }
580