1 /*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #ifndef KLD_MODULE 31 #include "opt_comconsole.h" 32 #endif 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bus.h> 37 #include <sys/conf.h> 38 #include <sys/cons.h> 39 #include <sys/fcntl.h> 40 #include <sys/interrupt.h> 41 #include <sys/kdb.h> 42 #include <sys/kernel.h> 43 #include <sys/malloc.h> 44 #include <sys/queue.h> 45 #include <sys/reboot.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <sys/termios.h> 49 #include <sys/tty.h> 50 #include <machine/resource.h> 51 #include <machine/stdarg.h> 52 53 #include <dev/uart/uart.h> 54 #include <dev/uart/uart_bus.h> 55 #include <dev/uart/uart_cpu.h> 56 57 #include "uart_if.h" 58 59 devclass_t uart_devclass; 60 char uart_driver_name[] = "uart"; 61 62 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 63 SLIST_HEAD_INITIALIZER(uart_sysdevs); 64 65 MALLOC_DEFINE(M_UART, "UART", "UART driver"); 66 67 void 68 uart_add_sysdev(struct uart_devinfo *di) 69 { 70 SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 71 } 72 73 /* 74 * A break condition has been detected. We treat the break condition as 75 * a special case that should not happen during normal operation. When 76 * the break condition is to be passed to higher levels in the form of 77 * a NUL character, we really want the break to be in the right place in 78 * the input stream. The overhead to achieve that is not in relation to 79 * the exceptional nature of the break condition, so we permit ourselves 80 * to be sloppy. 81 */ 82 static void 83 uart_intr_break(struct uart_softc *sc) 84 { 85 86 #if defined(KDB) && defined(BREAK_TO_DEBUGGER) 87 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 88 kdb_enter("Line break on console"); 89 return; 90 } 91 #endif 92 if (sc->sc_opened) 93 atomic_set_32(&sc->sc_ttypend, SER_INT_BREAK); 94 } 95 96 /* 97 * Handle a receiver overrun situation. We lost at least 1 byte in the 98 * input stream and it's our job to contain the situation. We grab as 99 * much of the data we can, but otherwise flush the receiver FIFO to 100 * create some breathing room. The net effect is that we avoid the 101 * overrun condition to happen for the next X characters, where X is 102 * related to the FIFO size at the cost of loosing data right away. 103 * So, instead of having multiple overrun interrupts in close proximity 104 * to each other and possibly pessimizing UART interrupt latency for 105 * other UARTs in a multiport configuration, we create a longer segment 106 * of missing characters by freeing up the FIFO. 107 * Each overrun condition is marked in the input buffer by a token. The 108 * token represents the loss of at least one, but possible more bytes in 109 * the input stream. 110 */ 111 static void 112 uart_intr_overrun(struct uart_softc *sc) 113 { 114 115 if (sc->sc_opened) { 116 UART_RECEIVE(sc); 117 if (uart_rx_put(sc, UART_STAT_OVERRUN)) 118 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 119 atomic_set_32(&sc->sc_ttypend, SER_INT_RXREADY); 120 } 121 UART_FLUSH(sc, UART_FLUSH_RECEIVER); 122 } 123 124 /* 125 * Received data ready. 126 */ 127 static void 128 uart_intr_rxready(struct uart_softc *sc) 129 { 130 int rxp; 131 132 rxp = sc->sc_rxput; 133 UART_RECEIVE(sc); 134 #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER) 135 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 136 while (rxp != sc->sc_rxput) { 137 if (kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk)) 138 kdb_enter("Break sequence on console"); 139 if (rxp == sc->sc_rxbufsz) 140 rxp = 0; 141 } 142 } 143 #endif 144 if (sc->sc_opened) 145 atomic_set_32(&sc->sc_ttypend, SER_INT_RXREADY); 146 else 147 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 148 } 149 150 /* 151 * Line or modem status change (OOB signalling). 152 * We pass the signals to the software interrupt handler for further 153 * processing. Note that we merge the delta bits, but set the state 154 * bits. This is to avoid loosing state transitions due to having more 155 * than 1 hardware interrupt between software interrupts. 156 */ 157 static void 158 uart_intr_sigchg(struct uart_softc *sc) 159 { 160 int new, old, sig; 161 162 sig = UART_GETSIG(sc); 163 164 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 165 if (sig & UART_SIG_DPPS) { 166 pps_capture(&sc->sc_pps); 167 pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? 168 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 169 } 170 } 171 172 do { 173 old = sc->sc_ttypend; 174 new = old & ~SER_MASK_STATE; 175 new |= sig & SER_INT_SIGMASK; 176 new |= SER_INT_SIGCHG; 177 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 178 } 179 180 /* 181 * The transmitter can accept more data. 182 */ 183 static void 184 uart_intr_txidle(struct uart_softc *sc) 185 { 186 if (sc->sc_txbusy) { 187 sc->sc_txbusy = 0; 188 atomic_set_32(&sc->sc_ttypend, SER_INT_TXIDLE); 189 } 190 } 191 192 static void 193 uart_intr(void *arg) 194 { 195 struct uart_softc *sc = arg; 196 int ipend; 197 198 if (sc->sc_leaving) 199 return; 200 201 do { 202 ipend = UART_IPEND(sc); 203 if (ipend == 0) 204 break; 205 if (ipend & SER_INT_OVERRUN) 206 uart_intr_overrun(sc); 207 if (ipend & SER_INT_BREAK) 208 uart_intr_break(sc); 209 if (ipend & SER_INT_RXREADY) 210 uart_intr_rxready(sc); 211 if (ipend & SER_INT_SIGCHG) 212 uart_intr_sigchg(sc); 213 if (ipend & SER_INT_TXIDLE) 214 uart_intr_txidle(sc); 215 } while (1); 216 217 if (sc->sc_opened && sc->sc_ttypend != 0) 218 swi_sched(sc->sc_softih, 0); 219 } 220 221 int 222 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 223 { 224 struct uart_softc *sc; 225 struct uart_devinfo *sysdev; 226 int error; 227 228 /* 229 * Initialize the instance. Note that the instance (=softc) does 230 * not necessarily match the hardware specific softc. We can't do 231 * anything about it now, because we may not attach to the device. 232 * Hardware drivers cannot use any of the class specific fields 233 * while probing. 234 */ 235 sc = device_get_softc(dev); 236 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 237 sc->sc_dev = dev; 238 if (device_get_desc(dev) == NULL) 239 device_set_desc(dev, sc->sc_class->name); 240 241 /* 242 * Allocate the register resource. We assume that all UARTs have 243 * a single register window in either I/O port space or memory 244 * mapped I/O space. Any UART that needs multiple windows will 245 * consequently not be supported by this driver as-is. We try I/O 246 * port space first because that's the common case. 247 */ 248 sc->sc_rrid = rid; 249 sc->sc_rtype = SYS_RES_IOPORT; 250 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 251 0, ~0, sc->sc_class->uc_range, RF_ACTIVE); 252 if (sc->sc_rres == NULL) { 253 sc->sc_rrid = rid; 254 sc->sc_rtype = SYS_RES_MEMORY; 255 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, 256 &sc->sc_rrid, 0, ~0, sc->sc_class->uc_range, RF_ACTIVE); 257 if (sc->sc_rres == NULL) 258 return (ENXIO); 259 } 260 261 /* 262 * Fill in the bus access structure and compare this device with 263 * a possible console device and/or a debug port. We set the flags 264 * in the softc so that the hardware dependent probe can adjust 265 * accordingly. In general, you don't want to permanently disrupt 266 * console I/O. 267 */ 268 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 269 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 270 sc->sc_bas.chan = chan; 271 sc->sc_bas.regshft = regshft; 272 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 273 274 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 275 if (chan == sysdev->bas.chan && 276 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 277 /* XXX check if ops matches class. */ 278 sc->sc_sysdev = sysdev; 279 break; 280 } 281 } 282 283 error = UART_PROBE(sc); 284 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 285 return ((error) ? error : BUS_PROBE_DEFAULT); 286 } 287 288 int 289 uart_bus_attach(device_t dev) 290 { 291 struct uart_softc *sc, *sc0; 292 const char *sep; 293 int error; 294 295 /* 296 * The sc_class field defines the type of UART we're going to work 297 * with and thus the size of the softc. Replace the generic softc 298 * with one that matches the UART now that we're certain we handle 299 * the device. 300 */ 301 sc0 = device_get_softc(dev); 302 if (sc0->sc_class->size > sizeof(*sc)) { 303 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 304 bcopy(sc0, sc, sizeof(*sc)); 305 device_set_softc(dev, sc); 306 } else 307 sc = sc0; 308 309 /* 310 * Protect ourselves against interrupts while we're not completely 311 * finished attaching and initializing. We don't expect interrupts 312 * until after UART_ATTACH() though. 313 */ 314 sc->sc_leaving = 1; 315 316 mtx_init(&sc->sc_hwmtx, "uart_hwmtx", NULL, MTX_SPIN); 317 318 /* 319 * Re-allocate. We expect that the softc contains the information 320 * collected by uart_bus_probe() intact. 321 */ 322 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 323 0, ~0, sc->sc_class->uc_range, RF_ACTIVE); 324 if (sc->sc_rres == NULL) { 325 mtx_destroy(&sc->sc_hwmtx); 326 return (ENXIO); 327 } 328 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 329 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 330 331 sc->sc_irid = 0; 332 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, 333 RF_ACTIVE | RF_SHAREABLE); 334 if (sc->sc_ires != NULL) { 335 error = bus_setup_intr(dev, 336 sc->sc_ires, INTR_TYPE_TTY | INTR_FAST, uart_intr, 337 sc, &sc->sc_icookie); 338 if (error) 339 error = bus_setup_intr(dev, 340 sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE, 341 uart_intr, sc, &sc->sc_icookie); 342 else 343 sc->sc_fastintr = 1; 344 345 if (error) { 346 device_printf(dev, "could not activate interrupt\n"); 347 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 348 sc->sc_ires); 349 sc->sc_ires = NULL; 350 } 351 } 352 if (sc->sc_ires == NULL) { 353 /* XXX no interrupt resource. Force polled mode. */ 354 sc->sc_polled = 1; 355 } 356 357 sc->sc_rxbufsz = IBUFSIZ; 358 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 359 M_UART, M_WAITOK); 360 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 361 M_UART, M_WAITOK); 362 363 error = UART_ATTACH(sc); 364 if (error) 365 goto fail; 366 367 if (sc->sc_hwiflow || sc->sc_hwoflow) { 368 sep = ""; 369 device_print_prettyname(dev); 370 if (sc->sc_hwiflow) { 371 printf("%sRTS iflow", sep); 372 sep = ", "; 373 } 374 if (sc->sc_hwoflow) { 375 printf("%sCTS oflow", sep); 376 sep = ", "; 377 } 378 printf("\n"); 379 } 380 381 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 382 sep = ""; 383 device_print_prettyname(dev); 384 if (sc->sc_fastintr) { 385 printf("%sfast interrupt", sep); 386 sep = ", "; 387 } 388 if (sc->sc_polled) { 389 printf("%spolled mode", sep); 390 sep = ", "; 391 } 392 printf("\n"); 393 } 394 395 if (sc->sc_sysdev != NULL) { 396 if (sc->sc_sysdev->baudrate == 0) { 397 if (UART_IOCTL(sc, UART_IOCTL_BAUD, 398 (intptr_t)&sc->sc_sysdev->baudrate) != 0) 399 sc->sc_sysdev->baudrate = -1; 400 } 401 switch (sc->sc_sysdev->type) { 402 case UART_DEV_CONSOLE: 403 device_printf(dev, "console"); 404 break; 405 case UART_DEV_DBGPORT: 406 device_printf(dev, "debug port"); 407 break; 408 case UART_DEV_KEYBOARD: 409 device_printf(dev, "keyboard"); 410 break; 411 default: 412 device_printf(dev, "unknown system device"); 413 break; 414 } 415 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 416 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 417 sc->sc_sysdev->stopbits); 418 } 419 420 sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 421 pps_init(&sc->sc_pps); 422 423 error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) 424 ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc); 425 if (error) 426 goto fail; 427 428 sc->sc_leaving = 0; 429 uart_intr(sc); 430 return (0); 431 432 fail: 433 free(sc->sc_txbuf, M_UART); 434 free(sc->sc_rxbuf, M_UART); 435 436 if (sc->sc_ires != NULL) { 437 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 438 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 439 sc->sc_ires); 440 } 441 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 442 443 mtx_destroy(&sc->sc_hwmtx); 444 445 return (error); 446 } 447 448 int 449 uart_bus_detach(device_t dev) 450 { 451 struct uart_softc *sc; 452 453 sc = device_get_softc(dev); 454 455 sc->sc_leaving = 1; 456 457 UART_DETACH(sc); 458 459 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 460 (*sc->sc_sysdev->detach)(sc); 461 else 462 uart_tty_detach(sc); 463 464 free(sc->sc_txbuf, M_UART); 465 free(sc->sc_rxbuf, M_UART); 466 467 if (sc->sc_ires != NULL) { 468 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 469 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 470 sc->sc_ires); 471 } 472 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 473 474 mtx_destroy(&sc->sc_hwmtx); 475 476 if (sc->sc_class->size > sizeof(*sc)) { 477 device_set_softc(dev, NULL); 478 free(sc, M_UART); 479 } else 480 device_set_softc(dev, NULL); 481 482 return (0); 483 } 484