1 /*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #ifndef KLD_MODULE 31 #include "opt_comconsole.h" 32 #endif 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bus.h> 37 #include <sys/conf.h> 38 #include <sys/cons.h> 39 #include <sys/fcntl.h> 40 #include <sys/interrupt.h> 41 #include <sys/kdb.h> 42 #include <sys/kernel.h> 43 #include <sys/malloc.h> 44 #include <sys/queue.h> 45 #include <sys/reboot.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <machine/resource.h> 49 #include <machine/stdarg.h> 50 51 #include <dev/uart/uart.h> 52 #include <dev/uart/uart_bus.h> 53 #include <dev/uart/uart_cpu.h> 54 55 #include "uart_if.h" 56 57 devclass_t uart_devclass; 58 char uart_driver_name[] = "uart"; 59 60 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 61 SLIST_HEAD_INITIALIZER(uart_sysdevs); 62 63 MALLOC_DEFINE(M_UART, "UART", "UART driver"); 64 65 void 66 uart_add_sysdev(struct uart_devinfo *di) 67 { 68 SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 69 } 70 71 const char * 72 uart_getname(struct uart_class *uc) 73 { 74 return ((uc != NULL) ? uc->name : NULL); 75 } 76 77 struct uart_ops * 78 uart_getops(struct uart_class *uc) 79 { 80 return ((uc != NULL) ? uc->uc_ops : NULL); 81 } 82 83 int 84 uart_getrange(struct uart_class *uc) 85 { 86 return ((uc != NULL) ? uc->uc_range : 0); 87 } 88 89 /* 90 * Schedule a soft interrupt. We do this on the 0 to !0 transition 91 * of the TTY pending interrupt status. 92 */ 93 void 94 uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 95 { 96 uint32_t new, old; 97 98 do { 99 old = sc->sc_ttypend; 100 new = old | ipend; 101 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 102 103 if ((old & SER_INT_MASK) == 0) 104 swi_sched(sc->sc_softih, 0); 105 } 106 107 /* 108 * A break condition has been detected. We treat the break condition as 109 * a special case that should not happen during normal operation. When 110 * the break condition is to be passed to higher levels in the form of 111 * a NUL character, we really want the break to be in the right place in 112 * the input stream. The overhead to achieve that is not in relation to 113 * the exceptional nature of the break condition, so we permit ourselves 114 * to be sloppy. 115 */ 116 static __inline int 117 uart_intr_break(void *arg) 118 { 119 struct uart_softc *sc = arg; 120 121 #if defined(KDB) && defined(BREAK_TO_DEBUGGER) 122 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 123 kdb_enter(KDB_WHY_BREAK, "Line break on console"); 124 return (0); 125 } 126 #endif 127 if (sc->sc_opened) 128 uart_sched_softih(sc, SER_INT_BREAK); 129 return (0); 130 } 131 132 /* 133 * Handle a receiver overrun situation. We lost at least 1 byte in the 134 * input stream and it's our job to contain the situation. We grab as 135 * much of the data we can, but otherwise flush the receiver FIFO to 136 * create some breathing room. The net effect is that we avoid the 137 * overrun condition to happen for the next X characters, where X is 138 * related to the FIFO size at the cost of loosing data right away. 139 * So, instead of having multiple overrun interrupts in close proximity 140 * to each other and possibly pessimizing UART interrupt latency for 141 * other UARTs in a multiport configuration, we create a longer segment 142 * of missing characters by freeing up the FIFO. 143 * Each overrun condition is marked in the input buffer by a token. The 144 * token represents the loss of at least one, but possible more bytes in 145 * the input stream. 146 */ 147 static __inline int 148 uart_intr_overrun(void *arg) 149 { 150 struct uart_softc *sc = arg; 151 152 if (sc->sc_opened) { 153 UART_RECEIVE(sc); 154 if (uart_rx_put(sc, UART_STAT_OVERRUN)) 155 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 156 uart_sched_softih(sc, SER_INT_RXREADY); 157 } 158 UART_FLUSH(sc, UART_FLUSH_RECEIVER); 159 return (0); 160 } 161 162 /* 163 * Received data ready. 164 */ 165 static __inline int 166 uart_intr_rxready(void *arg) 167 { 168 struct uart_softc *sc = arg; 169 int rxp; 170 171 rxp = sc->sc_rxput; 172 UART_RECEIVE(sc); 173 #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER) 174 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 175 while (rxp != sc->sc_rxput) { 176 int kdb_brk; 177 178 if ((kdb_brk = kdb_alt_break(sc->sc_rxbuf[rxp++], 179 &sc->sc_altbrk)) != 0) { 180 switch (kdb_brk) { 181 case KDB_REQ_DEBUGGER: 182 kdb_enter(KDB_WHY_BREAK, 183 "Break sequence on console"); 184 break; 185 case KDB_REQ_PANIC: 186 kdb_panic("Panic sequence on console"); 187 break; 188 case KDB_REQ_REBOOT: 189 kdb_reboot(); 190 break; 191 } 192 } 193 if (rxp == sc->sc_rxbufsz) 194 rxp = 0; 195 } 196 } 197 #endif 198 if (sc->sc_opened) 199 uart_sched_softih(sc, SER_INT_RXREADY); 200 else 201 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 202 return (1); 203 } 204 205 /* 206 * Line or modem status change (OOB signalling). 207 * We pass the signals to the software interrupt handler for further 208 * processing. Note that we merge the delta bits, but set the state 209 * bits. This is to avoid loosing state transitions due to having more 210 * than 1 hardware interrupt between software interrupts. 211 */ 212 static __inline int 213 uart_intr_sigchg(void *arg) 214 { 215 struct uart_softc *sc = arg; 216 int new, old, sig; 217 218 sig = UART_GETSIG(sc); 219 220 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 221 if (sig & UART_SIG_DPPS) { 222 pps_capture(&sc->sc_pps); 223 pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? 224 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 225 } 226 } 227 228 /* 229 * Keep track of signal changes, even when the device is not 230 * opened. This allows us to inform upper layers about a 231 * possible loss of DCD and thus the existence of a (possibly) 232 * different connection when we have DCD back, during the time 233 * that the device was closed. 234 */ 235 do { 236 old = sc->sc_ttypend; 237 new = old & ~SER_MASK_STATE; 238 new |= sig & SER_INT_SIGMASK; 239 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 240 241 if (sc->sc_opened) 242 uart_sched_softih(sc, SER_INT_SIGCHG); 243 return (1); 244 } 245 246 /* 247 * The transmitter can accept more data. 248 */ 249 static __inline int 250 uart_intr_txidle(void *arg) 251 { 252 struct uart_softc *sc = arg; 253 254 if (sc->sc_txbusy) { 255 sc->sc_txbusy = 0; 256 uart_sched_softih(sc, SER_INT_TXIDLE); 257 } 258 return (0); 259 } 260 261 static int 262 uart_intr(void *arg) 263 { 264 struct uart_softc *sc = arg; 265 int flag = 0, ipend; 266 267 while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) { 268 flag = 1; 269 if (ipend & SER_INT_OVERRUN) 270 uart_intr_overrun(sc); 271 if (ipend & SER_INT_BREAK) 272 uart_intr_break(sc); 273 if (ipend & SER_INT_RXREADY) 274 uart_intr_rxready(sc); 275 if (ipend & SER_INT_SIGCHG) 276 uart_intr_sigchg(sc); 277 if (ipend & SER_INT_TXIDLE) 278 uart_intr_txidle(sc); 279 } 280 return((flag)?FILTER_HANDLED:FILTER_STRAY); 281 } 282 283 serdev_intr_t * 284 uart_bus_ihand(device_t dev, int ipend) 285 { 286 287 switch (ipend) { 288 case SER_INT_BREAK: 289 return (uart_intr_break); 290 case SER_INT_OVERRUN: 291 return (uart_intr_overrun); 292 case SER_INT_RXREADY: 293 return (uart_intr_rxready); 294 case SER_INT_SIGCHG: 295 return (uart_intr_sigchg); 296 case SER_INT_TXIDLE: 297 return (uart_intr_txidle); 298 } 299 return (NULL); 300 } 301 302 int 303 uart_bus_ipend(device_t dev) 304 { 305 struct uart_softc *sc; 306 307 sc = device_get_softc(dev); 308 return (UART_IPEND(sc)); 309 } 310 311 int 312 uart_bus_sysdev(device_t dev) 313 { 314 struct uart_softc *sc; 315 316 sc = device_get_softc(dev); 317 return ((sc->sc_sysdev != NULL) ? 1 : 0); 318 } 319 320 int 321 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 322 { 323 struct uart_softc *sc; 324 struct uart_devinfo *sysdev; 325 int error; 326 327 sc = device_get_softc(dev); 328 329 /* 330 * All uart_class references are weak. Check that the needed 331 * class has been compiled-in. Fail if not. 332 */ 333 if (sc->sc_class == NULL) 334 return (ENXIO); 335 336 /* 337 * Initialize the instance. Note that the instance (=softc) does 338 * not necessarily match the hardware specific softc. We can't do 339 * anything about it now, because we may not attach to the device. 340 * Hardware drivers cannot use any of the class specific fields 341 * while probing. 342 */ 343 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 344 sc->sc_dev = dev; 345 if (device_get_desc(dev) == NULL) 346 device_set_desc(dev, uart_getname(sc->sc_class)); 347 348 /* 349 * Allocate the register resource. We assume that all UARTs have 350 * a single register window in either I/O port space or memory 351 * mapped I/O space. Any UART that needs multiple windows will 352 * consequently not be supported by this driver as-is. We try I/O 353 * port space first because that's the common case. 354 */ 355 sc->sc_rrid = rid; 356 sc->sc_rtype = SYS_RES_IOPORT; 357 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 358 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 359 if (sc->sc_rres == NULL) { 360 sc->sc_rrid = rid; 361 sc->sc_rtype = SYS_RES_MEMORY; 362 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, 363 &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), 364 RF_ACTIVE); 365 if (sc->sc_rres == NULL) 366 return (ENXIO); 367 } 368 369 /* 370 * Fill in the bus access structure and compare this device with 371 * a possible console device and/or a debug port. We set the flags 372 * in the softc so that the hardware dependent probe can adjust 373 * accordingly. In general, you don't want to permanently disrupt 374 * console I/O. 375 */ 376 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 377 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 378 sc->sc_bas.chan = chan; 379 sc->sc_bas.regshft = regshft; 380 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 381 382 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 383 if (chan == sysdev->bas.chan && 384 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 385 /* XXX check if ops matches class. */ 386 sc->sc_sysdev = sysdev; 387 sysdev->bas.rclk = sc->sc_bas.rclk; 388 } 389 } 390 391 error = UART_PROBE(sc); 392 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 393 return ((error) ? error : BUS_PROBE_DEFAULT); 394 } 395 396 int 397 uart_bus_attach(device_t dev) 398 { 399 struct uart_softc *sc, *sc0; 400 const char *sep; 401 int error; 402 403 /* 404 * The sc_class field defines the type of UART we're going to work 405 * with and thus the size of the softc. Replace the generic softc 406 * with one that matches the UART now that we're certain we handle 407 * the device. 408 */ 409 sc0 = device_get_softc(dev); 410 if (sc0->sc_class->size > sizeof(*sc)) { 411 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 412 bcopy(sc0, sc, sizeof(*sc)); 413 device_set_softc(dev, sc); 414 } else 415 sc = sc0; 416 417 /* 418 * Protect ourselves against interrupts while we're not completely 419 * finished attaching and initializing. We don't expect interrupts 420 * until after UART_ATTACH() though. 421 */ 422 sc->sc_leaving = 1; 423 424 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 425 if (sc->sc_hwmtx == NULL) 426 sc->sc_hwmtx = &sc->sc_hwmtx_s; 427 428 /* 429 * Re-allocate. We expect that the softc contains the information 430 * collected by uart_bus_probe() intact. 431 */ 432 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 433 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 434 if (sc->sc_rres == NULL) { 435 mtx_destroy(&sc->sc_hwmtx_s); 436 return (ENXIO); 437 } 438 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 439 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 440 441 sc->sc_irid = 0; 442 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, 443 RF_ACTIVE | RF_SHAREABLE); 444 if (sc->sc_ires != NULL) { 445 error = bus_setup_intr(dev, 446 sc->sc_ires, INTR_TYPE_TTY, 447 uart_intr, NULL, sc, &sc->sc_icookie); 448 if (error) 449 error = bus_setup_intr(dev, 450 sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE, 451 NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 452 else 453 sc->sc_fastintr = 1; 454 455 if (error) { 456 device_printf(dev, "could not activate interrupt\n"); 457 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 458 sc->sc_ires); 459 sc->sc_ires = NULL; 460 } 461 } 462 if (sc->sc_ires == NULL) { 463 /* XXX no interrupt resource. Force polled mode. */ 464 sc->sc_polled = 1; 465 } 466 467 sc->sc_rxbufsz = 384; 468 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 469 M_UART, M_WAITOK); 470 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 471 M_UART, M_WAITOK); 472 473 error = UART_ATTACH(sc); 474 if (error) 475 goto fail; 476 477 if (sc->sc_hwiflow || sc->sc_hwoflow) { 478 sep = ""; 479 device_print_prettyname(dev); 480 if (sc->sc_hwiflow) { 481 printf("%sRTS iflow", sep); 482 sep = ", "; 483 } 484 if (sc->sc_hwoflow) { 485 printf("%sCTS oflow", sep); 486 sep = ", "; 487 } 488 printf("\n"); 489 } 490 491 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 492 sep = ""; 493 device_print_prettyname(dev); 494 if (sc->sc_fastintr) { 495 printf("%sfast interrupt", sep); 496 sep = ", "; 497 } 498 if (sc->sc_polled) { 499 printf("%spolled mode", sep); 500 sep = ", "; 501 } 502 printf("\n"); 503 } 504 505 if (sc->sc_sysdev != NULL) { 506 if (sc->sc_sysdev->baudrate == 0) { 507 if (UART_IOCTL(sc, UART_IOCTL_BAUD, 508 (intptr_t)&sc->sc_sysdev->baudrate) != 0) 509 sc->sc_sysdev->baudrate = -1; 510 } 511 switch (sc->sc_sysdev->type) { 512 case UART_DEV_CONSOLE: 513 device_printf(dev, "console"); 514 break; 515 case UART_DEV_DBGPORT: 516 device_printf(dev, "debug port"); 517 break; 518 case UART_DEV_KEYBOARD: 519 device_printf(dev, "keyboard"); 520 break; 521 default: 522 device_printf(dev, "unknown system device"); 523 break; 524 } 525 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 526 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 527 sc->sc_sysdev->stopbits); 528 } 529 530 sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 531 pps_init(&sc->sc_pps); 532 533 error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) 534 ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc); 535 if (error) 536 goto fail; 537 538 if (sc->sc_sysdev != NULL) 539 sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 540 541 sc->sc_leaving = 0; 542 uart_intr(sc); 543 return (0); 544 545 fail: 546 free(sc->sc_txbuf, M_UART); 547 free(sc->sc_rxbuf, M_UART); 548 549 if (sc->sc_ires != NULL) { 550 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 551 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 552 sc->sc_ires); 553 } 554 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 555 556 mtx_destroy(&sc->sc_hwmtx_s); 557 558 return (error); 559 } 560 561 int 562 uart_bus_detach(device_t dev) 563 { 564 struct uart_softc *sc; 565 566 sc = device_get_softc(dev); 567 568 sc->sc_leaving = 1; 569 570 if (sc->sc_sysdev != NULL) 571 sc->sc_sysdev->hwmtx = NULL; 572 573 UART_DETACH(sc); 574 575 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 576 (*sc->sc_sysdev->detach)(sc); 577 else 578 uart_tty_detach(sc); 579 580 free(sc->sc_txbuf, M_UART); 581 free(sc->sc_rxbuf, M_UART); 582 583 if (sc->sc_ires != NULL) { 584 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 585 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 586 sc->sc_ires); 587 } 588 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 589 590 mtx_destroy(&sc->sc_hwmtx_s); 591 592 if (sc->sc_class->size > sizeof(*sc)) { 593 device_set_softc(dev, NULL); 594 free(sc, M_UART); 595 } else 596 device_set_softc(dev, NULL); 597 598 return (0); 599 } 600