1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2003 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/cons.h> 35 #include <sys/fcntl.h> 36 #include <sys/interrupt.h> 37 #include <sys/kdb.h> 38 #include <sys/kernel.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/reboot.h> 42 #include <sys/sysctl.h> 43 #include <machine/bus.h> 44 #include <sys/rman.h> 45 #include <machine/resource.h> 46 #include <machine/stdarg.h> 47 48 #include <dev/uart/uart.h> 49 #include <dev/uart/uart_bus.h> 50 #include <dev/uart/uart_cpu.h> 51 #include <dev/uart/uart_ppstypes.h> 52 53 #include "uart_if.h" 54 55 const char uart_driver_name[] = "uart"; 56 57 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 58 SLIST_HEAD_INITIALIZER(uart_sysdevs); 59 60 static MALLOC_DEFINE(M_UART, "UART", "UART driver"); 61 62 #ifndef UART_POLL_FREQ 63 #define UART_POLL_FREQ 50 64 #endif 65 static int uart_poll_freq = UART_POLL_FREQ; 66 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq, 67 0, "UART poll frequency"); 68 69 static int uart_force_poll; 70 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll, 71 0, "Force UART polling"); 72 73 static inline int 74 uart_pps_mode_valid(int pps_mode) 75 { 76 int opt; 77 78 switch(pps_mode & UART_PPS_SIGNAL_MASK) { 79 case UART_PPS_DISABLED: 80 case UART_PPS_CTS: 81 case UART_PPS_DCD: 82 break; 83 default: 84 return (false); 85 } 86 87 opt = pps_mode & UART_PPS_OPTION_MASK; 88 if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0) 89 return (false); 90 91 return (true); 92 } 93 94 static void 95 uart_pps_print_mode(struct uart_softc *sc) 96 { 97 98 device_printf(sc->sc_dev, "PPS capture mode: "); 99 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 100 case UART_PPS_DISABLED: 101 printf("disabled"); 102 break; 103 case UART_PPS_CTS: 104 printf("CTS"); 105 break; 106 case UART_PPS_DCD: 107 printf("DCD"); 108 break; 109 default: 110 printf("invalid"); 111 break; 112 } 113 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 114 printf("-Inverted"); 115 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) 116 printf("-NarrowPulse"); 117 printf("\n"); 118 } 119 120 static int 121 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS) 122 { 123 struct uart_softc *sc; 124 int err, tmp; 125 126 sc = arg1; 127 tmp = sc->sc_pps_mode; 128 err = sysctl_handle_int(oidp, &tmp, 0, req); 129 if (err != 0 || req->newptr == NULL) 130 return (err); 131 if (!uart_pps_mode_valid(tmp)) 132 return (EINVAL); 133 sc->sc_pps_mode = tmp; 134 return(0); 135 } 136 137 static void 138 uart_pps_process(struct uart_softc *sc, int ser_sig) 139 { 140 sbintime_t now; 141 int is_assert, pps_sig; 142 143 /* Which signal is configured as PPS? Early out if none. */ 144 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 145 case UART_PPS_CTS: 146 pps_sig = SER_CTS; 147 break; 148 case UART_PPS_DCD: 149 pps_sig = SER_DCD; 150 break; 151 default: 152 return; 153 } 154 155 /* Early out if there is no change in the signal configured as PPS. */ 156 if ((ser_sig & SER_DELTA(pps_sig)) == 0) 157 return; 158 159 /* 160 * In narrow-pulse mode we need to synthesize both capture and clear 161 * events from a single "delta occurred" indication from the uart 162 * hardware because the pulse width is too narrow to reliably detect 163 * both edges. However, when the pulse width is close to our interrupt 164 * processing latency we might intermittantly catch both edges. To 165 * guard against generating spurious events when that happens, we use a 166 * separate timer to ensure at least half a second elapses before we 167 * generate another event. 168 */ 169 pps_capture(&sc->sc_pps); 170 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) { 171 now = getsbinuptime(); 172 if (now > sc->sc_pps_captime + 500 * SBT_1MS) { 173 sc->sc_pps_captime = now; 174 pps_event(&sc->sc_pps, PPS_CAPTUREASSERT); 175 pps_event(&sc->sc_pps, PPS_CAPTURECLEAR); 176 } 177 } else { 178 is_assert = ser_sig & pps_sig; 179 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 180 is_assert = !is_assert; 181 pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT : 182 PPS_CAPTURECLEAR); 183 } 184 } 185 186 static void 187 uart_pps_init(struct uart_softc *sc) 188 { 189 struct sysctl_ctx_list *ctx; 190 struct sysctl_oid *tree; 191 192 ctx = device_get_sysctl_ctx(sc->sc_dev); 193 tree = device_get_sysctl_tree(sc->sc_dev); 194 195 /* 196 * The historical default for pps capture mode is either DCD or CTS, 197 * depending on the UART_PPS_ON_CTS kernel option. Start with that, 198 * then try to fetch the tunable that overrides the mode for all uart 199 * devices, then try to fetch the sysctl-tunable that overrides the mode 200 * for one specific device. 201 */ 202 #ifdef UART_PPS_ON_CTS 203 sc->sc_pps_mode = UART_PPS_CTS; 204 #else 205 sc->sc_pps_mode = UART_PPS_DCD; 206 #endif 207 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode); 208 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode", 209 CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, sc, 0, 210 uart_pps_mode_sysctl, "I", "pulse mode: 0/1/2=disabled/CTS/DCD; " 211 "add 0x10 to invert, 0x20 for narrow pulse"); 212 213 if (!uart_pps_mode_valid(sc->sc_pps_mode)) { 214 device_printf(sc->sc_dev, 215 "Invalid pps_mode 0x%02x configured; disabling PPS capture\n", 216 sc->sc_pps_mode); 217 sc->sc_pps_mode = UART_PPS_DISABLED; 218 } else if (bootverbose) { 219 uart_pps_print_mode(sc); 220 } 221 222 sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 223 sc->sc_pps.driver_mtx = uart_tty_getlock(sc); 224 sc->sc_pps.driver_abi = PPS_ABI_VERSION; 225 pps_init_abi(&sc->sc_pps); 226 } 227 228 void 229 uart_add_sysdev(struct uart_devinfo *di) 230 { 231 SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 232 } 233 234 const char * 235 uart_getname(struct uart_class *uc) 236 { 237 return ((uc != NULL) ? uc->name : NULL); 238 } 239 240 struct uart_ops * 241 uart_getops(struct uart_class *uc) 242 { 243 return ((uc != NULL) ? uc->uc_ops : NULL); 244 } 245 246 int 247 uart_getrange(struct uart_class *uc) 248 { 249 return ((uc != NULL) ? uc->uc_range : 0); 250 } 251 252 u_int 253 uart_getregshift(struct uart_class *uc) 254 { 255 return ((uc != NULL) ? uc->uc_rshift : 0); 256 } 257 258 u_int 259 uart_getregiowidth(struct uart_class *uc) 260 { 261 return ((uc != NULL) ? uc->uc_riowidth : 0); 262 } 263 264 /* 265 * Schedule a soft interrupt. We do this on the 0 to !0 transition 266 * of the TTY pending interrupt status. 267 */ 268 void 269 uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 270 { 271 uint32_t new, old; 272 273 do { 274 old = sc->sc_ttypend; 275 new = old | ipend; 276 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 277 278 if ((old & SER_INT_MASK) == 0) 279 swi_sched(sc->sc_softih, 0); 280 } 281 282 /* 283 * A break condition has been detected. We treat the break condition as 284 * a special case that should not happen during normal operation. When 285 * the break condition is to be passed to higher levels in the form of 286 * a NUL character, we really want the break to be in the right place in 287 * the input stream. The overhead to achieve that is not in relation to 288 * the exceptional nature of the break condition, so we permit ourselves 289 * to be sloppy. 290 */ 291 static __inline int 292 uart_intr_break(void *arg) 293 { 294 struct uart_softc *sc = arg; 295 296 #if defined(KDB) 297 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 298 if (kdb_break()) 299 return (0); 300 } 301 #endif 302 if (sc->sc_opened) 303 uart_sched_softih(sc, SER_INT_BREAK); 304 return (0); 305 } 306 307 /* 308 * Handle a receiver overrun situation. We lost at least 1 byte in the 309 * input stream and it's our job to contain the situation. We grab as 310 * much of the data we can, but otherwise flush the receiver FIFO to 311 * create some breathing room. The net effect is that we avoid the 312 * overrun condition to happen for the next X characters, where X is 313 * related to the FIFO size at the cost of losing data right away. 314 * So, instead of having multiple overrun interrupts in close proximity 315 * to each other and possibly pessimizing UART interrupt latency for 316 * other UARTs in a multiport configuration, we create a longer segment 317 * of missing characters by freeing up the FIFO. 318 * Each overrun condition is marked in the input buffer by a token. The 319 * token represents the loss of at least one, but possible more bytes in 320 * the input stream. 321 */ 322 static __inline int 323 uart_intr_overrun(void *arg) 324 { 325 struct uart_softc *sc = arg; 326 327 if (sc->sc_opened) { 328 UART_RECEIVE(sc); 329 if (uart_rx_put(sc, UART_STAT_OVERRUN)) 330 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 331 uart_sched_softih(sc, SER_INT_RXREADY); 332 } 333 sc->sc_rxoverruns++; 334 UART_FLUSH(sc, UART_FLUSH_RECEIVER); 335 return (0); 336 } 337 338 /* 339 * Received data ready. 340 */ 341 static __inline int 342 uart_intr_rxready(void *arg) 343 { 344 struct uart_softc *sc = arg; 345 #if defined(KDB) 346 int rxp; 347 348 rxp = sc->sc_rxput; 349 #endif 350 UART_RECEIVE(sc); 351 #if defined(KDB) 352 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 353 while (rxp != sc->sc_rxput) { 354 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); 355 if (rxp == sc->sc_rxbufsz) 356 rxp = 0; 357 } 358 } 359 #endif 360 if (sc->sc_opened) 361 uart_sched_softih(sc, SER_INT_RXREADY); 362 else 363 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 364 return (1); 365 } 366 367 /* 368 * Line or modem status change (OOB signalling). 369 * We pass the signals to the software interrupt handler for further 370 * processing. Note that we merge the delta bits, but set the state 371 * bits. This is to avoid losing state transitions due to having more 372 * than 1 hardware interrupt between software interrupts. 373 */ 374 static __inline int 375 uart_intr_sigchg(void *arg) 376 { 377 struct uart_softc *sc = arg; 378 int new, old, sig; 379 380 sig = UART_GETSIG(sc); 381 382 /* 383 * Time pulse counting support, invoked whenever the PPS parameters are 384 * currently set to capture either edge of the signal. 385 */ 386 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 387 uart_pps_process(sc, sig); 388 } 389 390 /* 391 * Keep track of signal changes, even when the device is not 392 * opened. This allows us to inform upper layers about a 393 * possible loss of DCD and thus the existence of a (possibly) 394 * different connection when we have DCD back, during the time 395 * that the device was closed. 396 */ 397 do { 398 old = sc->sc_ttypend; 399 new = old & ~SER_MASK_STATE; 400 new |= sig & SER_INT_SIGMASK; 401 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 402 403 if (sc->sc_opened) 404 uart_sched_softih(sc, SER_INT_SIGCHG); 405 return (1); 406 } 407 408 /* 409 * The transmitter can accept more data. 410 */ 411 static __inline int 412 uart_intr_txidle(void *arg) 413 { 414 struct uart_softc *sc = arg; 415 416 if (sc->sc_txbusy) { 417 sc->sc_txbusy = 0; 418 uart_sched_softih(sc, SER_INT_TXIDLE); 419 } 420 return (0); 421 } 422 423 static int 424 uart_intr(void *arg) 425 { 426 struct uart_softc *sc = arg; 427 int cnt, ipend, testintr; 428 429 if (sc->sc_leaving) 430 return (FILTER_STRAY); 431 432 cnt = 0; 433 testintr = sc->sc_testintr; 434 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) { 435 cnt++; 436 if (ipend & SER_INT_OVERRUN) 437 uart_intr_overrun(sc); 438 if (ipend & SER_INT_BREAK) 439 uart_intr_break(sc); 440 if (ipend & SER_INT_RXREADY) 441 uart_intr_rxready(sc); 442 if (ipend & SER_INT_SIGCHG) 443 uart_intr_sigchg(sc); 444 if (ipend & SER_INT_TXIDLE) 445 uart_intr_txidle(sc); 446 } 447 448 if (sc->sc_polled) { 449 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 450 (callout_func_t *)uart_intr, sc); 451 } 452 453 return ((cnt == 0) ? FILTER_STRAY : 454 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD : 455 FILTER_HANDLED)); 456 } 457 458 serdev_intr_t * 459 uart_bus_ihand(device_t dev, int ipend) 460 { 461 462 switch (ipend) { 463 case SER_INT_BREAK: 464 return (uart_intr_break); 465 case SER_INT_OVERRUN: 466 return (uart_intr_overrun); 467 case SER_INT_RXREADY: 468 return (uart_intr_rxready); 469 case SER_INT_SIGCHG: 470 return (uart_intr_sigchg); 471 case SER_INT_TXIDLE: 472 return (uart_intr_txidle); 473 } 474 return (NULL); 475 } 476 477 int 478 uart_bus_ipend(device_t dev) 479 { 480 struct uart_softc *sc; 481 482 sc = device_get_softc(dev); 483 return (UART_IPEND(sc)); 484 } 485 486 int 487 uart_bus_sysdev(device_t dev) 488 { 489 struct uart_softc *sc; 490 491 sc = device_get_softc(dev); 492 return ((sc->sc_sysdev != NULL) ? 1 : 0); 493 } 494 495 int 496 uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan, int quirks) 497 { 498 struct uart_softc *sc; 499 struct uart_devinfo *sysdev; 500 int error; 501 502 sc = device_get_softc(dev); 503 504 /* 505 * All uart_class references are weak. Check that the needed 506 * class has been compiled-in. Fail if not. 507 */ 508 if (sc->sc_class == NULL) 509 return (ENXIO); 510 511 /* 512 * Initialize the instance. Note that the instance (=softc) does 513 * not necessarily match the hardware specific softc. We can't do 514 * anything about it now, because we may not attach to the device. 515 * Hardware drivers cannot use any of the class specific fields 516 * while probing. 517 */ 518 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 519 sc->sc_dev = dev; 520 if (device_get_desc(dev) == NULL) 521 device_set_desc(dev, uart_getname(sc->sc_class)); 522 523 /* 524 * Allocate the register resource. We assume that all UARTs have 525 * a single register window in either I/O port space or memory 526 * mapped I/O space. Any UART that needs multiple windows will 527 * consequently not be supported by this driver as-is. We try I/O 528 * port space first because that's the common case. 529 */ 530 sc->sc_rrid = rid; 531 sc->sc_rtype = SYS_RES_IOPORT; 532 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 533 RF_ACTIVE); 534 if (sc->sc_rres == NULL) { 535 sc->sc_rrid = rid; 536 sc->sc_rtype = SYS_RES_MEMORY; 537 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, 538 &sc->sc_rrid, RF_ACTIVE); 539 if (sc->sc_rres == NULL) 540 return (ENXIO); 541 } 542 543 /* 544 * Fill in the bus access structure and compare this device with 545 * a possible console device and/or a debug port. We set the flags 546 * in the softc so that the hardware dependent probe can adjust 547 * accordingly. In general, you don't want to permanently disrupt 548 * console I/O. 549 */ 550 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 551 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 552 sc->sc_bas.chan = chan; 553 sc->sc_bas.regshft = regshft; 554 sc->sc_bas.regiowidth = regiowidth; 555 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 556 sc->sc_bas.busy_detect = !!(quirks & UART_F_BUSY_DETECT); 557 558 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 559 if (chan == sysdev->bas.chan && 560 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 561 /* XXX check if ops matches class. */ 562 sc->sc_sysdev = sysdev; 563 sysdev->bas.rclk = sc->sc_bas.rclk; 564 } 565 } 566 567 error = UART_PROBE(sc); 568 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 569 return ((error) ? error : BUS_PROBE_DEFAULT); 570 } 571 572 int 573 uart_bus_attach(device_t dev) 574 { 575 struct uart_softc *sc, *sc0; 576 const char *sep; 577 int error, filt; 578 579 /* 580 * The sc_class field defines the type of UART we're going to work 581 * with and thus the size of the softc. Replace the generic softc 582 * with one that matches the UART now that we're certain we handle 583 * the device. 584 */ 585 sc0 = device_get_softc(dev); 586 if (sc0->sc_class->size > device_get_driver(dev)->size) { 587 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 588 bcopy(sc0, sc, sizeof(*sc)); 589 device_set_softc(dev, sc); 590 } else 591 sc = sc0; 592 593 /* 594 * Now that we know the softc for this device, connect the back 595 * pointer from the sysdev for this device, if any 596 */ 597 if (sc->sc_sysdev != NULL) 598 sc->sc_sysdev->sc = sc; 599 600 /* 601 * Protect ourselves against interrupts while we're not completely 602 * finished attaching and initializing. We don't expect interrupts 603 * until after UART_ATTACH(), though. 604 */ 605 sc->sc_leaving = 1; 606 607 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 608 if (sc->sc_hwmtx == NULL) 609 sc->sc_hwmtx = &sc->sc_hwmtx_s; 610 611 /* 612 * Re-allocate. We expect that the softc contains the information 613 * collected by uart_bus_probe() intact. 614 */ 615 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 616 RF_ACTIVE); 617 if (sc->sc_rres == NULL) { 618 mtx_destroy(&sc->sc_hwmtx_s); 619 return (ENXIO); 620 } 621 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 622 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 623 624 /* 625 * Ensure there is room for at least three full FIFOs of data in the 626 * receive buffer (handles the case of low-level drivers with huge 627 * FIFOs), and also ensure that there is no less than the historical 628 * size of 384 bytes (handles the typical small-FIFO case). 629 */ 630 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); 631 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 632 M_UART, M_WAITOK); 633 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 634 M_UART, M_WAITOK); 635 636 error = UART_ATTACH(sc); 637 if (error) 638 goto fail; 639 640 if (sc->sc_hwiflow || sc->sc_hwoflow) { 641 sep = ""; 642 device_print_prettyname(dev); 643 if (sc->sc_hwiflow) { 644 printf("%sRTS iflow", sep); 645 sep = ", "; 646 } 647 if (sc->sc_hwoflow) { 648 printf("%sCTS oflow", sep); 649 sep = ", "; 650 } 651 printf("\n"); 652 } 653 654 if (sc->sc_sysdev != NULL) { 655 if (sc->sc_sysdev->baudrate == 0) { 656 if (UART_IOCTL(sc, UART_IOCTL_BAUD, 657 (intptr_t)&sc->sc_sysdev->baudrate) != 0) 658 sc->sc_sysdev->baudrate = -1; 659 } 660 switch (sc->sc_sysdev->type) { 661 case UART_DEV_CONSOLE: 662 device_printf(dev, "console"); 663 break; 664 case UART_DEV_DBGPORT: 665 device_printf(dev, "debug port"); 666 break; 667 case UART_DEV_KEYBOARD: 668 device_printf(dev, "keyboard"); 669 break; 670 default: 671 device_printf(dev, "unknown system device"); 672 break; 673 } 674 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 675 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 676 sc->sc_sysdev->stopbits); 677 } 678 679 sc->sc_leaving = 0; 680 sc->sc_testintr = 1; 681 filt = uart_intr(sc); 682 sc->sc_testintr = 0; 683 684 /* 685 * Don't use interrupts if we couldn't clear any pending interrupt 686 * conditions. We may have broken H/W and polling is probably the 687 * safest thing to do. 688 */ 689 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) { 690 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, 691 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); 692 } 693 if (sc->sc_ires != NULL) { 694 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, 695 uart_intr, NULL, sc, &sc->sc_icookie); 696 sc->sc_fastintr = (error == 0) ? 1 : 0; 697 698 if (!sc->sc_fastintr) 699 error = bus_setup_intr(dev, sc->sc_ires, 700 INTR_TYPE_TTY | INTR_MPSAFE, NULL, 701 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 702 703 if (error) { 704 device_printf(dev, "could not activate interrupt\n"); 705 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 706 sc->sc_ires); 707 sc->sc_ires = NULL; 708 } 709 } 710 if (sc->sc_ires == NULL) { 711 /* No interrupt resource. Force polled mode. */ 712 sc->sc_polled = 1; 713 callout_init(&sc->sc_timer, 1); 714 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 715 (callout_func_t *)uart_intr, sc); 716 } 717 718 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 719 sep = ""; 720 device_print_prettyname(dev); 721 if (sc->sc_fastintr) { 722 printf("%sfast interrupt", sep); 723 sep = ", "; 724 } 725 if (sc->sc_polled) { 726 printf("%spolled mode (%dHz)", sep, uart_poll_freq); 727 sep = ", "; 728 } 729 printf("\n"); 730 } 731 732 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) { 733 if ((error = sc->sc_sysdev->attach(sc)) != 0) 734 goto fail; 735 } else { 736 if ((error = uart_tty_attach(sc)) != 0) 737 goto fail; 738 uart_pps_init(sc); 739 } 740 741 if (sc->sc_sysdev != NULL) 742 sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 743 744 if (sc->sc_rxfifosz > 1) 745 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 746 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 747 "rx_overruns", CTLFLAG_RD, &sc->sc_rxoverruns, 0, 748 "Receive overruns"); 749 750 return (0); 751 752 fail: 753 free(sc->sc_txbuf, M_UART); 754 free(sc->sc_rxbuf, M_UART); 755 756 if (sc->sc_ires != NULL) { 757 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 758 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 759 sc->sc_ires); 760 } 761 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 762 763 mtx_destroy(&sc->sc_hwmtx_s); 764 765 return (error); 766 } 767 768 int 769 uart_bus_detach(device_t dev) 770 { 771 struct uart_softc *sc; 772 773 sc = device_get_softc(dev); 774 775 sc->sc_leaving = 1; 776 777 if (sc->sc_sysdev != NULL) 778 sc->sc_sysdev->hwmtx = NULL; 779 780 UART_DETACH(sc); 781 782 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 783 (*sc->sc_sysdev->detach)(sc); 784 else 785 uart_tty_detach(sc); 786 787 free(sc->sc_txbuf, M_UART); 788 free(sc->sc_rxbuf, M_UART); 789 790 if (sc->sc_ires != NULL) { 791 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 792 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 793 sc->sc_ires); 794 } 795 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 796 797 mtx_destroy(&sc->sc_hwmtx_s); 798 799 if (sc->sc_class->size > device_get_driver(dev)->size) { 800 device_set_softc(dev, NULL); 801 free(sc, M_UART); 802 } 803 804 return (0); 805 } 806 807 int 808 uart_bus_resume(device_t dev) 809 { 810 struct uart_softc *sc; 811 812 sc = device_get_softc(dev); 813 return (UART_ATTACH(sc)); 814 } 815 816 void 817 uart_grab(struct uart_devinfo *di) 818 { 819 820 if (di->sc) 821 UART_GRAB(di->sc); 822 } 823 824 void 825 uart_ungrab(struct uart_devinfo *di) 826 { 827 828 if (di->sc) 829 UART_UNGRAB(di->sc); 830 } 831