1 /*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/cons.h> 35 #include <sys/fcntl.h> 36 #include <sys/interrupt.h> 37 #include <sys/kdb.h> 38 #include <sys/kernel.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/reboot.h> 42 #include <sys/sysctl.h> 43 #include <machine/bus.h> 44 #include <sys/rman.h> 45 #include <machine/resource.h> 46 #include <machine/stdarg.h> 47 48 #include <dev/uart/uart.h> 49 #include <dev/uart/uart_bus.h> 50 #include <dev/uart/uart_cpu.h> 51 #include <dev/uart/uart_ppstypes.h> 52 53 #include "uart_if.h" 54 55 devclass_t uart_devclass; 56 const char uart_driver_name[] = "uart"; 57 58 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 59 SLIST_HEAD_INITIALIZER(uart_sysdevs); 60 61 static MALLOC_DEFINE(M_UART, "UART", "UART driver"); 62 63 #ifndef UART_POLL_FREQ 64 #define UART_POLL_FREQ 50 65 #endif 66 static int uart_poll_freq = UART_POLL_FREQ; 67 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq, 68 0, "UART poll frequency"); 69 70 static int uart_force_poll; 71 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll, 72 0, "Force UART polling"); 73 74 static inline int 75 uart_pps_mode_valid(int pps_mode) 76 { 77 int opt; 78 79 switch(pps_mode & UART_PPS_SIGNAL_MASK) { 80 case UART_PPS_DISABLED: 81 case UART_PPS_CTS: 82 case UART_PPS_DCD: 83 break; 84 default: 85 return (false); 86 } 87 88 opt = pps_mode & UART_PPS_OPTION_MASK; 89 if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0) 90 return (false); 91 92 return (true); 93 } 94 95 static void 96 uart_pps_print_mode(struct uart_softc *sc) 97 { 98 99 device_printf(sc->sc_dev, "PPS capture mode: "); 100 switch(sc->sc_pps_mode) { 101 case UART_PPS_DISABLED: 102 printf("disabled"); 103 case UART_PPS_CTS: 104 printf("CTS"); 105 case UART_PPS_DCD: 106 printf("DCD"); 107 default: 108 printf("invalid"); 109 } 110 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 111 printf("-Inverted"); 112 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) 113 printf("-NarrowPulse"); 114 printf("\n"); 115 } 116 117 static int 118 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS) 119 { 120 struct uart_softc *sc; 121 int err, tmp; 122 123 sc = arg1; 124 tmp = sc->sc_pps_mode; 125 err = sysctl_handle_int(oidp, &tmp, 0, req); 126 if (err != 0 || req->newptr == NULL) 127 return (err); 128 if (!uart_pps_mode_valid(tmp)) 129 return (EINVAL); 130 sc->sc_pps_mode = tmp; 131 return(0); 132 } 133 134 static void 135 uart_pps_process(struct uart_softc *sc, int ser_sig) 136 { 137 sbintime_t now; 138 int is_assert, pps_sig; 139 140 /* Which signal is configured as PPS? Early out if none. */ 141 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 142 case UART_PPS_CTS: 143 pps_sig = SER_CTS; 144 break; 145 case UART_PPS_DCD: 146 pps_sig = SER_DCD; 147 break; 148 default: 149 return; 150 } 151 152 /* Early out if there is no change in the signal configured as PPS. */ 153 if ((ser_sig & SER_DELTA(pps_sig)) == 0) 154 return; 155 156 /* 157 * In narrow-pulse mode we need to synthesize both capture and clear 158 * events from a single "delta occurred" indication from the uart 159 * hardware because the pulse width is too narrow to reliably detect 160 * both edges. However, when the pulse width is close to our interrupt 161 * processing latency we might intermittantly catch both edges. To 162 * guard against generating spurious events when that happens, we use a 163 * separate timer to ensure at least half a second elapses before we 164 * generate another event. 165 */ 166 pps_capture(&sc->sc_pps); 167 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) { 168 now = getsbinuptime(); 169 if (now > sc->sc_pps_captime + 500 * SBT_1MS) { 170 sc->sc_pps_captime = now; 171 pps_event(&sc->sc_pps, PPS_CAPTUREASSERT); 172 pps_event(&sc->sc_pps, PPS_CAPTURECLEAR); 173 } 174 } else { 175 is_assert = ser_sig & pps_sig; 176 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 177 is_assert = !is_assert; 178 pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT : 179 PPS_CAPTURECLEAR); 180 } 181 } 182 183 static void 184 uart_pps_init(struct uart_softc *sc) 185 { 186 struct sysctl_ctx_list *ctx; 187 struct sysctl_oid *tree; 188 189 ctx = device_get_sysctl_ctx(sc->sc_dev); 190 tree = device_get_sysctl_tree(sc->sc_dev); 191 192 /* 193 * The historical default for pps capture mode is either DCD or CTS, 194 * depending on the UART_PPS_ON_CTS kernel option. Start with that, 195 * then try to fetch the tunable that overrides the mode for all uart 196 * devices, then try to fetch the sysctl-tunable that overrides the mode 197 * for one specific device. 198 */ 199 #ifdef UART_PPS_ON_CTS 200 sc->sc_pps_mode = UART_PPS_CTS; 201 #else 202 sc->sc_pps_mode = UART_PPS_DCD; 203 #endif 204 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode); 205 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode", 206 CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I", 207 "pulse mode: 0/1/2=disabled/CTS/DCD; " 208 "add 0x10 to invert, 0x20 for narrow pulse"); 209 210 if (!uart_pps_mode_valid(sc->sc_pps_mode)) { 211 device_printf(sc->sc_dev, 212 "Invalid pps_mode 0x%02x configured; disabling PPS capture\n", 213 sc->sc_pps_mode); 214 sc->sc_pps_mode = UART_PPS_DISABLED; 215 } else if (bootverbose) { 216 uart_pps_print_mode(sc); 217 } 218 219 sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 220 sc->sc_pps.driver_mtx = uart_tty_getlock(sc); 221 sc->sc_pps.driver_abi = PPS_ABI_VERSION; 222 pps_init_abi(&sc->sc_pps); 223 } 224 225 void 226 uart_add_sysdev(struct uart_devinfo *di) 227 { 228 SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 229 } 230 231 const char * 232 uart_getname(struct uart_class *uc) 233 { 234 return ((uc != NULL) ? uc->name : NULL); 235 } 236 237 struct uart_ops * 238 uart_getops(struct uart_class *uc) 239 { 240 return ((uc != NULL) ? uc->uc_ops : NULL); 241 } 242 243 int 244 uart_getrange(struct uart_class *uc) 245 { 246 return ((uc != NULL) ? uc->uc_range : 0); 247 } 248 249 u_int 250 uart_getregshift(struct uart_class *uc) 251 { 252 return ((uc != NULL) ? uc->uc_rshift : 0); 253 } 254 255 /* 256 * Schedule a soft interrupt. We do this on the 0 to !0 transition 257 * of the TTY pending interrupt status. 258 */ 259 void 260 uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 261 { 262 uint32_t new, old; 263 264 do { 265 old = sc->sc_ttypend; 266 new = old | ipend; 267 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 268 269 if ((old & SER_INT_MASK) == 0) 270 swi_sched(sc->sc_softih, 0); 271 } 272 273 /* 274 * A break condition has been detected. We treat the break condition as 275 * a special case that should not happen during normal operation. When 276 * the break condition is to be passed to higher levels in the form of 277 * a NUL character, we really want the break to be in the right place in 278 * the input stream. The overhead to achieve that is not in relation to 279 * the exceptional nature of the break condition, so we permit ourselves 280 * to be sloppy. 281 */ 282 static __inline int 283 uart_intr_break(void *arg) 284 { 285 struct uart_softc *sc = arg; 286 287 #if defined(KDB) 288 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 289 if (kdb_break()) 290 return (0); 291 } 292 #endif 293 if (sc->sc_opened) 294 uart_sched_softih(sc, SER_INT_BREAK); 295 return (0); 296 } 297 298 /* 299 * Handle a receiver overrun situation. We lost at least 1 byte in the 300 * input stream and it's our job to contain the situation. We grab as 301 * much of the data we can, but otherwise flush the receiver FIFO to 302 * create some breathing room. The net effect is that we avoid the 303 * overrun condition to happen for the next X characters, where X is 304 * related to the FIFO size at the cost of losing data right away. 305 * So, instead of having multiple overrun interrupts in close proximity 306 * to each other and possibly pessimizing UART interrupt latency for 307 * other UARTs in a multiport configuration, we create a longer segment 308 * of missing characters by freeing up the FIFO. 309 * Each overrun condition is marked in the input buffer by a token. The 310 * token represents the loss of at least one, but possible more bytes in 311 * the input stream. 312 */ 313 static __inline int 314 uart_intr_overrun(void *arg) 315 { 316 struct uart_softc *sc = arg; 317 318 if (sc->sc_opened) { 319 UART_RECEIVE(sc); 320 if (uart_rx_put(sc, UART_STAT_OVERRUN)) 321 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 322 uart_sched_softih(sc, SER_INT_RXREADY); 323 } 324 UART_FLUSH(sc, UART_FLUSH_RECEIVER); 325 return (0); 326 } 327 328 /* 329 * Received data ready. 330 */ 331 static __inline int 332 uart_intr_rxready(void *arg) 333 { 334 struct uart_softc *sc = arg; 335 int rxp; 336 337 rxp = sc->sc_rxput; 338 UART_RECEIVE(sc); 339 #if defined(KDB) 340 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 341 while (rxp != sc->sc_rxput) { 342 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); 343 if (rxp == sc->sc_rxbufsz) 344 rxp = 0; 345 } 346 } 347 #endif 348 if (sc->sc_opened) 349 uart_sched_softih(sc, SER_INT_RXREADY); 350 else 351 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 352 return (1); 353 } 354 355 /* 356 * Line or modem status change (OOB signalling). 357 * We pass the signals to the software interrupt handler for further 358 * processing. Note that we merge the delta bits, but set the state 359 * bits. This is to avoid losing state transitions due to having more 360 * than 1 hardware interrupt between software interrupts. 361 */ 362 static __inline int 363 uart_intr_sigchg(void *arg) 364 { 365 struct uart_softc *sc = arg; 366 int new, old, sig; 367 368 sig = UART_GETSIG(sc); 369 370 /* 371 * Time pulse counting support, invoked whenever the PPS parameters are 372 * currently set to capture either edge of the signal. 373 */ 374 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 375 uart_pps_process(sc, sig); 376 } 377 378 /* 379 * Keep track of signal changes, even when the device is not 380 * opened. This allows us to inform upper layers about a 381 * possible loss of DCD and thus the existence of a (possibly) 382 * different connection when we have DCD back, during the time 383 * that the device was closed. 384 */ 385 do { 386 old = sc->sc_ttypend; 387 new = old & ~SER_MASK_STATE; 388 new |= sig & SER_INT_SIGMASK; 389 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 390 391 if (sc->sc_opened) 392 uart_sched_softih(sc, SER_INT_SIGCHG); 393 return (1); 394 } 395 396 /* 397 * The transmitter can accept more data. 398 */ 399 static __inline int 400 uart_intr_txidle(void *arg) 401 { 402 struct uart_softc *sc = arg; 403 404 if (sc->sc_txbusy) { 405 sc->sc_txbusy = 0; 406 uart_sched_softih(sc, SER_INT_TXIDLE); 407 } 408 return (0); 409 } 410 411 static int 412 uart_intr(void *arg) 413 { 414 struct uart_softc *sc = arg; 415 int cnt, ipend, testintr; 416 417 if (sc->sc_leaving) 418 return (FILTER_STRAY); 419 420 cnt = 0; 421 testintr = sc->sc_testintr; 422 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) { 423 cnt++; 424 if (ipend & SER_INT_OVERRUN) 425 uart_intr_overrun(sc); 426 if (ipend & SER_INT_BREAK) 427 uart_intr_break(sc); 428 if (ipend & SER_INT_RXREADY) 429 uart_intr_rxready(sc); 430 if (ipend & SER_INT_SIGCHG) 431 uart_intr_sigchg(sc); 432 if (ipend & SER_INT_TXIDLE) 433 uart_intr_txidle(sc); 434 } 435 436 if (sc->sc_polled) { 437 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 438 (timeout_t *)uart_intr, sc); 439 } 440 441 return ((cnt == 0) ? FILTER_STRAY : 442 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD : 443 FILTER_HANDLED)); 444 } 445 446 serdev_intr_t * 447 uart_bus_ihand(device_t dev, int ipend) 448 { 449 450 switch (ipend) { 451 case SER_INT_BREAK: 452 return (uart_intr_break); 453 case SER_INT_OVERRUN: 454 return (uart_intr_overrun); 455 case SER_INT_RXREADY: 456 return (uart_intr_rxready); 457 case SER_INT_SIGCHG: 458 return (uart_intr_sigchg); 459 case SER_INT_TXIDLE: 460 return (uart_intr_txidle); 461 } 462 return (NULL); 463 } 464 465 int 466 uart_bus_ipend(device_t dev) 467 { 468 struct uart_softc *sc; 469 470 sc = device_get_softc(dev); 471 return (UART_IPEND(sc)); 472 } 473 474 int 475 uart_bus_sysdev(device_t dev) 476 { 477 struct uart_softc *sc; 478 479 sc = device_get_softc(dev); 480 return ((sc->sc_sysdev != NULL) ? 1 : 0); 481 } 482 483 int 484 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 485 { 486 struct uart_softc *sc; 487 struct uart_devinfo *sysdev; 488 int error; 489 490 sc = device_get_softc(dev); 491 492 /* 493 * All uart_class references are weak. Check that the needed 494 * class has been compiled-in. Fail if not. 495 */ 496 if (sc->sc_class == NULL) 497 return (ENXIO); 498 499 /* 500 * Initialize the instance. Note that the instance (=softc) does 501 * not necessarily match the hardware specific softc. We can't do 502 * anything about it now, because we may not attach to the device. 503 * Hardware drivers cannot use any of the class specific fields 504 * while probing. 505 */ 506 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 507 sc->sc_dev = dev; 508 if (device_get_desc(dev) == NULL) 509 device_set_desc(dev, uart_getname(sc->sc_class)); 510 511 /* 512 * Allocate the register resource. We assume that all UARTs have 513 * a single register window in either I/O port space or memory 514 * mapped I/O space. Any UART that needs multiple windows will 515 * consequently not be supported by this driver as-is. We try I/O 516 * port space first because that's the common case. 517 */ 518 sc->sc_rrid = rid; 519 sc->sc_rtype = SYS_RES_IOPORT; 520 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 521 RF_ACTIVE); 522 if (sc->sc_rres == NULL) { 523 sc->sc_rrid = rid; 524 sc->sc_rtype = SYS_RES_MEMORY; 525 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, 526 &sc->sc_rrid, RF_ACTIVE); 527 if (sc->sc_rres == NULL) 528 return (ENXIO); 529 } 530 531 /* 532 * Fill in the bus access structure and compare this device with 533 * a possible console device and/or a debug port. We set the flags 534 * in the softc so that the hardware dependent probe can adjust 535 * accordingly. In general, you don't want to permanently disrupt 536 * console I/O. 537 */ 538 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 539 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 540 sc->sc_bas.chan = chan; 541 sc->sc_bas.regshft = regshft; 542 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 543 544 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 545 if (chan == sysdev->bas.chan && 546 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 547 /* XXX check if ops matches class. */ 548 sc->sc_sysdev = sysdev; 549 sysdev->bas.rclk = sc->sc_bas.rclk; 550 } 551 } 552 553 error = UART_PROBE(sc); 554 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 555 return ((error) ? error : BUS_PROBE_DEFAULT); 556 } 557 558 int 559 uart_bus_attach(device_t dev) 560 { 561 struct uart_softc *sc, *sc0; 562 const char *sep; 563 int error, filt; 564 565 /* 566 * The sc_class field defines the type of UART we're going to work 567 * with and thus the size of the softc. Replace the generic softc 568 * with one that matches the UART now that we're certain we handle 569 * the device. 570 */ 571 sc0 = device_get_softc(dev); 572 if (sc0->sc_class->size > sizeof(*sc)) { 573 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 574 bcopy(sc0, sc, sizeof(*sc)); 575 device_set_softc(dev, sc); 576 } else 577 sc = sc0; 578 579 /* 580 * Now that we know the softc for this device, connect the back 581 * pointer from the sysdev for this device, if any 582 */ 583 if (sc->sc_sysdev != NULL) 584 sc->sc_sysdev->sc = sc; 585 586 /* 587 * Protect ourselves against interrupts while we're not completely 588 * finished attaching and initializing. We don't expect interrupts 589 * until after UART_ATTACH(), though. 590 */ 591 sc->sc_leaving = 1; 592 593 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 594 if (sc->sc_hwmtx == NULL) 595 sc->sc_hwmtx = &sc->sc_hwmtx_s; 596 597 /* 598 * Re-allocate. We expect that the softc contains the information 599 * collected by uart_bus_probe() intact. 600 */ 601 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 602 RF_ACTIVE); 603 if (sc->sc_rres == NULL) { 604 mtx_destroy(&sc->sc_hwmtx_s); 605 return (ENXIO); 606 } 607 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 608 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 609 610 /* 611 * Ensure there is room for at least three full FIFOs of data in the 612 * receive buffer (handles the case of low-level drivers with huge 613 * FIFOs), and also ensure that there is no less than the historical 614 * size of 384 bytes (handles the typical small-FIFO case). 615 */ 616 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); 617 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 618 M_UART, M_WAITOK); 619 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 620 M_UART, M_WAITOK); 621 622 error = UART_ATTACH(sc); 623 if (error) 624 goto fail; 625 626 if (sc->sc_hwiflow || sc->sc_hwoflow) { 627 sep = ""; 628 device_print_prettyname(dev); 629 if (sc->sc_hwiflow) { 630 printf("%sRTS iflow", sep); 631 sep = ", "; 632 } 633 if (sc->sc_hwoflow) { 634 printf("%sCTS oflow", sep); 635 sep = ", "; 636 } 637 printf("\n"); 638 } 639 640 if (sc->sc_sysdev != NULL) { 641 if (sc->sc_sysdev->baudrate == 0) { 642 if (UART_IOCTL(sc, UART_IOCTL_BAUD, 643 (intptr_t)&sc->sc_sysdev->baudrate) != 0) 644 sc->sc_sysdev->baudrate = -1; 645 } 646 switch (sc->sc_sysdev->type) { 647 case UART_DEV_CONSOLE: 648 device_printf(dev, "console"); 649 break; 650 case UART_DEV_DBGPORT: 651 device_printf(dev, "debug port"); 652 break; 653 case UART_DEV_KEYBOARD: 654 device_printf(dev, "keyboard"); 655 break; 656 default: 657 device_printf(dev, "unknown system device"); 658 break; 659 } 660 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 661 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 662 sc->sc_sysdev->stopbits); 663 } 664 665 sc->sc_leaving = 0; 666 sc->sc_testintr = 1; 667 filt = uart_intr(sc); 668 sc->sc_testintr = 0; 669 670 /* 671 * Don't use interrupts if we couldn't clear any pending interrupt 672 * conditions. We may have broken H/W and polling is probably the 673 * safest thing to do. 674 */ 675 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) { 676 sc->sc_irid = 0; 677 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, 678 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); 679 } 680 if (sc->sc_ires != NULL) { 681 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, 682 uart_intr, NULL, sc, &sc->sc_icookie); 683 sc->sc_fastintr = (error == 0) ? 1 : 0; 684 685 if (!sc->sc_fastintr) 686 error = bus_setup_intr(dev, sc->sc_ires, 687 INTR_TYPE_TTY | INTR_MPSAFE, NULL, 688 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 689 690 if (error) { 691 device_printf(dev, "could not activate interrupt\n"); 692 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 693 sc->sc_ires); 694 sc->sc_ires = NULL; 695 } 696 } 697 if (sc->sc_ires == NULL) { 698 /* No interrupt resource. Force polled mode. */ 699 sc->sc_polled = 1; 700 callout_init(&sc->sc_timer, 1); 701 callout_reset(&sc->sc_timer, hz / uart_poll_freq, 702 (timeout_t *)uart_intr, sc); 703 } 704 705 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 706 sep = ""; 707 device_print_prettyname(dev); 708 if (sc->sc_fastintr) { 709 printf("%sfast interrupt", sep); 710 sep = ", "; 711 } 712 if (sc->sc_polled) { 713 printf("%spolled mode (%dHz)", sep, uart_poll_freq); 714 sep = ", "; 715 } 716 printf("\n"); 717 } 718 719 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) { 720 if ((error = sc->sc_sysdev->attach(sc)) != 0) 721 goto fail; 722 } else { 723 if ((error = uart_tty_attach(sc)) != 0) 724 goto fail; 725 uart_pps_init(sc); 726 } 727 728 if (sc->sc_sysdev != NULL) 729 sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 730 731 return (0); 732 733 fail: 734 free(sc->sc_txbuf, M_UART); 735 free(sc->sc_rxbuf, M_UART); 736 737 if (sc->sc_ires != NULL) { 738 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 739 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 740 sc->sc_ires); 741 } 742 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 743 744 mtx_destroy(&sc->sc_hwmtx_s); 745 746 return (error); 747 } 748 749 int 750 uart_bus_detach(device_t dev) 751 { 752 struct uart_softc *sc; 753 754 sc = device_get_softc(dev); 755 756 sc->sc_leaving = 1; 757 758 if (sc->sc_sysdev != NULL) 759 sc->sc_sysdev->hwmtx = NULL; 760 761 UART_DETACH(sc); 762 763 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 764 (*sc->sc_sysdev->detach)(sc); 765 else 766 uart_tty_detach(sc); 767 768 free(sc->sc_txbuf, M_UART); 769 free(sc->sc_rxbuf, M_UART); 770 771 if (sc->sc_ires != NULL) { 772 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 773 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 774 sc->sc_ires); 775 } 776 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 777 778 mtx_destroy(&sc->sc_hwmtx_s); 779 780 if (sc->sc_class->size > sizeof(*sc)) { 781 device_set_softc(dev, NULL); 782 free(sc, M_UART); 783 } else 784 device_set_softc(dev, NULL); 785 786 return (0); 787 } 788 789 int 790 uart_bus_resume(device_t dev) 791 { 792 struct uart_softc *sc; 793 794 sc = device_get_softc(dev); 795 return (UART_ATTACH(sc)); 796 } 797 798 void 799 uart_grab(struct uart_devinfo *di) 800 { 801 802 if (di->sc) 803 UART_GRAB(di->sc); 804 } 805 806 void 807 uart_ungrab(struct uart_devinfo *di) 808 { 809 810 if (di->sc) 811 UART_UNGRAB(di->sc); 812 } 813