xref: /freebsd/sys/dev/uart/uart_core.c (revision 1e413cf93298b5b97441a21d9a50fdcd0ee9945e)
1 /*-
2  * Copyright (c) 2003 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #ifndef KLD_MODULE
31 #include "opt_comconsole.h"
32 #endif
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/cons.h>
39 #include <sys/fcntl.h>
40 #include <sys/interrupt.h>
41 #include <sys/kdb.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/queue.h>
45 #include <sys/reboot.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48 #include <sys/termios.h>
49 #include <sys/tty.h>
50 #include <machine/resource.h>
51 #include <machine/stdarg.h>
52 
53 #include <dev/uart/uart.h>
54 #include <dev/uart/uart_bus.h>
55 #include <dev/uart/uart_cpu.h>
56 
57 #include "uart_if.h"
58 
59 devclass_t uart_devclass;
60 char uart_driver_name[] = "uart";
61 
62 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
63     SLIST_HEAD_INITIALIZER(uart_sysdevs);
64 
65 MALLOC_DEFINE(M_UART, "UART", "UART driver");
66 
67 void
68 uart_add_sysdev(struct uart_devinfo *di)
69 {
70 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
71 }
72 
73 const char *
74 uart_getname(struct uart_class *uc)
75 {
76 	return ((uc != NULL) ? uc->name : NULL);
77 }
78 
79 struct uart_ops *
80 uart_getops(struct uart_class *uc)
81 {
82 	return ((uc != NULL) ? uc->uc_ops : NULL);
83 }
84 
85 int
86 uart_getrange(struct uart_class *uc)
87 {
88 	return ((uc != NULL) ? uc->uc_range : 0);
89 }
90 
91 /*
92  * Schedule a soft interrupt. We do this on the 0 to !0 transition
93  * of the TTY pending interrupt status.
94  */
95 static void
96 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
97 {
98 	uint32_t new, old;
99 
100 	do {
101 		old = sc->sc_ttypend;
102 		new = old | ipend;
103 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
104 
105 	if ((old & SER_INT_MASK) == 0)
106 		swi_sched(sc->sc_softih, 0);
107 }
108 
109 /*
110  * A break condition has been detected. We treat the break condition as
111  * a special case that should not happen during normal operation. When
112  * the break condition is to be passed to higher levels in the form of
113  * a NUL character, we really want the break to be in the right place in
114  * the input stream. The overhead to achieve that is not in relation to
115  * the exceptional nature of the break condition, so we permit ourselves
116  * to be sloppy.
117  */
118 static __inline int
119 uart_intr_break(void *arg)
120 {
121 	struct uart_softc *sc = arg;
122 
123 #if defined(KDB) && defined(BREAK_TO_DEBUGGER)
124 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
125 		kdb_enter(KDB_WHY_BREAK, "Line break on console");
126 		return (0);
127 	}
128 #endif
129 	if (sc->sc_opened)
130 		uart_sched_softih(sc, SER_INT_BREAK);
131 	return (0);
132 }
133 
134 /*
135  * Handle a receiver overrun situation. We lost at least 1 byte in the
136  * input stream and it's our job to contain the situation. We grab as
137  * much of the data we can, but otherwise flush the receiver FIFO to
138  * create some breathing room. The net effect is that we avoid the
139  * overrun condition to happen for the next X characters, where X is
140  * related to the FIFO size at the cost of loosing data right away.
141  * So, instead of having multiple overrun interrupts in close proximity
142  * to each other and possibly pessimizing UART interrupt latency for
143  * other UARTs in a multiport configuration, we create a longer segment
144  * of missing characters by freeing up the FIFO.
145  * Each overrun condition is marked in the input buffer by a token. The
146  * token represents the loss of at least one, but possible more bytes in
147  * the input stream.
148  */
149 static __inline int
150 uart_intr_overrun(void *arg)
151 {
152 	struct uart_softc *sc = arg;
153 
154 	if (sc->sc_opened) {
155 		UART_RECEIVE(sc);
156 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
157 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
158 		uart_sched_softih(sc, SER_INT_RXREADY);
159 	}
160 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
161 	return (0);
162 }
163 
164 /*
165  * Received data ready.
166  */
167 static __inline int
168 uart_intr_rxready(void *arg)
169 {
170 	struct uart_softc *sc = arg;
171 	int rxp;
172 
173 	rxp = sc->sc_rxput;
174 	UART_RECEIVE(sc);
175 #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER)
176 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
177 		while (rxp != sc->sc_rxput) {
178 			if (kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk))
179 				kdb_enter(KDB_WHY_BREAK,
180 				    "Break sequence on console");
181 			if (rxp == sc->sc_rxbufsz)
182 				rxp = 0;
183 		}
184 	}
185 #endif
186 	if (sc->sc_opened)
187 		uart_sched_softih(sc, SER_INT_RXREADY);
188 	else
189 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
190 	return (1);
191 }
192 
193 /*
194  * Line or modem status change (OOB signalling).
195  * We pass the signals to the software interrupt handler for further
196  * processing. Note that we merge the delta bits, but set the state
197  * bits. This is to avoid loosing state transitions due to having more
198  * than 1 hardware interrupt between software interrupts.
199  */
200 static __inline int
201 uart_intr_sigchg(void *arg)
202 {
203 	struct uart_softc *sc = arg;
204 	int new, old, sig;
205 
206 	sig = UART_GETSIG(sc);
207 
208 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
209 		if (sig & UART_SIG_DPPS) {
210 			pps_capture(&sc->sc_pps);
211 			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
212 			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
213 		}
214 	}
215 
216 	/*
217 	 * Keep track of signal changes, even when the device is not
218 	 * opened. This allows us to inform upper layers about a
219 	 * possible loss of DCD and thus the existence of a (possibly)
220 	 * different connection when we have DCD back, during the time
221 	 * that the device was closed.
222 	 */
223 	do {
224 		old = sc->sc_ttypend;
225 		new = old & ~SER_MASK_STATE;
226 		new |= sig & SER_INT_SIGMASK;
227 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
228 
229 	if (sc->sc_opened)
230 		uart_sched_softih(sc, SER_INT_SIGCHG);
231 	return (1);
232 }
233 
234 /*
235  * The transmitter can accept more data.
236  */
237 static __inline int
238 uart_intr_txidle(void *arg)
239 {
240 	struct uart_softc *sc = arg;
241 
242 	if (sc->sc_txbusy) {
243 		sc->sc_txbusy = 0;
244 		uart_sched_softih(sc, SER_INT_TXIDLE);
245 	}
246 	return (0);
247 }
248 
249 static int
250 uart_intr(void *arg)
251 {
252 	struct uart_softc *sc = arg;
253 	int flag = 0, ipend;
254 
255 	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
256 		flag = 1;
257 		if (ipend & SER_INT_OVERRUN)
258 			uart_intr_overrun(sc);
259 		if (ipend & SER_INT_BREAK)
260 			uart_intr_break(sc);
261 		if (ipend & SER_INT_RXREADY)
262 			uart_intr_rxready(sc);
263 		if (ipend & SER_INT_SIGCHG)
264 			uart_intr_sigchg(sc);
265 		if (ipend & SER_INT_TXIDLE)
266 			uart_intr_txidle(sc);
267 	}
268 	return((flag)?FILTER_HANDLED:FILTER_STRAY);
269 }
270 
271 serdev_intr_t *
272 uart_bus_ihand(device_t dev, int ipend)
273 {
274 
275 	switch (ipend) {
276 	case SER_INT_BREAK:
277 		return (uart_intr_break);
278 	case SER_INT_OVERRUN:
279 		return (uart_intr_overrun);
280 	case SER_INT_RXREADY:
281 		return (uart_intr_rxready);
282 	case SER_INT_SIGCHG:
283 		return (uart_intr_sigchg);
284 	case SER_INT_TXIDLE:
285 		return (uart_intr_txidle);
286 	}
287 	return (NULL);
288 }
289 
290 int
291 uart_bus_ipend(device_t dev)
292 {
293 	struct uart_softc *sc;
294 
295 	sc = device_get_softc(dev);
296 	return (UART_IPEND(sc));
297 }
298 
299 int
300 uart_bus_sysdev(device_t dev)
301 {
302 	struct uart_softc *sc;
303 
304 	sc = device_get_softc(dev);
305 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
306 }
307 
308 int
309 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
310 {
311 	struct uart_softc *sc;
312 	struct uart_devinfo *sysdev;
313 	int error;
314 
315 	sc = device_get_softc(dev);
316 
317 	/*
318 	 * All uart_class references are weak. Check that the needed
319 	 * class has been compiled-in. Fail if not.
320 	 */
321 	if (sc->sc_class == NULL)
322 		return (ENXIO);
323 
324 	/*
325 	 * Initialize the instance. Note that the instance (=softc) does
326 	 * not necessarily match the hardware specific softc. We can't do
327 	 * anything about it now, because we may not attach to the device.
328 	 * Hardware drivers cannot use any of the class specific fields
329 	 * while probing.
330 	 */
331 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
332 	sc->sc_dev = dev;
333 	if (device_get_desc(dev) == NULL)
334 		device_set_desc(dev, uart_getname(sc->sc_class));
335 
336 	/*
337 	 * Allocate the register resource. We assume that all UARTs have
338 	 * a single register window in either I/O port space or memory
339 	 * mapped I/O space. Any UART that needs multiple windows will
340 	 * consequently not be supported by this driver as-is. We try I/O
341 	 * port space first because that's the common case.
342 	 */
343 	sc->sc_rrid = rid;
344 	sc->sc_rtype = SYS_RES_IOPORT;
345 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
346 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
347 	if (sc->sc_rres == NULL) {
348 		sc->sc_rrid = rid;
349 		sc->sc_rtype = SYS_RES_MEMORY;
350 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
351 		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
352 		    RF_ACTIVE);
353 		if (sc->sc_rres == NULL)
354 			return (ENXIO);
355 	}
356 
357 	/*
358 	 * Fill in the bus access structure and compare this device with
359 	 * a possible console device and/or a debug port. We set the flags
360 	 * in the softc so that the hardware dependent probe can adjust
361 	 * accordingly. In general, you don't want to permanently disrupt
362 	 * console I/O.
363 	 */
364 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
365 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
366 	sc->sc_bas.chan = chan;
367 	sc->sc_bas.regshft = regshft;
368 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
369 
370 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
371 		if (chan == sysdev->bas.chan &&
372 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
373 			/* XXX check if ops matches class. */
374 			sc->sc_sysdev = sysdev;
375 			sysdev->bas.rclk = sc->sc_bas.rclk;
376 		}
377 	}
378 
379 	error = UART_PROBE(sc);
380 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
381 	return ((error) ? error : BUS_PROBE_DEFAULT);
382 }
383 
384 int
385 uart_bus_attach(device_t dev)
386 {
387 	struct uart_softc *sc, *sc0;
388 	const char *sep;
389 	int error;
390 
391 	/*
392 	 * The sc_class field defines the type of UART we're going to work
393 	 * with and thus the size of the softc. Replace the generic softc
394 	 * with one that matches the UART now that we're certain we handle
395 	 * the device.
396 	 */
397 	sc0 = device_get_softc(dev);
398 	if (sc0->sc_class->size > sizeof(*sc)) {
399 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
400 		bcopy(sc0, sc, sizeof(*sc));
401 		device_set_softc(dev, sc);
402 	} else
403 		sc = sc0;
404 
405 	/*
406 	 * Protect ourselves against interrupts while we're not completely
407 	 * finished attaching and initializing. We don't expect interrupts
408 	 * until after UART_ATTACH() though.
409 	 */
410 	sc->sc_leaving = 1;
411 
412 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
413 	if (sc->sc_hwmtx == NULL)
414 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
415 
416 	/*
417 	 * Re-allocate. We expect that the softc contains the information
418 	 * collected by uart_bus_probe() intact.
419 	 */
420 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
421 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
422 	if (sc->sc_rres == NULL) {
423 		mtx_destroy(&sc->sc_hwmtx_s);
424 		return (ENXIO);
425 	}
426 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
427 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
428 
429 	sc->sc_irid = 0;
430 	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
431 	    RF_ACTIVE | RF_SHAREABLE);
432 	if (sc->sc_ires != NULL) {
433 		error = bus_setup_intr(dev,
434 		    sc->sc_ires, INTR_TYPE_TTY,
435 		    uart_intr, NULL, sc, &sc->sc_icookie);
436 		if (error)
437 			error = bus_setup_intr(dev,
438 			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
439 			    NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
440 		else
441 			sc->sc_fastintr = 1;
442 
443 		if (error) {
444 			device_printf(dev, "could not activate interrupt\n");
445 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
446 			    sc->sc_ires);
447 			sc->sc_ires = NULL;
448 		}
449 	}
450 	if (sc->sc_ires == NULL) {
451 		/* XXX no interrupt resource. Force polled mode. */
452 		sc->sc_polled = 1;
453 	}
454 
455 	sc->sc_rxbufsz = IBUFSIZ;
456 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
457 	    M_UART, M_WAITOK);
458 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
459 	    M_UART, M_WAITOK);
460 
461 	error = UART_ATTACH(sc);
462 	if (error)
463 		goto fail;
464 
465 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
466 		sep = "";
467 		device_print_prettyname(dev);
468 		if (sc->sc_hwiflow) {
469 			printf("%sRTS iflow", sep);
470 			sep = ", ";
471 		}
472 		if (sc->sc_hwoflow) {
473 			printf("%sCTS oflow", sep);
474 			sep = ", ";
475 		}
476 		printf("\n");
477 	}
478 
479 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
480 		sep = "";
481 		device_print_prettyname(dev);
482 		if (sc->sc_fastintr) {
483 			printf("%sfast interrupt", sep);
484 			sep = ", ";
485 		}
486 		if (sc->sc_polled) {
487 			printf("%spolled mode", sep);
488 			sep = ", ";
489 		}
490 		printf("\n");
491 	}
492 
493 	if (sc->sc_sysdev != NULL) {
494 		if (sc->sc_sysdev->baudrate == 0) {
495 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
496 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
497 				sc->sc_sysdev->baudrate = -1;
498 		}
499 		switch (sc->sc_sysdev->type) {
500 		case UART_DEV_CONSOLE:
501 			device_printf(dev, "console");
502 			break;
503 		case UART_DEV_DBGPORT:
504 			device_printf(dev, "debug port");
505 			break;
506 		case UART_DEV_KEYBOARD:
507 			device_printf(dev, "keyboard");
508 			break;
509 		default:
510 			device_printf(dev, "unknown system device");
511 			break;
512 		}
513 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
514 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
515 		    sc->sc_sysdev->stopbits);
516 	}
517 
518 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
519 	pps_init(&sc->sc_pps);
520 
521 	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
522 	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
523 	if (error)
524 		goto fail;
525 
526 	if (sc->sc_sysdev != NULL)
527 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
528 
529 	sc->sc_leaving = 0;
530 	uart_intr(sc);
531 	return (0);
532 
533  fail:
534 	free(sc->sc_txbuf, M_UART);
535 	free(sc->sc_rxbuf, M_UART);
536 
537 	if (sc->sc_ires != NULL) {
538 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
539 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
540 		    sc->sc_ires);
541 	}
542 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
543 
544 	mtx_destroy(&sc->sc_hwmtx_s);
545 
546 	return (error);
547 }
548 
549 int
550 uart_bus_detach(device_t dev)
551 {
552 	struct uart_softc *sc;
553 
554 	sc = device_get_softc(dev);
555 
556 	sc->sc_leaving = 1;
557 
558 	if (sc->sc_sysdev != NULL)
559 		sc->sc_sysdev->hwmtx = NULL;
560 
561 	UART_DETACH(sc);
562 
563 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
564 		(*sc->sc_sysdev->detach)(sc);
565 	else
566 		uart_tty_detach(sc);
567 
568 	free(sc->sc_txbuf, M_UART);
569 	free(sc->sc_rxbuf, M_UART);
570 
571 	if (sc->sc_ires != NULL) {
572 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
573 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
574 		    sc->sc_ires);
575 	}
576 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
577 
578 	mtx_destroy(&sc->sc_hwmtx_s);
579 
580 	if (sc->sc_class->size > sizeof(*sc)) {
581 		device_set_softc(dev, NULL);
582 		free(sc, M_UART);
583 	} else
584 		device_set_softc(dev, NULL);
585 
586 	return (0);
587 }
588