xref: /freebsd/sys/dev/uart/uart_core.c (revision 13464e4a44fc58490a03bb8bfc7e3c972e9c30b2)
1 /*-
2  * Copyright (c) 2003 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/cons.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
37 #include <sys/kdb.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <sys/rman.h>
45 #include <machine/resource.h>
46 #include <machine/stdarg.h>
47 
48 #include <dev/uart/uart.h>
49 #include <dev/uart/uart_bus.h>
50 #include <dev/uart/uart_cpu.h>
51 #include <dev/uart/uart_ppstypes.h>
52 
53 #include "uart_if.h"
54 
55 devclass_t uart_devclass;
56 const char uart_driver_name[] = "uart";
57 
58 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
59     SLIST_HEAD_INITIALIZER(uart_sysdevs);
60 
61 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
62 
63 #ifndef	UART_POLL_FREQ
64 #define	UART_POLL_FREQ		50
65 #endif
66 static int uart_poll_freq = UART_POLL_FREQ;
67 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq,
68     0, "UART poll frequency");
69 
70 static int uart_force_poll;
71 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll,
72     0, "Force UART polling");
73 
74 static inline int
75 uart_pps_mode_valid(int pps_mode)
76 {
77 	int opt;
78 
79 	switch(pps_mode & UART_PPS_SIGNAL_MASK) {
80 	case UART_PPS_DISABLED:
81 	case UART_PPS_CTS:
82 	case UART_PPS_DCD:
83 		break;
84 	default:
85 		return (false);
86 	}
87 
88 	opt = pps_mode & UART_PPS_OPTION_MASK;
89 	if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0)
90 		return (false);
91 
92 	return (true);
93 }
94 
95 static void
96 uart_pps_print_mode(struct uart_softc *sc)
97 {
98 
99 	device_printf(sc->sc_dev, "PPS capture mode: ");
100 	switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
101 	case UART_PPS_DISABLED:
102 		printf("disabled");
103 		break;
104 	case UART_PPS_CTS:
105 		printf("CTS");
106 		break;
107 	case UART_PPS_DCD:
108 		printf("DCD");
109 		break;
110 	default:
111 		printf("invalid");
112 		break;
113 	}
114 	if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
115 		printf("-Inverted");
116 	if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE)
117 		printf("-NarrowPulse");
118 	printf("\n");
119 }
120 
121 static int
122 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
123 {
124 	struct uart_softc *sc;
125 	int err, tmp;
126 
127 	sc = arg1;
128 	tmp = sc->sc_pps_mode;
129 	err = sysctl_handle_int(oidp, &tmp, 0, req);
130 	if (err != 0 || req->newptr == NULL)
131 		return (err);
132 	if (!uart_pps_mode_valid(tmp))
133 		return (EINVAL);
134 	sc->sc_pps_mode = tmp;
135 	return(0);
136 }
137 
138 static void
139 uart_pps_process(struct uart_softc *sc, int ser_sig)
140 {
141 	sbintime_t now;
142 	int is_assert, pps_sig;
143 
144 	/* Which signal is configured as PPS?  Early out if none. */
145 	switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
146 	case UART_PPS_CTS:
147 		pps_sig = SER_CTS;
148 		break;
149 	case UART_PPS_DCD:
150 		pps_sig = SER_DCD;
151 		break;
152 	default:
153 		return;
154 	}
155 
156 	/* Early out if there is no change in the signal configured as PPS. */
157 	if ((ser_sig & SER_DELTA(pps_sig)) == 0)
158 		return;
159 
160 	/*
161 	 * In narrow-pulse mode we need to synthesize both capture and clear
162 	 * events from a single "delta occurred" indication from the uart
163 	 * hardware because the pulse width is too narrow to reliably detect
164 	 * both edges.  However, when the pulse width is close to our interrupt
165 	 * processing latency we might intermittantly catch both edges.  To
166 	 * guard against generating spurious events when that happens, we use a
167 	 * separate timer to ensure at least half a second elapses before we
168 	 * generate another event.
169 	 */
170 	pps_capture(&sc->sc_pps);
171 	if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) {
172 		now = getsbinuptime();
173 		if (now > sc->sc_pps_captime + 500 * SBT_1MS) {
174 			sc->sc_pps_captime = now;
175 			pps_event(&sc->sc_pps, PPS_CAPTUREASSERT);
176 			pps_event(&sc->sc_pps, PPS_CAPTURECLEAR);
177 		}
178 	} else  {
179 		is_assert = ser_sig & pps_sig;
180 		if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
181 			is_assert = !is_assert;
182 		pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT :
183 		    PPS_CAPTURECLEAR);
184 	}
185 }
186 
187 static void
188 uart_pps_init(struct uart_softc *sc)
189 {
190 	struct sysctl_ctx_list *ctx;
191 	struct sysctl_oid *tree;
192 
193 	ctx = device_get_sysctl_ctx(sc->sc_dev);
194 	tree = device_get_sysctl_tree(sc->sc_dev);
195 
196 	/*
197 	 * The historical default for pps capture mode is either DCD or CTS,
198 	 * depending on the UART_PPS_ON_CTS kernel option.  Start with that,
199 	 * then try to fetch the tunable that overrides the mode for all uart
200 	 * devices, then try to fetch the sysctl-tunable that overrides the mode
201 	 * for one specific device.
202 	 */
203 #ifdef UART_PPS_ON_CTS
204 	sc->sc_pps_mode = UART_PPS_CTS;
205 #else
206 	sc->sc_pps_mode = UART_PPS_DCD;
207 #endif
208 	TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
209 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
210 	    CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I",
211 	    "pulse mode: 0/1/2=disabled/CTS/DCD; "
212 	    "add 0x10 to invert, 0x20 for narrow pulse");
213 
214 	if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
215 		device_printf(sc->sc_dev,
216 		    "Invalid pps_mode 0x%02x configured; disabling PPS capture\n",
217 		    sc->sc_pps_mode);
218 		sc->sc_pps_mode = UART_PPS_DISABLED;
219 	} else if (bootverbose) {
220 		uart_pps_print_mode(sc);
221 	}
222 
223 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
224 	sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
225 	sc->sc_pps.driver_abi = PPS_ABI_VERSION;
226 	pps_init_abi(&sc->sc_pps);
227 }
228 
229 void
230 uart_add_sysdev(struct uart_devinfo *di)
231 {
232 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
233 }
234 
235 const char *
236 uart_getname(struct uart_class *uc)
237 {
238 	return ((uc != NULL) ? uc->name : NULL);
239 }
240 
241 struct uart_ops *
242 uart_getops(struct uart_class *uc)
243 {
244 	return ((uc != NULL) ? uc->uc_ops : NULL);
245 }
246 
247 int
248 uart_getrange(struct uart_class *uc)
249 {
250 	return ((uc != NULL) ? uc->uc_range : 0);
251 }
252 
253 u_int
254 uart_getregshift(struct uart_class *uc)
255 {
256 	return ((uc != NULL) ? uc->uc_rshift : 0);
257 }
258 
259 u_int
260 uart_getregiowidth(struct uart_class *uc)
261 {
262 	return ((uc != NULL) ? uc->uc_riowidth : 0);
263 }
264 
265 /*
266  * Schedule a soft interrupt. We do this on the 0 to !0 transition
267  * of the TTY pending interrupt status.
268  */
269 void
270 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
271 {
272 	uint32_t new, old;
273 
274 	do {
275 		old = sc->sc_ttypend;
276 		new = old | ipend;
277 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
278 
279 	if ((old & SER_INT_MASK) == 0)
280 		swi_sched(sc->sc_softih, 0);
281 }
282 
283 /*
284  * A break condition has been detected. We treat the break condition as
285  * a special case that should not happen during normal operation. When
286  * the break condition is to be passed to higher levels in the form of
287  * a NUL character, we really want the break to be in the right place in
288  * the input stream. The overhead to achieve that is not in relation to
289  * the exceptional nature of the break condition, so we permit ourselves
290  * to be sloppy.
291  */
292 static __inline int
293 uart_intr_break(void *arg)
294 {
295 	struct uart_softc *sc = arg;
296 
297 #if defined(KDB)
298 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
299 		if (kdb_break())
300 			return (0);
301 	}
302 #endif
303 	if (sc->sc_opened)
304 		uart_sched_softih(sc, SER_INT_BREAK);
305 	return (0);
306 }
307 
308 /*
309  * Handle a receiver overrun situation. We lost at least 1 byte in the
310  * input stream and it's our job to contain the situation. We grab as
311  * much of the data we can, but otherwise flush the receiver FIFO to
312  * create some breathing room. The net effect is that we avoid the
313  * overrun condition to happen for the next X characters, where X is
314  * related to the FIFO size at the cost of losing data right away.
315  * So, instead of having multiple overrun interrupts in close proximity
316  * to each other and possibly pessimizing UART interrupt latency for
317  * other UARTs in a multiport configuration, we create a longer segment
318  * of missing characters by freeing up the FIFO.
319  * Each overrun condition is marked in the input buffer by a token. The
320  * token represents the loss of at least one, but possible more bytes in
321  * the input stream.
322  */
323 static __inline int
324 uart_intr_overrun(void *arg)
325 {
326 	struct uart_softc *sc = arg;
327 
328 	if (sc->sc_opened) {
329 		UART_RECEIVE(sc);
330 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
331 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
332 		uart_sched_softih(sc, SER_INT_RXREADY);
333 	}
334 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
335 	return (0);
336 }
337 
338 /*
339  * Received data ready.
340  */
341 static __inline int
342 uart_intr_rxready(void *arg)
343 {
344 	struct uart_softc *sc = arg;
345 	int rxp;
346 
347 	rxp = sc->sc_rxput;
348 	UART_RECEIVE(sc);
349 #if defined(KDB)
350 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
351 		while (rxp != sc->sc_rxput) {
352 			kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
353 			if (rxp == sc->sc_rxbufsz)
354 				rxp = 0;
355 		}
356 	}
357 #endif
358 	if (sc->sc_opened)
359 		uart_sched_softih(sc, SER_INT_RXREADY);
360 	else
361 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
362 	return (1);
363 }
364 
365 /*
366  * Line or modem status change (OOB signalling).
367  * We pass the signals to the software interrupt handler for further
368  * processing. Note that we merge the delta bits, but set the state
369  * bits. This is to avoid losing state transitions due to having more
370  * than 1 hardware interrupt between software interrupts.
371  */
372 static __inline int
373 uart_intr_sigchg(void *arg)
374 {
375 	struct uart_softc *sc = arg;
376 	int new, old, sig;
377 
378 	sig = UART_GETSIG(sc);
379 
380 	/*
381 	 * Time pulse counting support, invoked whenever the PPS parameters are
382 	 * currently set to capture either edge of the signal.
383 	 */
384 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
385 		uart_pps_process(sc, sig);
386 	}
387 
388 	/*
389 	 * Keep track of signal changes, even when the device is not
390 	 * opened. This allows us to inform upper layers about a
391 	 * possible loss of DCD and thus the existence of a (possibly)
392 	 * different connection when we have DCD back, during the time
393 	 * that the device was closed.
394 	 */
395 	do {
396 		old = sc->sc_ttypend;
397 		new = old & ~SER_MASK_STATE;
398 		new |= sig & SER_INT_SIGMASK;
399 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
400 
401 	if (sc->sc_opened)
402 		uart_sched_softih(sc, SER_INT_SIGCHG);
403 	return (1);
404 }
405 
406 /*
407  * The transmitter can accept more data.
408  */
409 static __inline int
410 uart_intr_txidle(void *arg)
411 {
412 	struct uart_softc *sc = arg;
413 
414 	if (sc->sc_txbusy) {
415 		sc->sc_txbusy = 0;
416 		uart_sched_softih(sc, SER_INT_TXIDLE);
417 	}
418 	return (0);
419 }
420 
421 static int
422 uart_intr(void *arg)
423 {
424 	struct uart_softc *sc = arg;
425 	int cnt, ipend, testintr;
426 
427 	if (sc->sc_leaving)
428 		return (FILTER_STRAY);
429 
430 	cnt = 0;
431 	testintr = sc->sc_testintr;
432 	while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
433 		cnt++;
434 		if (ipend & SER_INT_OVERRUN)
435 			uart_intr_overrun(sc);
436 		if (ipend & SER_INT_BREAK)
437 			uart_intr_break(sc);
438 		if (ipend & SER_INT_RXREADY)
439 			uart_intr_rxready(sc);
440 		if (ipend & SER_INT_SIGCHG)
441 			uart_intr_sigchg(sc);
442 		if (ipend & SER_INT_TXIDLE)
443 			uart_intr_txidle(sc);
444 	}
445 
446 	if (sc->sc_polled) {
447 		callout_reset(&sc->sc_timer, hz / uart_poll_freq,
448 		    (timeout_t *)uart_intr, sc);
449 	}
450 
451 	return ((cnt == 0) ? FILTER_STRAY :
452 	    ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
453 	    FILTER_HANDLED));
454 }
455 
456 serdev_intr_t *
457 uart_bus_ihand(device_t dev, int ipend)
458 {
459 
460 	switch (ipend) {
461 	case SER_INT_BREAK:
462 		return (uart_intr_break);
463 	case SER_INT_OVERRUN:
464 		return (uart_intr_overrun);
465 	case SER_INT_RXREADY:
466 		return (uart_intr_rxready);
467 	case SER_INT_SIGCHG:
468 		return (uart_intr_sigchg);
469 	case SER_INT_TXIDLE:
470 		return (uart_intr_txidle);
471 	}
472 	return (NULL);
473 }
474 
475 int
476 uart_bus_ipend(device_t dev)
477 {
478 	struct uart_softc *sc;
479 
480 	sc = device_get_softc(dev);
481 	return (UART_IPEND(sc));
482 }
483 
484 int
485 uart_bus_sysdev(device_t dev)
486 {
487 	struct uart_softc *sc;
488 
489 	sc = device_get_softc(dev);
490 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
491 }
492 
493 int
494 uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan)
495 {
496 	struct uart_softc *sc;
497 	struct uart_devinfo *sysdev;
498 	int error;
499 
500 	sc = device_get_softc(dev);
501 
502 	/*
503 	 * All uart_class references are weak. Check that the needed
504 	 * class has been compiled-in. Fail if not.
505 	 */
506 	if (sc->sc_class == NULL)
507 		return (ENXIO);
508 
509 	/*
510 	 * Initialize the instance. Note that the instance (=softc) does
511 	 * not necessarily match the hardware specific softc. We can't do
512 	 * anything about it now, because we may not attach to the device.
513 	 * Hardware drivers cannot use any of the class specific fields
514 	 * while probing.
515 	 */
516 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
517 	sc->sc_dev = dev;
518 	if (device_get_desc(dev) == NULL)
519 		device_set_desc(dev, uart_getname(sc->sc_class));
520 
521 	/*
522 	 * Allocate the register resource. We assume that all UARTs have
523 	 * a single register window in either I/O port space or memory
524 	 * mapped I/O space. Any UART that needs multiple windows will
525 	 * consequently not be supported by this driver as-is. We try I/O
526 	 * port space first because that's the common case.
527 	 */
528 	sc->sc_rrid = rid;
529 	sc->sc_rtype = SYS_RES_IOPORT;
530 	sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
531 	    RF_ACTIVE);
532 	if (sc->sc_rres == NULL) {
533 		sc->sc_rrid = rid;
534 		sc->sc_rtype = SYS_RES_MEMORY;
535 		sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype,
536 		    &sc->sc_rrid, RF_ACTIVE);
537 		if (sc->sc_rres == NULL)
538 			return (ENXIO);
539 	}
540 
541 	/*
542 	 * Fill in the bus access structure and compare this device with
543 	 * a possible console device and/or a debug port. We set the flags
544 	 * in the softc so that the hardware dependent probe can adjust
545 	 * accordingly. In general, you don't want to permanently disrupt
546 	 * console I/O.
547 	 */
548 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
549 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
550 	sc->sc_bas.chan = chan;
551 	sc->sc_bas.regshft = regshft;
552 	sc->sc_bas.regiowidth = regiowidth;
553 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
554 
555 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
556 		if (chan == sysdev->bas.chan &&
557 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
558 			/* XXX check if ops matches class. */
559 			sc->sc_sysdev = sysdev;
560 			sysdev->bas.rclk = sc->sc_bas.rclk;
561 		}
562 	}
563 
564 	error = UART_PROBE(sc);
565 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
566 	return ((error) ? error : BUS_PROBE_DEFAULT);
567 }
568 
569 int
570 uart_bus_attach(device_t dev)
571 {
572 	struct uart_softc *sc, *sc0;
573 	const char *sep;
574 	int error, filt;
575 
576 	/*
577 	 * The sc_class field defines the type of UART we're going to work
578 	 * with and thus the size of the softc. Replace the generic softc
579 	 * with one that matches the UART now that we're certain we handle
580 	 * the device.
581 	 */
582 	sc0 = device_get_softc(dev);
583 	if (sc0->sc_class->size > device_get_driver(dev)->size) {
584 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
585 		bcopy(sc0, sc, sizeof(*sc));
586 		device_set_softc(dev, sc);
587 	} else
588 		sc = sc0;
589 
590 	/*
591 	 * Now that we know the softc for this device, connect the back
592 	 * pointer from the sysdev for this device, if any
593 	 */
594 	if (sc->sc_sysdev != NULL)
595 		sc->sc_sysdev->sc = sc;
596 
597 	/*
598 	 * Protect ourselves against interrupts while we're not completely
599 	 * finished attaching and initializing. We don't expect interrupts
600 	 * until after UART_ATTACH(), though.
601 	 */
602 	sc->sc_leaving = 1;
603 
604 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
605 	if (sc->sc_hwmtx == NULL)
606 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
607 
608 	/*
609 	 * Re-allocate. We expect that the softc contains the information
610 	 * collected by uart_bus_probe() intact.
611 	 */
612 	sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
613 	    RF_ACTIVE);
614 	if (sc->sc_rres == NULL) {
615 		mtx_destroy(&sc->sc_hwmtx_s);
616 		return (ENXIO);
617 	}
618 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
619 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
620 
621 	/*
622 	 * Ensure there is room for at least three full FIFOs of data in the
623 	 * receive buffer (handles the case of low-level drivers with huge
624 	 * FIFOs), and also ensure that there is no less than the historical
625 	 * size of 384 bytes (handles the typical small-FIFO case).
626 	 */
627 	sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
628 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
629 	    M_UART, M_WAITOK);
630 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
631 	    M_UART, M_WAITOK);
632 
633 	error = UART_ATTACH(sc);
634 	if (error)
635 		goto fail;
636 
637 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
638 		sep = "";
639 		device_print_prettyname(dev);
640 		if (sc->sc_hwiflow) {
641 			printf("%sRTS iflow", sep);
642 			sep = ", ";
643 		}
644 		if (sc->sc_hwoflow) {
645 			printf("%sCTS oflow", sep);
646 			sep = ", ";
647 		}
648 		printf("\n");
649 	}
650 
651 	if (sc->sc_sysdev != NULL) {
652 		if (sc->sc_sysdev->baudrate == 0) {
653 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
654 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
655 				sc->sc_sysdev->baudrate = -1;
656 		}
657 		switch (sc->sc_sysdev->type) {
658 		case UART_DEV_CONSOLE:
659 			device_printf(dev, "console");
660 			break;
661 		case UART_DEV_DBGPORT:
662 			device_printf(dev, "debug port");
663 			break;
664 		case UART_DEV_KEYBOARD:
665 			device_printf(dev, "keyboard");
666 			break;
667 		default:
668 			device_printf(dev, "unknown system device");
669 			break;
670 		}
671 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
672 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
673 		    sc->sc_sysdev->stopbits);
674 	}
675 
676 	sc->sc_leaving = 0;
677 	sc->sc_testintr = 1;
678 	filt = uart_intr(sc);
679 	sc->sc_testintr = 0;
680 
681 	/*
682 	 * Don't use interrupts if we couldn't clear any pending interrupt
683 	 * conditions. We may have broken H/W and polling is probably the
684 	 * safest thing to do.
685 	 */
686 	if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) {
687 		sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
688 		    &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
689 	}
690 	if (sc->sc_ires != NULL) {
691 		error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
692 		    uart_intr, NULL, sc, &sc->sc_icookie);
693 		sc->sc_fastintr = (error == 0) ? 1 : 0;
694 
695 		if (!sc->sc_fastintr)
696 			error = bus_setup_intr(dev, sc->sc_ires,
697 			    INTR_TYPE_TTY | INTR_MPSAFE, NULL,
698 			    (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
699 
700 		if (error) {
701 			device_printf(dev, "could not activate interrupt\n");
702 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
703 			    sc->sc_ires);
704 			sc->sc_ires = NULL;
705 		}
706 	}
707 	if (sc->sc_ires == NULL) {
708 		/* No interrupt resource. Force polled mode. */
709 		sc->sc_polled = 1;
710 		callout_init(&sc->sc_timer, 1);
711 		callout_reset(&sc->sc_timer, hz / uart_poll_freq,
712 		    (timeout_t *)uart_intr, sc);
713 	}
714 
715 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
716 		sep = "";
717 		device_print_prettyname(dev);
718 		if (sc->sc_fastintr) {
719 			printf("%sfast interrupt", sep);
720 			sep = ", ";
721 		}
722 		if (sc->sc_polled) {
723 			printf("%spolled mode (%dHz)", sep, uart_poll_freq);
724 			sep = ", ";
725 		}
726 		printf("\n");
727 	}
728 
729 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
730 		if ((error = sc->sc_sysdev->attach(sc)) != 0)
731 			goto fail;
732 	} else {
733 		if ((error = uart_tty_attach(sc)) != 0)
734 			goto fail;
735 		uart_pps_init(sc);
736 	}
737 
738 	if (sc->sc_sysdev != NULL)
739 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
740 
741 	return (0);
742 
743  fail:
744 	free(sc->sc_txbuf, M_UART);
745 	free(sc->sc_rxbuf, M_UART);
746 
747 	if (sc->sc_ires != NULL) {
748 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
749 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
750 		    sc->sc_ires);
751 	}
752 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
753 
754 	mtx_destroy(&sc->sc_hwmtx_s);
755 
756 	return (error);
757 }
758 
759 int
760 uart_bus_detach(device_t dev)
761 {
762 	struct uart_softc *sc;
763 
764 	sc = device_get_softc(dev);
765 
766 	sc->sc_leaving = 1;
767 
768 	if (sc->sc_sysdev != NULL)
769 		sc->sc_sysdev->hwmtx = NULL;
770 
771 	UART_DETACH(sc);
772 
773 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
774 		(*sc->sc_sysdev->detach)(sc);
775 	else
776 		uart_tty_detach(sc);
777 
778 	free(sc->sc_txbuf, M_UART);
779 	free(sc->sc_rxbuf, M_UART);
780 
781 	if (sc->sc_ires != NULL) {
782 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
783 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
784 		    sc->sc_ires);
785 	}
786 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
787 
788 	mtx_destroy(&sc->sc_hwmtx_s);
789 
790 	if (sc->sc_class->size > device_get_driver(dev)->size) {
791 		device_set_softc(dev, NULL);
792 		free(sc, M_UART);
793 	}
794 
795 	return (0);
796 }
797 
798 int
799 uart_bus_resume(device_t dev)
800 {
801 	struct uart_softc *sc;
802 
803 	sc = device_get_softc(dev);
804 	return (UART_ATTACH(sc));
805 }
806 
807 void
808 uart_grab(struct uart_devinfo *di)
809 {
810 
811 	if (di->sc)
812 		UART_GRAB(di->sc);
813 }
814 
815 void
816 uart_ungrab(struct uart_devinfo *di)
817 {
818 
819 	if (di->sc)
820 		UART_UNGRAB(di->sc);
821 }
822