1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2006 Marcel Moolenaar All rights reserved. 5 * Copyright (c) 2001 M. Warner Losh <imp@FreeBSD.org> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 #include <sys/conf.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <machine/bus.h> 35 #include <sys/rman.h> 36 #include <machine/resource.h> 37 38 #include <dev/pci/pcivar.h> 39 #include <dev/pci/pcireg.h> 40 41 #include <dev/uart/uart.h> 42 #include <dev/uart/uart_bus.h> 43 #include <dev/uart/uart_cpu.h> 44 45 #define DEFAULT_RCLK 1843200 46 47 static int uart_pci_probe(device_t dev); 48 static int uart_pci_attach(device_t dev); 49 static int uart_pci_detach(device_t dev); 50 51 static device_method_t uart_pci_methods[] = { 52 /* Device interface */ 53 DEVMETHOD(device_probe, uart_pci_probe), 54 DEVMETHOD(device_attach, uart_pci_attach), 55 DEVMETHOD(device_detach, uart_pci_detach), 56 DEVMETHOD(device_resume, uart_bus_resume), 57 DEVMETHOD_END 58 }; 59 60 static driver_t uart_pci_driver = { 61 uart_driver_name, 62 uart_pci_methods, 63 sizeof(struct uart_softc), 64 }; 65 66 struct pci_id { 67 uint16_t vendor; 68 uint16_t device; 69 uint16_t subven; 70 uint16_t subdev; 71 const char *desc; 72 int rid; 73 int rclk; 74 int regshft; 75 }; 76 77 struct pci_unique_id { 78 uint16_t vendor; 79 uint16_t device; 80 }; 81 82 #define PCI_NO_MSI 0x40000000 83 #define PCI_RID_MASK 0x0000ffff 84 85 static const struct pci_id pci_ns8250_ids[] = { 86 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14, 87 128 * DEFAULT_RCLK }, 88 { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14, 89 128 * DEFAULT_RCLK }, 90 { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 }, 91 { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 }, 92 { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2", 93 0x10 }, 94 { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 }, 95 { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 }, 96 { 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 }, 97 { 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 }, 98 { 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 }, 99 { 0x125b, 0x9100, 0xa000, 0x1000, 100 "ASIX AX99100 PCIe 1/2/3/4-port RS-232/422/485", 0x10 }, 101 { 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 }, 102 { 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 }, 103 { 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 }, 104 { 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 }, 105 { 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 }, 106 { 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 }, 107 { 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 }, 108 { 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 }, 109 { 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 }, 110 { 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 }, 111 { 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530", 112 0x18 }, 113 { 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 }, 114 { 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 }, 115 { 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 }, 116 { 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10, 117 8 * DEFAULT_RCLK }, 118 { 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10, 119 8 * DEFAULT_RCLK }, 120 { 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10, 121 8 * DEFAULT_RCLK }, 122 { 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10, 123 8 * DEFAULT_RCLK }, 124 { 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10, 125 8 * DEFAULT_RCLK }, 126 { 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART", 127 0x10, 16384000 }, 128 { 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART", 129 0x10 }, 130 { 0x14e4, 0x160a, 0xffff, 0, "Broadcom TruManage UART", 0x10, 131 128 * DEFAULT_RCLK, 2}, 132 { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10}, 133 { 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 }, 134 { 0x1d0f, 0x8250, 0x0000, 0, "Amazon PCI serial device", 0x10 }, 135 { 0x1d0f, 0x8250, 0x1d0f, 0, "Amazon PCI serial device", 0x10 }, 136 { 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10, 137 8 * DEFAULT_RCLK }, 138 { 0x8086, 0x0c5f, 0xffff, 0, "Atom Processor S1200 UART", 139 0x10 | PCI_NO_MSI }, 140 { 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10, 141 24 * DEFAULT_RCLK, 2 }, 142 { 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10, 143 24 * DEFAULT_RCLK, 2 }, 144 { 0x8086, 0x108f, 0xffff, 0, "Intel AMT - SOL", 0x10 }, 145 { 0x8086, 0x19d8, 0xffff, 0, "Intel Denverton UART", 0x10 }, 146 { 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 }, 147 { 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller", 148 0x10 }, 149 { 0x8086, 0x1e3d, 0xffff, 0, "Intel Panther Point KT Controller", 0x10 }, 150 { 0x8086, 0x228a, 0xffff, 0, "Intel Cherryview SIO HSUART#1", 0x10, 151 24 * DEFAULT_RCLK, 2 }, 152 { 0x8086, 0x228c, 0xffff, 0, "Intel Cherryview SIO HSUART#2", 0x10, 153 24 * DEFAULT_RCLK, 2 }, 154 { 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 }, 155 { 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 }, 156 { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 }, 157 { 0x8086, 0x31bc, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 0", 0x10, 158 24 * DEFAULT_RCLK, 2 }, 159 { 0x8086, 0x31be, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 1", 0x10, 160 24 * DEFAULT_RCLK, 2 }, 161 { 0x8086, 0x31c0, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 2", 0x10, 162 24 * DEFAULT_RCLK, 2 }, 163 { 0x8086, 0x31ee, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 3", 0x10, 164 24 * DEFAULT_RCLK, 2 }, 165 { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller", 166 0x10 }, 167 { 0x8086, 0x5abc, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 0", 0x10, 168 24 * DEFAULT_RCLK, 2 }, 169 { 0x8086, 0x5abe, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 1", 0x10, 170 24 * DEFAULT_RCLK, 2 }, 171 { 0x8086, 0x5ac0, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 2", 0x10, 172 24 * DEFAULT_RCLK, 2 }, 173 { 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10, 174 24 * DEFAULT_RCLK, 2 }, 175 { 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 }, 176 { 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 }, 177 { 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 }, 178 { 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 }, 179 { 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 }, 180 { 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 }, 181 { 0x8086, 0x8d3d, 0xffff, 0, 182 "Intel Corporation C610/X99 series chipset KT Controller", 0x10 }, 183 { 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 }, 184 { 0x8086, 0xa13d, 0xffff, 0, 185 "100 Series/C230 Series Chipset Family KT Redirection", 186 0x10 | PCI_NO_MSI }, 187 { 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 }, 188 { 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 }, 189 { 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 }, 190 { 0x9710, 0x9900, 0xa000, 0x1000, 191 "MosChip MCS9900 PCIe to Peripheral Controller", 0x10 }, 192 { 0x9710, 0x9901, 0xa000, 0x1000, 193 "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 }, 194 { 0x9710, 0x9904, 0xa000, 0x1000, 195 "MosChip MCS9904 PCIe to Peripheral Controller", 0x10 }, 196 { 0x9710, 0x9922, 0xa000, 0x1000, 197 "MosChip MCS9922 PCIe to Peripheral Controller", 0x10 }, 198 { 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 }, 199 { 0xffff, 0, 0xffff, 0, NULL, 0, 0} 200 }; 201 202 const static struct pci_id * 203 uart_pci_match(device_t dev, const struct pci_id *id) 204 { 205 uint16_t device, subdev, subven, vendor; 206 207 vendor = pci_get_vendor(dev); 208 device = pci_get_device(dev); 209 while (id->vendor != 0xffff && 210 (id->vendor != vendor || id->device != device)) 211 id++; 212 if (id->vendor == 0xffff) 213 return (NULL); 214 if (id->subven == 0xffff) 215 return (id); 216 subven = pci_get_subvendor(dev); 217 subdev = pci_get_subdevice(dev); 218 while (id->vendor == vendor && id->device == device && 219 (id->subven != subven || id->subdev != subdev)) 220 id++; 221 return ((id->vendor == vendor && id->device == device) ? id : NULL); 222 } 223 224 extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; 225 226 /* PCI vendor/device pairs of devices guaranteed to be unique on a system. */ 227 static const struct pci_unique_id pci_unique_devices[] = { 228 { 0x1d0f, 0x8250 } /* Amazon PCI serial device */ 229 }; 230 231 /* Match a UART to a console if it's a PCI device known to be unique. */ 232 static void 233 uart_pci_unique_console_match(device_t dev) 234 { 235 struct uart_softc *sc; 236 struct uart_devinfo * sysdev; 237 const struct pci_unique_id * id; 238 uint16_t vendor, device; 239 240 sc = device_get_softc(dev); 241 vendor = pci_get_vendor(dev); 242 device = pci_get_device(dev); 243 244 /* Is this a device known to exist only once in a system? */ 245 for (id = pci_unique_devices; ; id++) { 246 if (id == &pci_unique_devices[nitems(pci_unique_devices)]) 247 return; 248 if (id->vendor == vendor && id->device == device) 249 break; 250 } 251 252 /* If it matches a console, it must be the same device. */ 253 SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 254 if (sysdev->pci_info.vendor == vendor && 255 sysdev->pci_info.device == device) { 256 sc->sc_sysdev = sysdev; 257 sysdev->bas.rclk = sc->sc_bas.rclk; 258 } 259 } 260 } 261 262 static int 263 uart_pci_probe(device_t dev) 264 { 265 struct uart_softc *sc; 266 const struct pci_id *id; 267 struct pci_id cid = { 268 .regshft = 0, 269 .rclk = 0, 270 .rid = 0x10 | PCI_NO_MSI, 271 .desc = "Generic SimpleComm PCI device", 272 }; 273 int result; 274 275 sc = device_get_softc(dev); 276 277 id = uart_pci_match(dev, pci_ns8250_ids); 278 if (id != NULL) { 279 sc->sc_class = &uart_ns8250_class; 280 goto match; 281 } 282 if (pci_get_class(dev) == PCIC_SIMPLECOMM && 283 pci_get_subclass(dev) == PCIS_SIMPLECOMM_UART && 284 pci_get_progif(dev) < PCIP_SIMPLECOMM_UART_16550A) { 285 /* XXX rclk what to do */ 286 id = &cid; 287 sc->sc_class = &uart_ns8250_class; 288 goto match; 289 } 290 /* Add checks for non-ns8250 IDs here. */ 291 return (ENXIO); 292 293 match: 294 result = uart_bus_probe(dev, id->regshft, 0, id->rclk, 295 id->rid & PCI_RID_MASK, 0, 0); 296 /* Bail out on error. */ 297 if (result > 0) 298 return (result); 299 /* 300 * If we haven't already matched this to a console, check if it's a 301 * PCI device which is known to only exist once in any given system 302 * and we can match it that way. 303 */ 304 if (sc->sc_sysdev == NULL) 305 uart_pci_unique_console_match(dev); 306 /* Set/override the device description. */ 307 if (id->desc) 308 device_set_desc(dev, id->desc); 309 return (result); 310 } 311 312 static int 313 uart_pci_attach(device_t dev) 314 { 315 struct uart_softc *sc; 316 const struct pci_id *id; 317 int count; 318 319 sc = device_get_softc(dev); 320 321 /* 322 * Use MSI in preference to legacy IRQ if available. However, experience 323 * suggests this is only reliable when one MSI vector is advertised. 324 */ 325 id = uart_pci_match(dev, pci_ns8250_ids); 326 if ((id == NULL || (id->rid & PCI_NO_MSI) == 0) && 327 pci_msi_count(dev) == 1) { 328 count = 1; 329 if (pci_alloc_msi(dev, &count) == 0) { 330 sc->sc_irid = 1; 331 device_printf(dev, "Using %d MSI message\n", count); 332 } 333 } 334 335 return (uart_bus_attach(dev)); 336 } 337 338 static int 339 uart_pci_detach(device_t dev) 340 { 341 struct uart_softc *sc; 342 343 sc = device_get_softc(dev); 344 345 if (sc->sc_irid != 0) 346 pci_release_msi(dev); 347 348 return (uart_bus_detach(dev)); 349 } 350 351 DRIVER_MODULE(uart, pci, uart_pci_driver, NULL, NULL); 352