xref: /freebsd/sys/dev/uart/uart_bus_pci.c (revision 9c999a259f00b35f0467acd351fea9157ed7e1e4)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 Marcel Moolenaar All rights reserved.
5  * Copyright (c) 2001 M. Warner Losh <imp@FreeBSD.org>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/conf.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <machine/bus.h>
38 #include <sys/rman.h>
39 #include <machine/resource.h>
40 
41 #include <dev/pci/pcivar.h>
42 #include <dev/pci/pcireg.h>
43 
44 #include <dev/uart/uart.h>
45 #include <dev/uart/uart_bus.h>
46 
47 #define	DEFAULT_RCLK	1843200
48 
49 static int uart_pci_probe(device_t dev);
50 static int uart_pci_attach(device_t dev);
51 static int uart_pci_detach(device_t dev);
52 
53 static device_method_t uart_pci_methods[] = {
54 	/* Device interface */
55 	DEVMETHOD(device_probe,		uart_pci_probe),
56 	DEVMETHOD(device_attach,	uart_pci_attach),
57 	DEVMETHOD(device_detach,	uart_pci_detach),
58 	DEVMETHOD(device_resume,	uart_bus_resume),
59 	DEVMETHOD_END
60 };
61 
62 static driver_t uart_pci_driver = {
63 	uart_driver_name,
64 	uart_pci_methods,
65 	sizeof(struct uart_softc),
66 };
67 
68 struct pci_id {
69 	uint16_t	vendor;
70 	uint16_t	device;
71 	uint16_t	subven;
72 	uint16_t	subdev;
73 	const char	*desc;
74 	int		rid;
75 	int		rclk;
76 	int		regshft;
77 };
78 
79 #define PCI_NO_MSI	0x40000000
80 #define PCI_RID_MASK	0x0000ffff
81 
82 static const struct pci_id pci_ns8250_ids[] = {
83 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
84 	128 * DEFAULT_RCLK },
85 { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
86 	128 * DEFAULT_RCLK },
87 { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
88 { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
89 { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
90 	0x10 },
91 { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
92 { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
93 { 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 },
94 { 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 },
95 { 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 },
96 { 0x125b, 0x9100, 0xa000, 0x1000,
97 	"ASIX AX99100 PCIe 1/2/3/4-port RS-232/422/485", 0x10 },
98 { 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 },
99 { 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 },
100 { 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 },
101 { 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 },
102 { 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 },
103 { 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 },
104 { 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 },
105 { 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 },
106 { 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 },
107 { 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 },
108 { 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530",
109 	0x18 },
110 { 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 },
111 { 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 },
112 { 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 },
113 { 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10,
114 	8 * DEFAULT_RCLK },
115 { 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10,
116 	8 * DEFAULT_RCLK },
117 { 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10,
118 	8 * DEFAULT_RCLK },
119 { 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10,
120 	8 * DEFAULT_RCLK },
121 { 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10,
122 	8 * DEFAULT_RCLK },
123 { 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART",
124 	0x10, 16384000 },
125 { 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
126 	0x10 },
127 { 0x14e4, 0x160a, 0xffff, 0, "Broadcom TruManage UART", 0x10,
128 	128 * DEFAULT_RCLK, 2},
129 { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},
130 { 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 },
131 { 0x1d0f, 0x8250, 0x0000, 0, "Amazon PCI serial device", 0x10 },
132 { 0x1d0f, 0x8250, 0x1d0f, 0, "Amazon PCI serial device", 0x10 },
133 { 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10,
134 	8 * DEFAULT_RCLK },
135 { 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10,
136 	24 * DEFAULT_RCLK, 2 },
137 { 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
138 	24 * DEFAULT_RCLK, 2 },
139 { 0x8086, 0x108f, 0xffff, 0, "Intel AMT - SOL", 0x10 },
140 { 0x8086, 0x19d8, 0xffff, 0, "Intel Denverton UART", 0x10 },
141 { 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 },
142 { 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller",
143 	0x10 },
144 { 0x8086, 0x1e3d, 0xffff, 0, "Intel Panther Point KT Controller", 0x10 },
145 { 0x8086, 0x228a, 0xffff, 0, "Intel Cherryview SIO HSUART#1", 0x10,
146 	24 * DEFAULT_RCLK, 2 },
147 { 0x8086, 0x228c, 0xffff, 0, "Intel Cherryview SIO HSUART#2", 0x10,
148 	24 * DEFAULT_RCLK, 2 },
149 { 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 },
150 { 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 },
151 { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 },
152 { 0x8086, 0x31bc, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 0", 0x10,
153 	24 * DEFAULT_RCLK, 2 },
154 { 0x8086, 0x31be, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 1", 0x10,
155 	24 * DEFAULT_RCLK, 2 },
156 { 0x8086, 0x31c0, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 2", 0x10,
157 	24 * DEFAULT_RCLK, 2 },
158 { 0x8086, 0x31ee, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 3", 0x10,
159 	24 * DEFAULT_RCLK, 2 },
160 { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller",
161 	0x10 },
162 { 0x8086, 0x5abc, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 0", 0x10,
163 	24 * DEFAULT_RCLK, 2 },
164 { 0x8086, 0x5abe, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 1", 0x10,
165 	24 * DEFAULT_RCLK, 2 },
166 { 0x8086, 0x5ac0, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 2", 0x10,
167 	24 * DEFAULT_RCLK, 2 },
168 { 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10,
169 	24 * DEFAULT_RCLK, 2 },
170 { 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
171 { 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
172 { 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
173 { 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
174 { 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
175 { 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
176 { 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 },
177 { 0x8086, 0xa13d, 0xffff, 0,
178 	"100 Series/C230 Series Chipset Family KT Redirection",
179 	0x10 | PCI_NO_MSI },
180 { 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
181 { 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
182 { 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
183 { 0x9710, 0x9900, 0xa000, 0x1000,
184 	"MosChip MCS9900 PCIe to Peripheral Controller", 0x10 },
185 { 0x9710, 0x9901, 0xa000, 0x1000,
186 	"MosChip MCS9901 PCIe to Peripheral Controller", 0x10 },
187 { 0x9710, 0x9904, 0xa000, 0x1000,
188 	"MosChip MCS9904 PCIe to Peripheral Controller", 0x10 },
189 { 0x9710, 0x9922, 0xa000, 0x1000,
190 	"MosChip MCS9922 PCIe to Peripheral Controller", 0x10 },
191 { 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 },
192 { 0xffff, 0, 0xffff, 0, NULL, 0, 0}
193 };
194 
195 const static struct pci_id *
196 uart_pci_match(device_t dev, const struct pci_id *id)
197 {
198 	uint16_t device, subdev, subven, vendor;
199 
200 	vendor = pci_get_vendor(dev);
201 	device = pci_get_device(dev);
202 	while (id->vendor != 0xffff &&
203 	    (id->vendor != vendor || id->device != device))
204 		id++;
205 	if (id->vendor == 0xffff)
206 		return (NULL);
207 	if (id->subven == 0xffff)
208 		return (id);
209 	subven = pci_get_subvendor(dev);
210 	subdev = pci_get_subdevice(dev);
211 	while (id->vendor == vendor && id->device == device &&
212 	    (id->subven != subven || id->subdev != subdev))
213 		id++;
214 	return ((id->vendor == vendor && id->device == device) ? id : NULL);
215 }
216 
217 static int
218 uart_pci_probe(device_t dev)
219 {
220 	struct uart_softc *sc;
221 	const struct pci_id *id;
222 	struct pci_id cid = {
223 		.regshft = 0,
224 		.rclk = 0,
225 		.rid = 0x10 | PCI_NO_MSI,
226 		.desc = "Generic SimpleComm PCI device",
227 	};
228 	int result;
229 
230 	sc = device_get_softc(dev);
231 
232 	id = uart_pci_match(dev, pci_ns8250_ids);
233 	if (id != NULL) {
234 		sc->sc_class = &uart_ns8250_class;
235 		goto match;
236 	}
237 	if (pci_get_class(dev) == PCIC_SIMPLECOMM &&
238 	    pci_get_subclass(dev) == PCIS_SIMPLECOMM_UART &&
239 	    pci_get_progif(dev) < PCIP_SIMPLECOMM_UART_16550A) {
240 		/* XXX rclk what to do */
241 		id = &cid;
242 		sc->sc_class = &uart_ns8250_class;
243 		goto match;
244 	}
245 	/* Add checks for non-ns8250 IDs here. */
246 	return (ENXIO);
247 
248  match:
249 	result = uart_bus_probe(dev, id->regshft, 0, id->rclk,
250 	    id->rid & PCI_RID_MASK, 0, 0);
251 	/* Bail out on error. */
252 	if (result > 0)
253 		return (result);
254 	/* Set/override the device description. */
255 	if (id->desc)
256 		device_set_desc(dev, id->desc);
257 	return (result);
258 }
259 
260 static int
261 uart_pci_attach(device_t dev)
262 {
263 	struct uart_softc *sc;
264 	const struct pci_id *id;
265 	int count;
266 
267 	sc = device_get_softc(dev);
268 
269 	/*
270 	 * Use MSI in preference to legacy IRQ if available. However, experience
271 	 * suggests this is only reliable when one MSI vector is advertised.
272 	 */
273 	id = uart_pci_match(dev, pci_ns8250_ids);
274 	if ((id == NULL || (id->rid & PCI_NO_MSI) == 0) &&
275 	    pci_msi_count(dev) == 1) {
276 		count = 1;
277 		if (pci_alloc_msi(dev, &count) == 0) {
278 			sc->sc_irid = 1;
279 			device_printf(dev, "Using %d MSI message\n", count);
280 		}
281 	}
282 
283 	return (uart_bus_attach(dev));
284 }
285 
286 static int
287 uart_pci_detach(device_t dev)
288 {
289 	struct uart_softc *sc;
290 
291 	sc = device_get_softc(dev);
292 
293 	if (sc->sc_irid != 0)
294 		pci_release_msi(dev);
295 
296 	return (uart_bus_detach(dev));
297 }
298 
299 DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL);
300