1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2003 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _DEV_UART_BUS_H_ 32 #define _DEV_UART_BUS_H_ 33 34 #ifndef KLD_MODULE 35 #include "opt_uart.h" 36 #endif 37 38 #include <sys/serial.h> 39 #include <sys/timepps.h> 40 41 /* Drain and flush targets. */ 42 #define UART_DRAIN_RECEIVER 0x0001 43 #define UART_DRAIN_TRANSMITTER 0x0002 44 #define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER 45 #define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER 46 47 /* Received character status bits. */ 48 #define UART_STAT_BREAK 0x0100 49 #define UART_STAT_FRAMERR 0x0200 50 #define UART_STAT_OVERRUN 0x0400 51 #define UART_STAT_PARERR 0x0800 52 53 /* UART_IOCTL() requests */ 54 #define UART_IOCTL_BREAK 1 55 #define UART_IOCTL_IFLOW 2 56 #define UART_IOCTL_OFLOW 3 57 #define UART_IOCTL_BAUD 4 58 59 /* UART quirk flags */ 60 #define UART_F_BUSY_DETECT 0x1 61 #define UART_F_IGNORE_SPCR_REGSHFT 0x2 62 63 /* 64 * UART class & instance (=softc) 65 */ 66 struct uart_class { 67 KOBJ_CLASS_FIELDS; 68 struct uart_ops *uc_ops; /* Low-level console operations. */ 69 u_int uc_range; /* Bus space address range. */ 70 u_int uc_rclk; /* Default rclk for this device. */ 71 u_int uc_rshift; /* Default regshift for this device. */ 72 u_int uc_riowidth; /* Default reg io width for this device. */ 73 }; 74 75 struct uart_softc { 76 KOBJ_FIELDS; 77 struct uart_class *sc_class; 78 struct uart_bas sc_bas; 79 device_t sc_dev; 80 81 struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */ 82 struct mtx *sc_hwmtx; 83 84 struct resource *sc_rres; /* Register resource. */ 85 int sc_rrid; 86 int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */ 87 struct resource *sc_ires; /* Interrupt resource. */ 88 void *sc_icookie; 89 int sc_irid; 90 struct callout sc_timer; 91 92 bool sc_callout:1; /* This UART is opened for callout. */ 93 bool sc_fastintr:1; /* This UART uses fast interrupts. */ 94 bool sc_hwiflow:1; /* This UART has HW input flow ctl. */ 95 bool sc_hwoflow:1; /* This UART has HW output flow ctl. */ 96 bool sc_leaving:1; /* This UART is going away. */ 97 bool sc_opened:1; /* This UART is open for business. */ 98 bool sc_polled:1; /* This UART has no interrupts. */ 99 bool sc_txbusy:1; /* This UART is transmitting. */ 100 bool sc_isquelch:1; /* This UART has input squelched. */ 101 bool sc_testintr:1; /* This UART is under int. testing. */ 102 103 struct uart_devinfo *sc_sysdev; /* System device (or NULL). */ 104 105 int sc_altbrk; /* State for alt break sequence. */ 106 uint32_t sc_hwsig; /* Signal state. Used by HW driver. */ 107 108 /* Receiver data. */ 109 uint16_t *sc_rxbuf; 110 int sc_rxbufsz; 111 int sc_rxput; 112 int sc_rxget; 113 int sc_rxfifosz; /* Size of RX FIFO. */ 114 int sc_rxoverruns; 115 116 /* Transmitter data. */ 117 uint8_t *sc_txbuf; 118 int sc_txdatasz; 119 int sc_txfifosz; /* Size of TX FIFO and buffer. */ 120 121 /* Pulse capturing support (PPS). */ 122 struct pps_state sc_pps; 123 int sc_pps_mode; 124 sbintime_t sc_pps_captime; 125 126 /* Upper layer data. */ 127 void *sc_softih; 128 uint32_t sc_ttypend; 129 union { 130 /* TTY specific data. */ 131 struct { 132 struct tty *tp; 133 } u_tty; 134 /* Keyboard specific data. */ 135 struct { 136 } u_kbd; 137 } sc_u; 138 }; 139 140 extern const char uart_driver_name[]; 141 142 int uart_bus_attach(device_t dev); 143 int uart_bus_detach(device_t dev); 144 int uart_bus_resume(device_t dev); 145 serdev_intr_t *uart_bus_ihand(device_t dev, int ipend); 146 int uart_bus_ipend(device_t dev); 147 int uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan, int quirks); 148 int uart_bus_sysdev(device_t dev); 149 150 void uart_sched_softih(struct uart_softc *, uint32_t); 151 152 int uart_tty_attach(struct uart_softc *); 153 int uart_tty_detach(struct uart_softc *); 154 struct mtx *uart_tty_getlock(struct uart_softc *); 155 void uart_tty_intr(void *arg); 156 157 /* 158 * Receive buffer operations. 159 */ 160 static __inline int 161 uart_rx_empty(struct uart_softc *sc) 162 { 163 164 return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0); 165 } 166 167 static __inline int 168 uart_rx_full(struct uart_softc *sc) 169 { 170 171 return ((sc->sc_rxput + 1 < sc->sc_rxbufsz) ? 172 (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0)); 173 } 174 175 static __inline int 176 uart_rx_get(struct uart_softc *sc) 177 { 178 int ptr, xc; 179 180 ptr = sc->sc_rxget; 181 if (ptr == sc->sc_rxput) 182 return (-1); 183 xc = sc->sc_rxbuf[ptr++]; 184 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; 185 return (xc); 186 } 187 188 static __inline int 189 uart_rx_next(struct uart_softc *sc) 190 { 191 int ptr; 192 193 ptr = sc->sc_rxget; 194 if (ptr == sc->sc_rxput) 195 return (-1); 196 ptr += 1; 197 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; 198 return (0); 199 } 200 201 static __inline int 202 uart_rx_peek(struct uart_softc *sc) 203 { 204 int ptr; 205 206 ptr = sc->sc_rxget; 207 return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]); 208 } 209 210 static __inline int 211 uart_rx_put(struct uart_softc *sc, int xc) 212 { 213 int ptr; 214 215 ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0; 216 if (ptr == sc->sc_rxget) 217 return (ENOSPC); 218 sc->sc_rxbuf[sc->sc_rxput] = xc; 219 sc->sc_rxput = ptr; 220 return (0); 221 } 222 223 #endif /* _DEV_UART_BUS_H_ */ 224