1 /*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _DEV_UART_BUS_H_ 30 #define _DEV_UART_BUS_H_ 31 32 #ifndef KLD_MODULE 33 #include "opt_uart.h" 34 #endif 35 36 #include <sys/serial.h> 37 #include <sys/timepps.h> 38 39 /* Drain and flush targets. */ 40 #define UART_DRAIN_RECEIVER 0x0001 41 #define UART_DRAIN_TRANSMITTER 0x0002 42 #define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER 43 #define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER 44 45 /* Received character status bits. */ 46 #define UART_STAT_BREAK 0x0100 47 #define UART_STAT_FRAMERR 0x0200 48 #define UART_STAT_OVERRUN 0x0400 49 #define UART_STAT_PARERR 0x0800 50 51 /* UART_IOCTL() requests */ 52 #define UART_IOCTL_BREAK 1 53 #define UART_IOCTL_IFLOW 2 54 #define UART_IOCTL_OFLOW 3 55 #define UART_IOCTL_BAUD 4 56 57 /* 58 * UART class & instance (=softc) 59 */ 60 struct uart_class { 61 KOBJ_CLASS_FIELDS; 62 struct uart_ops *uc_ops; /* Low-level console operations. */ 63 u_int uc_range; /* Bus space address range. */ 64 u_int uc_rclk; /* Default rclk for this device. */ 65 u_int uc_rshift; /* Default regshift for this device. */ 66 }; 67 68 struct uart_softc { 69 KOBJ_FIELDS; 70 struct uart_class *sc_class; 71 struct uart_bas sc_bas; 72 device_t sc_dev; 73 74 struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */ 75 struct mtx *sc_hwmtx; 76 77 struct resource *sc_rres; /* Register resource. */ 78 int sc_rrid; 79 int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */ 80 struct resource *sc_ires; /* Interrupt resource. */ 81 void *sc_icookie; 82 int sc_irid; 83 struct callout sc_timer; 84 85 int sc_callout:1; /* This UART is opened for callout. */ 86 int sc_fastintr:1; /* This UART uses fast interrupts. */ 87 int sc_hwiflow:1; /* This UART has HW input flow ctl. */ 88 int sc_hwoflow:1; /* This UART has HW output flow ctl. */ 89 int sc_leaving:1; /* This UART is going away. */ 90 int sc_opened:1; /* This UART is open for business. */ 91 int sc_polled:1; /* This UART has no interrupts. */ 92 int sc_txbusy:1; /* This UART is transmitting. */ 93 int sc_isquelch:1; /* This UART has input squelched. */ 94 int sc_testintr:1; /* This UART is under int. testing. */ 95 96 struct uart_devinfo *sc_sysdev; /* System device (or NULL). */ 97 98 int sc_altbrk; /* State for alt break sequence. */ 99 uint32_t sc_hwsig; /* Signal state. Used by HW driver. */ 100 101 /* Receiver data. */ 102 uint16_t *sc_rxbuf; 103 int sc_rxbufsz; 104 int sc_rxput; 105 int sc_rxget; 106 int sc_rxfifosz; /* Size of RX FIFO. */ 107 108 /* Transmitter data. */ 109 uint8_t *sc_txbuf; 110 int sc_txdatasz; 111 int sc_txfifosz; /* Size of TX FIFO and buffer. */ 112 113 /* Pulse capturing support (PPS). */ 114 struct pps_state sc_pps; 115 int sc_pps_mode; 116 sbintime_t sc_pps_captime; 117 118 /* Upper layer data. */ 119 void *sc_softih; 120 uint32_t sc_ttypend; 121 union { 122 /* TTY specific data. */ 123 struct { 124 struct tty *tp; 125 } u_tty; 126 /* Keyboard specific data. */ 127 struct { 128 } u_kbd; 129 } sc_u; 130 }; 131 132 extern devclass_t uart_devclass; 133 extern const char uart_driver_name[]; 134 135 int uart_bus_attach(device_t dev); 136 int uart_bus_detach(device_t dev); 137 int uart_bus_resume(device_t dev); 138 serdev_intr_t *uart_bus_ihand(device_t dev, int ipend); 139 int uart_bus_ipend(device_t dev); 140 int uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan); 141 int uart_bus_sysdev(device_t dev); 142 143 void uart_sched_softih(struct uart_softc *, uint32_t); 144 145 int uart_tty_attach(struct uart_softc *); 146 int uart_tty_detach(struct uart_softc *); 147 struct mtx *uart_tty_getlock(struct uart_softc *); 148 void uart_tty_intr(void *arg); 149 150 /* 151 * Receive buffer operations. 152 */ 153 static __inline int 154 uart_rx_empty(struct uart_softc *sc) 155 { 156 157 return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0); 158 } 159 160 static __inline int 161 uart_rx_full(struct uart_softc *sc) 162 { 163 164 return ((sc->sc_rxput + 1 < sc->sc_rxbufsz) ? 165 (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0)); 166 } 167 168 static __inline int 169 uart_rx_get(struct uart_softc *sc) 170 { 171 int ptr, xc; 172 173 ptr = sc->sc_rxget; 174 if (ptr == sc->sc_rxput) 175 return (-1); 176 xc = sc->sc_rxbuf[ptr++]; 177 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; 178 return (xc); 179 } 180 181 static __inline int 182 uart_rx_next(struct uart_softc *sc) 183 { 184 int ptr; 185 186 ptr = sc->sc_rxget; 187 if (ptr == sc->sc_rxput) 188 return (-1); 189 ptr += 1; 190 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; 191 return (0); 192 } 193 194 static __inline int 195 uart_rx_peek(struct uart_softc *sc) 196 { 197 int ptr; 198 199 ptr = sc->sc_rxget; 200 return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]); 201 } 202 203 static __inline int 204 uart_rx_put(struct uart_softc *sc, int xc) 205 { 206 int ptr; 207 208 ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0; 209 if (ptr == sc->sc_rxget) 210 return (ENOSPC); 211 sc->sc_rxbuf[sc->sc_rxput] = xc; 212 sc->sc_rxput = ptr; 213 return (0); 214 } 215 216 #endif /* _DEV_UART_BUS_H_ */ 217