1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2003 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _DEV_UART_H_ 32 #define _DEV_UART_H_ 33 34 /* 35 * Bus access structure. This structure holds the minimum information needed 36 * to access the UART. The rclk field, although not important to actually 37 * access the UART, is important for baudrate programming, delay loops and 38 * other timing related computations. 39 */ 40 struct uart_bas { 41 bus_space_tag_t bst; 42 bus_space_handle_t bsh; 43 u_int chan; 44 u_int rclk; 45 u_int regshft; 46 u_int regiowidth; 47 u_int busy_detect; 48 }; 49 50 #define uart_regofs(bas, reg) ((reg) << (bas)->regshft) 51 #define uart_regiowidth(bas) ((bas)->regiowidth) 52 53 static inline uint32_t 54 uart_getreg(struct uart_bas *bas, int reg) 55 { 56 uint32_t ret; 57 58 switch (uart_regiowidth(bas)) { 59 case 4: 60 ret = bus_space_read_4(bas->bst, bas->bsh, uart_regofs(bas, reg)); 61 break; 62 case 2: 63 ret = bus_space_read_2(bas->bst, bas->bsh, uart_regofs(bas, reg)); 64 break; 65 default: 66 ret = bus_space_read_1(bas->bst, bas->bsh, uart_regofs(bas, reg)); 67 break; 68 } 69 70 return (ret); 71 } 72 73 static inline void 74 uart_setreg(struct uart_bas *bas, int reg, int value) 75 { 76 77 switch (uart_regiowidth(bas)) { 78 case 4: 79 bus_space_write_4(bas->bst, bas->bsh, uart_regofs(bas, reg), value); 80 break; 81 case 2: 82 bus_space_write_2(bas->bst, bas->bsh, uart_regofs(bas, reg), value); 83 break; 84 default: 85 bus_space_write_1(bas->bst, bas->bsh, uart_regofs(bas, reg), value); 86 break; 87 } 88 } 89 90 /* 91 * XXX we don't know the length of the bus space address range in use by 92 * the UART. Since barriers don't use the length field currently, we put 93 * a zero there for now. 94 */ 95 #define uart_barrier(bas) \ 96 bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \ 97 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 98 99 /* 100 * UART device classes. 101 */ 102 struct uart_class; 103 104 extern struct uart_class uart_ns8250_class __attribute__((weak)); 105 extern struct uart_class uart_quicc_class __attribute__((weak)); 106 extern struct uart_class uart_z8530_class __attribute__((weak)); 107 108 /* 109 * Device flags. 110 */ 111 #define UART_FLAGS_CONSOLE(f) ((f) & 0x10) 112 #define UART_FLAGS_DBGPORT(f) ((f) & 0x80) 113 #define UART_FLAGS_FCR_RX_LOW(f) ((f) & 0x100) 114 #define UART_FLAGS_FCR_RX_MEDL(f) ((f) & 0x200) 115 #define UART_FLAGS_FCR_RX_MEDH(f) ((f) & 0x400) 116 #define UART_FLAGS_FCR_RX_HIGH(f) ((f) & 0x800) 117 118 /* 119 * Data parity values (magical numbers related to ns8250). 120 */ 121 #define UART_PARITY_NONE 0 122 #define UART_PARITY_ODD 1 123 #define UART_PARITY_EVEN 3 124 #define UART_PARITY_MARK 5 125 #define UART_PARITY_SPACE 7 126 127 #endif /* _DEV_UART_H_ */ 128