1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2003 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef _DEV_UART_H_ 30 #define _DEV_UART_H_ 31 32 /* 33 * Bus access structure. This structure holds the minimum information needed 34 * to access the UART. The rclk field, although not important to actually 35 * access the UART, is important for baudrate programming, delay loops and 36 * other timing related computations. 37 */ 38 struct uart_bas { 39 bus_space_tag_t bst; 40 bus_space_handle_t bsh; 41 u_int chan; 42 u_int rclk; 43 u_int regshft; 44 u_int regiowidth; 45 u_int busy_detect; 46 }; 47 48 #define uart_regofs(bas, reg) ((reg) << (bas)->regshft) 49 #define uart_regiowidth(bas) ((bas)->regiowidth) 50 51 static inline uint32_t 52 uart_getreg(struct uart_bas *bas, int reg) 53 { 54 uint32_t ret; 55 56 switch (uart_regiowidth(bas)) { 57 case 4: 58 ret = bus_space_read_4(bas->bst, bas->bsh, uart_regofs(bas, reg)); 59 break; 60 case 2: 61 ret = bus_space_read_2(bas->bst, bas->bsh, uart_regofs(bas, reg)); 62 break; 63 default: 64 ret = bus_space_read_1(bas->bst, bas->bsh, uart_regofs(bas, reg)); 65 break; 66 } 67 68 return (ret); 69 } 70 71 static inline void 72 uart_setreg(struct uart_bas *bas, int reg, int value) 73 { 74 75 switch (uart_regiowidth(bas)) { 76 case 4: 77 bus_space_write_4(bas->bst, bas->bsh, uart_regofs(bas, reg), value); 78 break; 79 case 2: 80 bus_space_write_2(bas->bst, bas->bsh, uart_regofs(bas, reg), value); 81 break; 82 default: 83 bus_space_write_1(bas->bst, bas->bsh, uart_regofs(bas, reg), value); 84 break; 85 } 86 } 87 88 /* 89 * XXX we don't know the length of the bus space address range in use by 90 * the UART. Since barriers don't use the length field currently, we put 91 * a zero there for now. 92 */ 93 #define uart_barrier(bas) \ 94 bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \ 95 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 96 97 /* 98 * UART device classes. 99 */ 100 struct uart_class; 101 102 extern struct uart_class uart_ns8250_class __attribute__((weak)); 103 extern struct uart_class uart_quicc_class __attribute__((weak)); 104 extern struct uart_class uart_z8530_class __attribute__((weak)); 105 106 /* 107 * Device flags. 108 */ 109 #define UART_FLAGS_CONSOLE(f) ((f) & 0x10) 110 #define UART_FLAGS_DBGPORT(f) ((f) & 0x80) 111 #define UART_FLAGS_FCR_RX_LOW(f) ((f) & 0x100) 112 #define UART_FLAGS_FCR_RX_MEDL(f) ((f) & 0x200) 113 #define UART_FLAGS_FCR_RX_MEDH(f) ((f) & 0x400) 114 #define UART_FLAGS_FCR_RX_HIGH(f) ((f) & 0x800) 115 116 /* 117 * Data parity values (magical numbers related to ns8250). 118 */ 119 #define UART_PARITY_NONE 0 120 #define UART_PARITY_ODD 1 121 #define UART_PARITY_EVEN 3 122 #define UART_PARITY_MARK 5 123 #define UART_PARITY_SPACE 7 124 125 #endif /* _DEV_UART_H_ */ 126