127d5dc18SMarcel Moolenaar /* 227d5dc18SMarcel Moolenaar * Copyright (c) 2003 Marcel Moolenaar 327d5dc18SMarcel Moolenaar * All rights reserved. 427d5dc18SMarcel Moolenaar * 527d5dc18SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without 627d5dc18SMarcel Moolenaar * modification, are permitted provided that the following conditions 727d5dc18SMarcel Moolenaar * are met: 827d5dc18SMarcel Moolenaar * 927d5dc18SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright 1027d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer. 1127d5dc18SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright 1227d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the 1327d5dc18SMarcel Moolenaar * documentation and/or other materials provided with the distribution. 1427d5dc18SMarcel Moolenaar * 1527d5dc18SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1627d5dc18SMarcel Moolenaar * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1727d5dc18SMarcel Moolenaar * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1827d5dc18SMarcel Moolenaar * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1927d5dc18SMarcel Moolenaar * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2027d5dc18SMarcel Moolenaar * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2127d5dc18SMarcel Moolenaar * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2227d5dc18SMarcel Moolenaar * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2327d5dc18SMarcel Moolenaar * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2427d5dc18SMarcel Moolenaar * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2527d5dc18SMarcel Moolenaar * 2627d5dc18SMarcel Moolenaar * $FreeBSD$ 2727d5dc18SMarcel Moolenaar */ 2827d5dc18SMarcel Moolenaar 2927d5dc18SMarcel Moolenaar #ifndef _DEV_UART_H_ 3027d5dc18SMarcel Moolenaar #define _DEV_UART_H_ 3127d5dc18SMarcel Moolenaar 3227d5dc18SMarcel Moolenaar /* 3327d5dc18SMarcel Moolenaar * Bus access structure. This structure holds the minimum information needed 3427d5dc18SMarcel Moolenaar * to access the UART. The rclk field, although not important to actually 3527d5dc18SMarcel Moolenaar * access the UART, is important for baudrate programming, delay loops and 3627d5dc18SMarcel Moolenaar * other timing related computations. 3727d5dc18SMarcel Moolenaar */ 3827d5dc18SMarcel Moolenaar struct uart_bas { 3927d5dc18SMarcel Moolenaar bus_space_tag_t bst; 4027d5dc18SMarcel Moolenaar bus_space_handle_t bsh; 41875f70dbSMarcel Moolenaar u_int chan; 4227d5dc18SMarcel Moolenaar u_int rclk; 43875f70dbSMarcel Moolenaar u_int regshft; 4427d5dc18SMarcel Moolenaar }; 4527d5dc18SMarcel Moolenaar 4627d5dc18SMarcel Moolenaar #define uart_regofs(bas, reg) ((reg) << (bas)->regshft) 4727d5dc18SMarcel Moolenaar 4827d5dc18SMarcel Moolenaar #define uart_getreg(bas, reg) \ 4927d5dc18SMarcel Moolenaar bus_space_read_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg)) 5027d5dc18SMarcel Moolenaar #define uart_setreg(bas, reg, value) \ 5127d5dc18SMarcel Moolenaar bus_space_write_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value) 5227d5dc18SMarcel Moolenaar 5327d5dc18SMarcel Moolenaar /* 16-bit I/O (e.g. to divisor latch) */ 5427d5dc18SMarcel Moolenaar #define uart_getdreg(bas, reg) \ 5527d5dc18SMarcel Moolenaar bus_space_read_2((bas)->bst, (bas)->bsh, uart_regofs(bas, reg)) 5627d5dc18SMarcel Moolenaar #define uart_setdreg(bas, reg, value) \ 5727d5dc18SMarcel Moolenaar bus_space_write_2((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value) 5827d5dc18SMarcel Moolenaar 5927d5dc18SMarcel Moolenaar /* 6027d5dc18SMarcel Moolenaar * XXX we don't know the length of the bus space address range in use by 6127d5dc18SMarcel Moolenaar * the UART. Since barriers don't use the length field currently, we put 6227d5dc18SMarcel Moolenaar * a zero there for now. 6327d5dc18SMarcel Moolenaar */ 6427d5dc18SMarcel Moolenaar #define uart_barrier(bas) \ 6527d5dc18SMarcel Moolenaar bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \ 6627d5dc18SMarcel Moolenaar BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 6727d5dc18SMarcel Moolenaar 6827d5dc18SMarcel Moolenaar /* 6927d5dc18SMarcel Moolenaar * Device flags. 7027d5dc18SMarcel Moolenaar */ 7127d5dc18SMarcel Moolenaar #define UART_FLAGS_CONSOLE(f) ((f) & 0x10) 7227d5dc18SMarcel Moolenaar #define UART_FLAGS_DBGPORT(f) ((f) & 0x80) 7327d5dc18SMarcel Moolenaar 7427d5dc18SMarcel Moolenaar /* 7527d5dc18SMarcel Moolenaar * Data parity values (magical numbers related to ns8250). 7627d5dc18SMarcel Moolenaar */ 7727d5dc18SMarcel Moolenaar #define UART_PARITY_NONE 0 7827d5dc18SMarcel Moolenaar #define UART_PARITY_ODD 1 7927d5dc18SMarcel Moolenaar #define UART_PARITY_EVEN 3 8027d5dc18SMarcel Moolenaar #define UART_PARITY_MARK 5 8127d5dc18SMarcel Moolenaar #define UART_PARITY_SPACE 7 8227d5dc18SMarcel Moolenaar 8327d5dc18SMarcel Moolenaar #endif /* _DEV_UART_H_ */ 84