xref: /freebsd/sys/dev/tsec/if_tsec_fdt.c (revision 7899f917b1c0ea178f1d2be0cfb452086d079d23)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (C) 2007-2008 Semihalf, Rafal Jaworowski
5  * Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
20  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
22  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
23  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * From: FreeBSD: head/sys/dev/tsec/if_tsec_ocp.c 188712 2009-02-17 14:59:47Z raj
29  */
30 
31 /*
32  * FDT 'simple-bus' attachment for Freescale TSEC controller.
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/endian.h>
38 #include <sys/lock.h>
39 #include <sys/mbuf.h>
40 #include <sys/mutex.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/socket.h>
44 #include <sys/sysctl.h>
45 
46 #include <sys/bus.h>
47 #include <machine/bus.h>
48 #include <sys/rman.h>
49 #include <machine/resource.h>
50 
51 #include <net/ethernet.h>
52 #include <net/if.h>
53 #include <net/if_media.h>
54 
55 #include <dev/fdt/fdt_common.h>
56 #include <dev/mii/mii.h>
57 #include <dev/mii/miivar.h>
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
60 #include <dev/ofw/openfirm.h>
61 
62 #include <dev/tsec/if_tsec.h>
63 #include <dev/tsec/if_tsecreg.h>
64 
65 #include "miibus_if.h"
66 
67 #define	TSEC_RID_TXIRQ	0
68 #define	TSEC_RID_RXIRQ	1
69 #define	TSEC_RID_ERRIRQ	2
70 
71 static int tsec_fdt_probe(device_t dev);
72 static int tsec_fdt_attach(device_t dev);
73 static int tsec_fdt_detach(device_t dev);
74 static int tsec_setup_intr(struct tsec_softc *sc, struct resource **ires,
75     void **ihand, int *irid, driver_intr_t handler, const char *iname);
76 static void tsec_release_intr(struct tsec_softc *sc, struct resource *ires,
77     void *ihand, int irid, const char *iname);
78 
79 static device_method_t tsec_methods[] = {
80 	/* Device interface */
81 	DEVMETHOD(device_probe,		tsec_fdt_probe),
82 	DEVMETHOD(device_attach,	tsec_fdt_attach),
83 	DEVMETHOD(device_detach,	tsec_fdt_detach),
84 
85 	DEVMETHOD(device_shutdown,	tsec_shutdown),
86 	DEVMETHOD(device_suspend,	tsec_suspend),
87 	DEVMETHOD(device_resume,	tsec_resume),
88 
89 	/* MII interface */
90 	DEVMETHOD(miibus_readreg,	tsec_miibus_readreg),
91 	DEVMETHOD(miibus_writereg,	tsec_miibus_writereg),
92 	DEVMETHOD(miibus_statchg,	tsec_miibus_statchg),
93 
94 	DEVMETHOD_END
95 };
96 
97 static driver_t tsec_fdt_driver = {
98 	"tsec",
99 	tsec_methods,
100 	sizeof(struct tsec_softc),
101 };
102 
103 DRIVER_MODULE(tsec, simplebus, tsec_fdt_driver, 0, 0);
104 
105 static int
106 tsec_fdt_probe(device_t dev)
107 {
108 	struct tsec_softc *sc;
109 	uint32_t id;
110 
111 	if (!ofw_bus_status_okay(dev))
112 		return (ENXIO);
113 
114 	if (ofw_bus_get_type(dev) == NULL ||
115 	    strcmp(ofw_bus_get_type(dev), "network") != 0)
116 		return (ENXIO);
117 
118 	if (!ofw_bus_is_compatible(dev, "gianfar") &&
119 	    !ofw_bus_is_compatible(dev, "fsl,etsec2"))
120 		return (ENXIO);
121 
122 	sc = device_get_softc(dev);
123 
124 	/*
125 	 * Device trees with "fsl,etsec2" compatible nodes don't have a reg
126 	 * property, as it's been relegated to the queue-group children.
127 	 */
128 	if (ofw_bus_is_compatible(dev, "fsl,etsec2"))
129 		sc->is_etsec = 1;
130 	else {
131 		sc->sc_rrid = 0;
132 		sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
133 		    RF_ACTIVE);
134 		if (sc->sc_rres == NULL)
135 			return (ENXIO);
136 
137 		sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
138 		sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
139 
140 		/* Check if we are eTSEC (enhanced TSEC) */
141 		id = TSEC_READ(sc, TSEC_REG_ID);
142 		sc->is_etsec = ((id >> 16) == TSEC_ETSEC_ID) ? 1 : 0;
143 		id |= TSEC_READ(sc, TSEC_REG_ID2);
144 
145 		bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);
146 
147 		if (id == 0) {
148 			device_printf(dev, "could not identify TSEC type\n");
149 			return (ENXIO);
150 		}
151 	}
152 
153 	if (sc->is_etsec)
154 		device_set_desc(dev, "Enhanced Three-Speed Ethernet Controller");
155 	else
156 		device_set_desc(dev, "Three-Speed Ethernet Controller");
157 
158 	return (BUS_PROBE_DEFAULT);
159 }
160 
161 static int
162 tsec_fdt_attach(device_t dev)
163 {
164 	struct tsec_softc *sc;
165 	struct resource_list *rl;
166 	phandle_t child, mdio, phy;
167 	int acells, scells;
168 	int error = 0;
169 
170 	sc = device_get_softc(dev);
171 	sc->dev = dev;
172 	sc->node = ofw_bus_get_node(dev);
173 
174 	if (fdt_addrsize_cells(sc->node, &acells, &scells) != 0) {
175 		acells = 1;
176 		scells = 1;
177 	}
178 	if (ofw_bus_is_compatible(dev, "fsl,etsec2")) {
179 		rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
180 
181 		/*
182 		 * TODO: Add all children resources to the list.  Will be
183 		 * required to support multigroup mode.
184 		 */
185 		child = OF_child(sc->node);
186 		ofw_bus_reg_to_rl(dev, child, acells, scells, rl);
187 		ofw_bus_intr_to_rl(dev, child, rl, NULL);
188 	}
189 
190 	/* Get phy address from fdt */
191 	if (OF_getencprop(sc->node, "phy-handle", &phy, sizeof(phy)) <= 0) {
192 		device_printf(dev, "PHY not found in device tree");
193 		return (ENXIO);
194 	}
195 
196 	phy = OF_node_from_xref(phy);
197 	mdio = OF_parent(phy);
198 	OF_decode_addr(mdio, 0, &sc->phy_bst, &sc->phy_bsh, NULL);
199 	OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr));
200 
201 	/*
202 	 * etsec2 MDIO nodes are given the MDIO module base address, so we need
203 	 * to add the MII offset to get the PHY registers.
204 	 */
205 	if (ofw_bus_node_is_compatible(mdio, "fsl,etsec2-mdio"))
206 		sc->phy_regoff = TSEC_REG_MIIBASE;
207 
208 	/* Init timer */
209 	callout_init(&sc->tsec_callout, 1);
210 
211 	/* Init locks */
212 	mtx_init(&sc->transmit_lock, device_get_nameunit(dev), "TSEC TX lock",
213 	    MTX_DEF);
214 	mtx_init(&sc->receive_lock, device_get_nameunit(dev), "TSEC RX lock",
215 	    MTX_DEF);
216 	mtx_init(&sc->ic_lock, device_get_nameunit(dev), "TSEC IC lock",
217 	    MTX_DEF);
218 
219 	/* Allocate IO memory for TSEC registers */
220 	sc->sc_rrid = 0;
221 	sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
222 	    RF_ACTIVE);
223 	if (sc->sc_rres == NULL) {
224 		device_printf(dev, "could not allocate IO memory range!\n");
225 		goto fail1;
226 	}
227 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
228 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
229 
230 	/* TSEC attach */
231 	if (tsec_attach(sc) != 0) {
232 		device_printf(dev, "could not be configured\n");
233 		goto fail2;
234 	}
235 
236 	/* Set up interrupts (TX/RX/ERR) */
237 	sc->sc_transmit_irid = TSEC_RID_TXIRQ;
238 	error = tsec_setup_intr(sc, &sc->sc_transmit_ires,
239 	    &sc->sc_transmit_ihand, &sc->sc_transmit_irid,
240 	    tsec_transmit_intr, "TX");
241 	if (error)
242 		goto fail2;
243 
244 	sc->sc_receive_irid = TSEC_RID_RXIRQ;
245 	error = tsec_setup_intr(sc, &sc->sc_receive_ires,
246 	    &sc->sc_receive_ihand, &sc->sc_receive_irid,
247 	    tsec_receive_intr, "RX");
248 	if (error)
249 		goto fail3;
250 
251 	sc->sc_error_irid = TSEC_RID_ERRIRQ;
252 	error = tsec_setup_intr(sc, &sc->sc_error_ires,
253 	    &sc->sc_error_ihand, &sc->sc_error_irid,
254 	    tsec_error_intr, "ERR");
255 	if (error)
256 		goto fail4;
257 
258 	return (0);
259 
260 fail4:
261 	tsec_release_intr(sc, sc->sc_receive_ires, sc->sc_receive_ihand,
262 	    sc->sc_receive_irid, "RX");
263 fail3:
264 	tsec_release_intr(sc, sc->sc_transmit_ires, sc->sc_transmit_ihand,
265 	    sc->sc_transmit_irid, "TX");
266 fail2:
267 	bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);
268 fail1:
269 	mtx_destroy(&sc->receive_lock);
270 	mtx_destroy(&sc->transmit_lock);
271 	return (ENXIO);
272 }
273 
274 static int
275 tsec_setup_intr(struct tsec_softc *sc, struct resource **ires, void **ihand,
276     int *irid, driver_intr_t handler, const char *iname)
277 {
278 	int error;
279 
280 	*ires = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, irid, RF_ACTIVE);
281 	if (*ires == NULL) {
282 		device_printf(sc->dev, "could not allocate %s IRQ\n", iname);
283 		return (ENXIO);
284 	}
285 	error = bus_setup_intr(sc->dev, *ires, INTR_TYPE_NET | INTR_MPSAFE,
286 	    NULL, handler, sc, ihand);
287 	if (error) {
288 		device_printf(sc->dev, "failed to set up %s IRQ\n", iname);
289 		if (bus_release_resource(sc->dev, SYS_RES_IRQ, *irid, *ires))
290 			device_printf(sc->dev, "could not release %s IRQ\n", iname);
291 		*ires = NULL;
292 		return (error);
293 	}
294 	return (0);
295 }
296 
297 static void
298 tsec_release_intr(struct tsec_softc *sc, struct resource *ires, void *ihand,
299     int irid, const char *iname)
300 {
301 	int error;
302 
303 	if (ires == NULL)
304 		return;
305 
306 	error = bus_teardown_intr(sc->dev, ires, ihand);
307 	if (error)
308 		device_printf(sc->dev, "bus_teardown_intr() failed for %s intr"
309 		    ", error %d\n", iname, error);
310 
311 	error = bus_release_resource(sc->dev, SYS_RES_IRQ, irid, ires);
312 	if (error)
313 		device_printf(sc->dev, "bus_release_resource() failed for %s "
314 		    "intr, error %d\n", iname, error);
315 }
316 
317 static int
318 tsec_fdt_detach(device_t dev)
319 {
320 	struct tsec_softc *sc;
321 	int error;
322 
323 	sc = device_get_softc(dev);
324 
325 	/* Wait for stopping watchdog */
326 	callout_drain(&sc->tsec_callout);
327 
328 	/* Stop and release all interrupts */
329 	tsec_release_intr(sc, sc->sc_transmit_ires, sc->sc_transmit_ihand,
330 	    sc->sc_transmit_irid, "TX");
331 	tsec_release_intr(sc, sc->sc_receive_ires, sc->sc_receive_ihand,
332 	    sc->sc_receive_irid, "RX");
333 	tsec_release_intr(sc, sc->sc_error_ires, sc->sc_error_ihand,
334 	    sc->sc_error_irid, "ERR");
335 
336 	/* TSEC detach */
337 	tsec_detach(sc);
338 
339 	/* Free IO memory handler */
340 	if (sc->sc_rres) {
341 		error = bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid,
342 		    sc->sc_rres);
343 		if (error)
344 			device_printf(dev, "bus_release_resource() failed for"
345 			    " IO memory, error %d\n", error);
346 	}
347 
348 	/* Destroy locks */
349 	mtx_destroy(&sc->receive_lock);
350 	mtx_destroy(&sc->transmit_lock);
351 	mtx_destroy(&sc->ic_lock);
352 	return (0);
353 }
354 
355 void
356 tsec_get_hwaddr(struct tsec_softc *sc, uint8_t *addr)
357 {
358 	union {
359 		uint32_t reg[2];
360 		uint8_t addr[6];
361 	} hw;
362 	int i;
363 
364 	hw.reg[0] = hw.reg[1] = 0;
365 
366 	/* Retrieve the hardware address from the device tree. */
367 	i = OF_getprop(sc->node, "local-mac-address", (void *)hw.addr, 6);
368 	if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) {
369 		bcopy(hw.addr, addr, 6);
370 		return;
371 	}
372 
373 	/* Also try the mac-address property, which is second-best */
374 	i = OF_getprop(sc->node, "mac-address", (void *)hw.addr, 6);
375 	if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) {
376 		bcopy(hw.addr, addr, 6);
377 		return;
378 	}
379 
380 	/*
381 	 * Fall back -- use the currently programmed address in the hope that
382 	 * it was set be firmware...
383 	 */
384 	hw.reg[0] = TSEC_READ(sc, TSEC_REG_MACSTNADDR1);
385 	hw.reg[1] = TSEC_READ(sc, TSEC_REG_MACSTNADDR2);
386 	for (i = 0; i < 6; i++)
387 		addr[5-i] = hw.addr[i];
388 }
389