1 /*- 2 * Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #ifndef _IF_TSEC_H 29 #define _IF_TSEC_H 30 31 #include <dev/ofw/openfirm.h> 32 33 #define TSEC_RX_NUM_DESC 256 34 #define TSEC_TX_NUM_DESC 256 35 36 /* Interrupt Coalescing types */ 37 #define TSEC_IC_RX 0 38 #define TSEC_IC_TX 1 39 40 /* eTSEC ID */ 41 #define TSEC_ETSEC_ID 0x0124 42 43 /* Frame sizes */ 44 #define TSEC_MIN_FRAME_SIZE 64 45 #define TSEC_MAX_FRAME_SIZE 9600 46 47 struct tsec_softc { 48 /* XXX MII bus requires that struct ifnet is first!!! */ 49 struct ifnet *tsec_ifp; 50 51 struct mtx transmit_lock; /* transmitter lock */ 52 struct mtx receive_lock; /* receiver lock */ 53 54 phandle_t node; 55 device_t dev; 56 device_t tsec_miibus; 57 struct mii_data *tsec_mii; /* MII media control */ 58 int tsec_link; 59 60 bus_dma_tag_t tsec_tx_dtag; /* TX descriptors tag */ 61 bus_dmamap_t tsec_tx_dmap; /* TX descriptors map */ 62 struct tsec_desc *tsec_tx_vaddr;/* vadress of TX descriptors */ 63 uint32_t tsec_tx_raddr; /* real adress of TX descriptors */ 64 65 bus_dma_tag_t tsec_rx_dtag; /* RX descriptors tag */ 66 bus_dmamap_t tsec_rx_dmap; /* RX descriptors map */ 67 struct tsec_desc *tsec_rx_vaddr; /* vadress of RX descriptors */ 68 uint32_t tsec_rx_raddr; /* real adress of RX descriptors */ 69 70 bus_dma_tag_t tsec_tx_mtag; /* TX mbufs tag */ 71 bus_dma_tag_t tsec_rx_mtag; /* TX mbufs tag */ 72 73 struct rx_data_type { 74 bus_dmamap_t map; /* mbuf map */ 75 struct mbuf *mbuf; 76 uint32_t paddr; /* DMA addres of buffer */ 77 } rx_data[TSEC_RX_NUM_DESC]; 78 79 uint32_t tx_cur_desc_cnt; 80 uint32_t tx_dirty_desc_cnt; 81 uint32_t rx_cur_desc_cnt; 82 83 struct resource *sc_rres; /* register resource */ 84 int sc_rrid; /* register rid */ 85 struct { 86 bus_space_tag_t bst; 87 bus_space_handle_t bsh; 88 } sc_bas; 89 90 struct resource *sc_transmit_ires; 91 void *sc_transmit_ihand; 92 int sc_transmit_irid; 93 struct resource *sc_receive_ires; 94 void *sc_receive_ihand; 95 int sc_receive_irid; 96 struct resource *sc_error_ires; 97 void *sc_error_ihand; 98 int sc_error_irid; 99 100 int tsec_if_flags; 101 int is_etsec; 102 103 /* Watchdog and MII tick related */ 104 struct callout tsec_callout; 105 int tsec_watchdog; 106 107 /* TX maps */ 108 bus_dmamap_t tx_map_data[TSEC_TX_NUM_DESC]; 109 110 /* unused TX maps data */ 111 uint32_t tx_map_unused_get_cnt; 112 uint32_t tx_map_unused_put_cnt; 113 bus_dmamap_t *tx_map_unused_data[TSEC_TX_NUM_DESC]; 114 115 /* used TX maps data */ 116 uint32_t tx_map_used_get_cnt; 117 uint32_t tx_map_used_put_cnt; 118 bus_dmamap_t *tx_map_used_data[TSEC_TX_NUM_DESC]; 119 120 /* mbufs in TX queue */ 121 uint32_t tx_mbuf_used_get_cnt; 122 uint32_t tx_mbuf_used_put_cnt; 123 struct mbuf *tx_mbuf_used_data[TSEC_TX_NUM_DESC]; 124 125 /* interrupt coalescing */ 126 struct mtx ic_lock; 127 uint32_t rx_ic_time; /* RW, valid values 0..65535 */ 128 uint32_t rx_ic_count; /* RW, valid values 0..255 */ 129 uint32_t tx_ic_time; 130 uint32_t tx_ic_count; 131 132 /* currently received frame */ 133 struct mbuf *frame; 134 135 int phyaddr; 136 }; 137 138 /* interface to get/put generic objects */ 139 #define TSEC_CNT_INIT(cnt, wrap) ((cnt) = ((wrap) - 1)) 140 141 #define TSEC_INC(count, wrap) (count = ((count) + 1) & ((wrap) - 1)) 142 143 #define TSEC_GET_GENERIC(hand, tab, count, wrap) \ 144 ((hand)->tab[TSEC_INC((hand)->count, wrap)]) 145 146 #define TSEC_PUT_GENERIC(hand, tab, count, wrap, val) \ 147 ((hand)->tab[TSEC_INC((hand)->count, wrap)] = val) 148 149 #define TSEC_BACK_GENERIC(sc, count, wrap) do { \ 150 if ((sc)->count > 0) \ 151 (sc)->count--; \ 152 else \ 153 (sc)->count = (wrap) - 1; \ 154 } while (0) 155 156 /* TX maps interface */ 157 #define TSEC_TX_MAP_CNT_INIT(sc) do { \ 158 TSEC_CNT_INIT((sc)->tx_map_unused_get_cnt, TSEC_TX_NUM_DESC); \ 159 TSEC_CNT_INIT((sc)->tx_map_unused_put_cnt, TSEC_TX_NUM_DESC); \ 160 TSEC_CNT_INIT((sc)->tx_map_used_get_cnt, TSEC_TX_NUM_DESC); \ 161 TSEC_CNT_INIT((sc)->tx_map_used_put_cnt, TSEC_TX_NUM_DESC); \ 162 } while (0) 163 164 /* interface to get/put unused TX maps */ 165 #define TSEC_ALLOC_TX_MAP(sc) \ 166 TSEC_GET_GENERIC(sc, tx_map_unused_data, tx_map_unused_get_cnt, \ 167 TSEC_TX_NUM_DESC) 168 169 #define TSEC_FREE_TX_MAP(sc, val) \ 170 TSEC_PUT_GENERIC(sc, tx_map_unused_data, tx_map_unused_put_cnt, \ 171 TSEC_TX_NUM_DESC, val) 172 173 /* interface to get/put used TX maps */ 174 #define TSEC_GET_TX_MAP(sc) \ 175 TSEC_GET_GENERIC(sc, tx_map_used_data, tx_map_used_get_cnt, \ 176 TSEC_TX_NUM_DESC) 177 178 #define TSEC_PUT_TX_MAP(sc, val) \ 179 TSEC_PUT_GENERIC(sc, tx_map_used_data, tx_map_used_put_cnt, \ 180 TSEC_TX_NUM_DESC, val) 181 182 /* interface to get/put TX mbufs in send queue */ 183 #define TSEC_TX_MBUF_CNT_INIT(sc) do { \ 184 TSEC_CNT_INIT((sc)->tx_mbuf_used_get_cnt, TSEC_TX_NUM_DESC); \ 185 TSEC_CNT_INIT((sc)->tx_mbuf_used_put_cnt, TSEC_TX_NUM_DESC); \ 186 } while (0) 187 188 #define TSEC_GET_TX_MBUF(sc) \ 189 TSEC_GET_GENERIC(sc, tx_mbuf_used_data, tx_mbuf_used_get_cnt, \ 190 TSEC_TX_NUM_DESC) 191 192 #define TSEC_PUT_TX_MBUF(sc, val) \ 193 TSEC_PUT_GENERIC(sc, tx_mbuf_used_data, tx_mbuf_used_put_cnt, \ 194 TSEC_TX_NUM_DESC, val) 195 196 #define TSEC_EMPTYQ_TX_MBUF(sc) \ 197 ((sc)->tx_mbuf_used_get_cnt == (sc)->tx_mbuf_used_put_cnt) 198 199 /* interface for manage tx tsec_desc */ 200 #define TSEC_TX_DESC_CNT_INIT(sc) do { \ 201 TSEC_CNT_INIT((sc)->tx_cur_desc_cnt, TSEC_TX_NUM_DESC); \ 202 TSEC_CNT_INIT((sc)->tx_dirty_desc_cnt, TSEC_TX_NUM_DESC); \ 203 } while (0) 204 205 #define TSEC_GET_CUR_TX_DESC(sc) \ 206 &TSEC_GET_GENERIC(sc, tsec_tx_vaddr, tx_cur_desc_cnt, \ 207 TSEC_TX_NUM_DESC) 208 209 #define TSEC_GET_DIRTY_TX_DESC(sc) \ 210 &TSEC_GET_GENERIC(sc, tsec_tx_vaddr, tx_dirty_desc_cnt, \ 211 TSEC_TX_NUM_DESC) 212 213 #define TSEC_BACK_DIRTY_TX_DESC(sc) \ 214 TSEC_BACK_GENERIC(sc, tx_dirty_desc_cnt, TSEC_TX_NUM_DESC) 215 216 #define TSEC_CUR_DIFF_DIRTY_TX_DESC(sc) \ 217 ((sc)->tx_cur_desc_cnt != (sc)->tx_dirty_desc_cnt) 218 219 #define TSEC_FREE_TX_DESC(sc) \ 220 (((sc)->tx_cur_desc_cnt < (sc)->tx_dirty_desc_cnt) ? \ 221 ((sc)->tx_dirty_desc_cnt - (sc)->tx_cur_desc_cnt - 1) \ 222 : \ 223 (TSEC_TX_NUM_DESC - (sc)->tx_cur_desc_cnt \ 224 + (sc)->tx_dirty_desc_cnt - 1)) 225 226 /* interface for manage rx tsec_desc */ 227 #define TSEC_RX_DESC_CNT_INIT(sc) do { \ 228 TSEC_CNT_INIT((sc)->rx_cur_desc_cnt, TSEC_RX_NUM_DESC); \ 229 } while (0) 230 231 #define TSEC_GET_CUR_RX_DESC(sc) \ 232 &TSEC_GET_GENERIC(sc, tsec_rx_vaddr, rx_cur_desc_cnt, \ 233 TSEC_RX_NUM_DESC) 234 235 #define TSEC_BACK_CUR_RX_DESC(sc) \ 236 TSEC_BACK_GENERIC(sc, rx_cur_desc_cnt, TSEC_RX_NUM_DESC) 237 238 #define TSEC_GET_CUR_RX_DESC_CNT(sc) \ 239 ((sc)->rx_cur_desc_cnt) 240 241 /* init all counters (for init only!) */ 242 #define TSEC_TX_RX_COUNTERS_INIT(sc) do { \ 243 TSEC_TX_MAP_CNT_INIT(sc); \ 244 TSEC_TX_MBUF_CNT_INIT(sc); \ 245 TSEC_TX_DESC_CNT_INIT(sc); \ 246 TSEC_RX_DESC_CNT_INIT(sc); \ 247 } while (0) 248 249 /* read/write bus functions */ 250 #define TSEC_READ(sc, reg) \ 251 bus_space_read_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg)) 252 #define TSEC_WRITE(sc, reg, val) \ 253 bus_space_write_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg), (val)) 254 255 /* Lock for transmitter */ 256 #define TSEC_TRANSMIT_LOCK(sc) do { \ 257 mtx_assert(&(sc)->receive_lock, MA_NOTOWNED); \ 258 mtx_lock(&(sc)->transmit_lock); \ 259 } while (0) 260 261 #define TSEC_TRANSMIT_UNLOCK(sc) mtx_unlock(&(sc)->transmit_lock) 262 #define TSEC_TRANSMIT_LOCK_ASSERT(sc) mtx_assert(&(sc)->transmit_lock, MA_OWNED) 263 264 /* Lock for receiver */ 265 #define TSEC_RECEIVE_LOCK(sc) do { \ 266 mtx_assert(&(sc)->transmit_lock, MA_NOTOWNED); \ 267 mtx_lock(&(sc)->receive_lock); \ 268 } while (0) 269 270 #define TSEC_RECEIVE_UNLOCK(sc) mtx_unlock(&(sc)->receive_lock) 271 #define TSEC_RECEIVE_LOCK_ASSERT(sc) mtx_assert(&(sc)->receive_lock, MA_OWNED) 272 273 /* Lock for interrupts coalescing */ 274 #define TSEC_IC_LOCK(sc) do { \ 275 mtx_assert(&(sc)->ic_lock, MA_NOTOWNED); \ 276 mtx_lock(&(sc)->ic_lock); \ 277 } while (0) 278 279 #define TSEC_IC_UNLOCK(sc) mtx_unlock(&(sc)->ic_lock) 280 #define TSEC_IC_LOCK_ASSERT(sc) mtx_assert(&(sc)->ic_lock, MA_OWNED) 281 282 /* Global tsec lock (with all locks) */ 283 #define TSEC_GLOBAL_LOCK(sc) do { \ 284 if ((mtx_owned(&(sc)->transmit_lock) ? 1 : 0) != \ 285 (mtx_owned(&(sc)->receive_lock) ? 1 : 0)) { \ 286 panic("tsec deadlock possibility detection!"); \ 287 } \ 288 mtx_lock(&(sc)->transmit_lock); \ 289 mtx_lock(&(sc)->receive_lock); \ 290 } while (0) 291 292 #define TSEC_GLOBAL_UNLOCK(sc) do { \ 293 TSEC_RECEIVE_UNLOCK(sc); \ 294 TSEC_TRANSMIT_UNLOCK(sc); \ 295 } while (0) 296 297 #define TSEC_GLOBAL_LOCK_ASSERT(sc) do { \ 298 TSEC_TRANSMIT_LOCK_ASSERT(sc); \ 299 TSEC_RECEIVE_LOCK_ASSERT(sc); \ 300 } while (0) 301 302 /* From global to {transmit,receive} */ 303 #define TSEC_GLOBAL_TO_TRANSMIT_LOCK(sc) do { \ 304 mtx_unlock(&(sc)->receive_lock);\ 305 } while (0) 306 307 #define TSEC_GLOBAL_TO_RECEIVE_LOCK(sc) do { \ 308 mtx_unlock(&(sc)->transmit_lock);\ 309 } while (0) 310 311 struct tsec_desc { 312 volatile uint16_t flags; /* descriptor flags */ 313 volatile uint16_t length; /* buffer length */ 314 volatile uint32_t bufptr; /* buffer pointer */ 315 }; 316 317 #define TSEC_READ_RETRY 10000 318 #define TSEC_READ_DELAY 100 319 320 /* Structures and defines for TCP/IP Off-load */ 321 struct tsec_tx_fcb { 322 volatile uint16_t flags; 323 volatile uint8_t l4_offset; 324 volatile uint8_t l3_offset; 325 volatile uint16_t ph_chsum; 326 volatile uint16_t vlan; 327 }; 328 329 struct tsec_rx_fcb { 330 volatile uint16_t flags; 331 volatile uint8_t rq_index; 332 volatile uint8_t protocol; 333 volatile uint16_t unused; 334 volatile uint16_t vlan; 335 }; 336 337 #define TSEC_CHECKSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 338 339 #define TSEC_TX_FCB_IP4 TSEC_TX_FCB_L3_IS_IP 340 #define TSEC_TX_FCB_IP6 (TSEC_TX_FCB_L3_IS_IP | TSEC_TX_FCB_L3_IS_IP6) 341 342 #define TSEC_TX_FCB_TCP TSEC_TX_FCB_L4_IS_TCP_UDP 343 #define TSEC_TX_FCB_UDP (TSEC_TX_FCB_L4_IS_TCP_UDP | TSEC_TX_FCB_L4_IS_UDP) 344 345 #define TSEC_RX_FCB_IP_CSUM_CHECKED(flags) \ 346 ((flags & (TSEC_RX_FCB_IP_FOUND | TSEC_RX_FCB_IP6_FOUND | \ 347 TSEC_RX_FCB_IP_CSUM | TSEC_RX_FCB_PARSE_ERROR)) \ 348 == (TSEC_RX_FCB_IP_FOUND | TSEC_RX_FCB_IP_CSUM)) 349 350 #define TSEC_RX_FCB_TCP_UDP_CSUM_CHECKED(flags) \ 351 ((flags & (TSEC_RX_FCB_TCP_UDP_FOUND | TSEC_RX_FCB_TCP_UDP_CSUM \ 352 | TSEC_RX_FCB_PARSE_ERROR)) \ 353 == (TSEC_RX_FCB_TCP_UDP_FOUND | TSEC_RX_FCB_TCP_UDP_CSUM)) 354 355 /* Prototypes */ 356 extern devclass_t tsec_devclass; 357 358 int tsec_attach(struct tsec_softc *sc); 359 int tsec_detach(struct tsec_softc *sc); 360 361 void tsec_error_intr(void *arg); 362 void tsec_receive_intr(void *arg); 363 void tsec_transmit_intr(void *arg); 364 365 int tsec_miibus_readreg(device_t dev, int phy, int reg); 366 int tsec_miibus_writereg(device_t dev, int phy, int reg, int value); 367 void tsec_miibus_statchg(device_t dev); 368 int tsec_resume(device_t dev); /* XXX */ 369 int tsec_shutdown(device_t dev); 370 int tsec_suspend(device_t dev); /* XXX */ 371 372 void tsec_get_hwaddr(struct tsec_softc *sc, uint8_t *addr); 373 374 #endif /* _IF_TSEC_H */ 375