1 /*- 2 * Copyright (c) 2018 Stormshield. 3 * Copyright (c) 2018 Semihalf. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef _TPM20_H_ 29 #define _TPM20_H_ 30 31 #include "opt_acpi.h" 32 #include <sys/cdefs.h> 33 #include <sys/endian.h> 34 #include <sys/param.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/proc.h> 38 #include <sys/systm.h> 39 40 #include <sys/bus.h> 41 #include <sys/callout.h> 42 #include <sys/conf.h> 43 #include <sys/condvar.h> 44 #include <sys/lock.h> 45 #include <sys/module.h> 46 #include <sys/mutex.h> 47 #include <sys/rman.h> 48 #include <sys/sx.h> 49 #include <sys/taskqueue.h> 50 #include <sys/uio.h> 51 52 #include <machine/bus.h> 53 #include <machine/md_var.h> 54 #include <machine/resource.h> 55 56 #ifdef DEV_ACPI 57 #include <contrib/dev/acpica/include/acpi.h> 58 #include <contrib/dev/acpica/include/accommon.h> 59 #include <dev/acpica/acpivar.h> 60 #endif 61 62 #include "opt_tpm.h" 63 #include "tpm_if.h" 64 65 #define BIT(x) (1U << (x)) 66 67 /* Timeouts in us */ 68 #define TPM_TIMEOUT_A 750000 69 #define TPM_TIMEOUT_B 2000000 70 #define TPM_TIMEOUT_C 200000 71 #define TPM_TIMEOUT_D 30000 72 73 /* 74 * Generating RSA key pair takes ~(10-20s), which is significantly longer than 75 * any timeout defined in spec. Because of that we need a new one. 76 */ 77 #define TPM_TIMEOUT_LONG 40000000 78 79 #define TPM_CC_Shutdown 0x00000145 80 81 /* List of commands that require TPM_TIMEOUT_LONG time to complete */ 82 #define TPM_CC_CreatePrimary 0x00000131 83 #define TPM_CC_Create 0x00000153 84 #define TPM_CC_CreateLoaded 0x00000191 85 86 /* List of commands that require only TPM_TIMEOUT_C time to complete */ 87 #define TPM_CC_SequenceComplete 0x0000013e 88 #define TPM_CC_Startup 0x00000144 89 #define TPM_CC_SequenceUpdate 0x0000015c 90 #define TPM_CC_GetCapability 0x0000017a 91 #define TPM_CC_PCR_Extend 0x00000182 92 #define TPM_CC_EventSequenceComplete 0x00000185 93 #define TPM_CC_HashSequenceStart 0x00000186 94 95 /* Timeout before data in read buffer is discarded */ 96 #define TPM_READ_TIMEOUT 500000 97 98 #define TPM_BUFSIZE 0x1000 99 100 #define TPM_HEADER_SIZE 10 101 102 #define TPM_CDEV_NAME "tpm0" 103 #define TPM_CDEV_PERM_FLAG 0600 104 105 #define TPM2_START_METHOD_ACPI 2 106 #define TPM2_START_METHOD_TIS 6 107 #define TPM2_START_METHOD_CRB 7 108 #define TPM2_START_METHOD_CRB_ACPI 8 109 110 MALLOC_DECLARE(M_TPM20); 111 112 struct tpm_priv { 113 struct sx io_lock; 114 uint8_t buf[TPM_BUFSIZE]; 115 size_t offset; 116 size_t len; 117 }; 118 119 struct tpm_sc { 120 device_t dev; 121 122 struct resource *mem_res; 123 struct resource *irq_res; 124 int mem_rid; 125 int irq_rid; 126 127 struct cdev *sc_cdev; 128 129 /* Serialize commands and lifecycle; intr_lock nests inside. */ 130 struct sx dev_lock; 131 struct mtx intr_lock; 132 struct cv intr_cv; 133 134 void *intr_cookie; 135 int intr_type; /* Current event type */ 136 uint32_t intr_generation; 137 uint32_t intr_mask; /* Saved TIS interrupt configuration */ 138 bool interrupts; 139 bool common_initialized; 140 bool dying; 141 bool suspended; 142 143 struct tpm_priv *internal_priv; 144 145 #if defined TPM_HARVEST || defined RANDOM_ENABLE_TPM 146 struct timeout_task harvest_task; 147 #endif 148 149 int (*transmit)(struct tpm_sc *, size_t); 150 }; 151 152 int tpm20_suspend(device_t dev); 153 int tpm20_resume(device_t dev); 154 int tpm20_shutdown(device_t dev); 155 int32_t tpm20_get_timeout(uint32_t command); 156 int tpm20_init(struct tpm_sc *sc); 157 void tpm20_release(struct tpm_sc *sc); 158 159 /* Mode driver types */ 160 DECLARE_CLASS(tpmtis_driver); 161 int tpmtis_attach(device_t dev); 162 163 DECLARE_CLASS(tpmcrb_driver); 164 165 /* Bus driver types */ 166 DECLARE_CLASS(tpm_bus_driver); 167 DECLARE_CLASS(tpm_spi_driver); 168 169 /* Small helper routines for io ops */ 170 static inline void 171 AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val) 172 { 173 uint32_t v = TPM_READ_4(sc->dev, off); 174 175 TPM_WRITE_4(sc->dev, off, v & val); 176 } 177 static inline void 178 OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val) 179 { 180 uint8_t v = TPM_READ_1(sc->dev, off); 181 182 TPM_WRITE_1(sc->dev, off, v | val); 183 } 184 static inline void 185 OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val) 186 { 187 uint32_t v = TPM_READ_4(sc->dev, off); 188 189 TPM_WRITE_4(sc->dev, off, v | val); 190 } 191 #endif /* _TPM20_H_ */ 192