xref: /freebsd/sys/dev/tpm/tpm20.h (revision 28f4385e45a2681c14bd04b83fe1796eaefe8265)
1 /*-
2  * Copyright (c) 2018 Stormshield.
3  * Copyright (c) 2018 Semihalf.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #ifndef _TPM20_H_
29 #define _TPM20_H_
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/endian.h>
35 #include <sys/param.h>
36 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/proc.h>
39 #include <sys/systm.h>
40 
41 #include <sys/bus.h>
42 #include <sys/callout.h>
43 #include <sys/conf.h>
44 #include <sys/module.h>
45 #include <sys/rman.h>
46 #include <sys/sx.h>
47 #include <sys/uio.h>
48 
49 #include <machine/bus.h>
50 #include <machine/md_var.h>
51 #include <machine/resource.h>
52 
53 #include <contrib/dev/acpica/include/acpi.h>
54 #include <contrib/dev/acpica/include/accommon.h>
55 #include <dev/acpica/acpivar.h>
56 #include "opt_acpi.h"
57 
58 #define	BIT(x) (1 << (x))
59 
60 /* Timeouts in us */
61 #define	TPM_TIMEOUT_A		750000
62 #define	TPM_TIMEOUT_B		2000000
63 #define	TPM_TIMEOUT_C		200000
64 #define	TPM_TIMEOUT_D		30000
65 
66 /*
67  * Generating RSA key pair takes ~(10-20s), which is significantly longer than
68  * any timeout defined in spec. Because of that we need a new one.
69  */
70 #define	TPM_TIMEOUT_LONG	40000000
71 
72 /* List of commands that require TPM_TIMEOUT_LONG time to complete */
73 #define	TPM_CC_CreatePrimary	0x00000131
74 #define	TPM_CC_Create			0x00000153
75 #define	TPM_CC_CreateLoaded		0x00000191
76 
77 /* List of commands that require only TPM_TIMEOUT_C time to complete */
78 #define TPM_CC_SequenceComplete			0x0000013e
79 #define TPM_CC_Startup					0x00000144
80 #define TPM_CC_SequenceUpdate			0x0000015c
81 #define TPM_CC_GetCapability			0x0000017a
82 #define TPM_CC_PCR_Extend				0x00000182
83 #define TPM_CC_EventSequenceComplete	0x00000185
84 #define TPM_CC_HashSequenceStart		0x00000186
85 
86 /* Timeout before data in read buffer is discarded */
87 #define	TPM_READ_TIMEOUT	500000
88 
89 #define	TPM_BUFSIZE		0x1000
90 
91 #define	TPM_HEADER_SIZE		10
92 
93 #define	TPM_CDEV_NAME		"tpm0"
94 #define	TPM_CDEV_PERM_FLAG	0600
95 
96 
97 #define TPM2_START_METHOD_ACPI 2
98 #define TPM2_START_METHOD_TIS 6
99 #define TPM2_START_METHOD_CRB 7
100 #define TPM2_START_METHOD_CRB_ACPI 8
101 
102 struct tpm_sc {
103 	device_t	dev;
104 
105 	struct resource	*mem_res;
106 	struct resource	*irq_res;
107 	int		mem_rid;
108 	int		irq_rid;
109 
110 	struct cdev	*sc_cdev;
111 
112 	struct sx 	dev_lock;
113 	struct cv	buf_cv;
114 
115 	void 		*intr_cookie;
116 	int 		intr_type;	/* Current event type */
117 	bool 		interrupts;
118 
119 	uint8_t 	*buf;
120 	size_t		pending_data_length;
121 
122 	struct callout 	discard_buffer_callout;
123 
124 	int		(*transmit)(struct tpm_sc *, size_t);
125 };
126 
127 int tpm20_suspend(device_t dev);
128 int tpm20_shutdown(device_t dev);
129 int32_t tpm20_get_timeout(uint32_t command);
130 int tpm20_init(struct tpm_sc *sc);
131 void tpm20_release(struct tpm_sc *sc);
132 
133 /* Small helper routines for io ops */
134 static inline uint8_t
135 RD1(struct tpm_sc *sc, bus_size_t off)
136 {
137 
138 	return (bus_read_1(sc->mem_res, off));
139 }
140 static inline uint32_t
141 RD4(struct tpm_sc *sc, bus_size_t off)
142 {
143 
144 	return (bus_read_4(sc->mem_res, off));
145 }
146 #ifdef __amd64__
147 static inline uint64_t
148 RD8(struct tpm_sc *sc, bus_size_t off)
149 {
150 
151 	return (bus_read_8(sc->mem_res, off));
152 }
153 #endif
154 static inline void
155 WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
156 {
157 
158 	bus_write_1(sc->mem_res, off, val);
159 }
160 static inline void
161 WR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
162 {
163 
164 	bus_write_4(sc->mem_res, off, val);
165 }
166 static inline void
167 AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
168 {
169 
170 	WR4(sc, off, RD4(sc, off) & val);
171 }
172 static inline void
173 OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
174 {
175 
176 	WR1(sc, off, RD1(sc, off) | val);
177 }
178 static inline void
179 OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
180 {
181 
182 	WR4(sc, off, RD4(sc, off) | val);
183 }
184 #endif	/* _TPM20_H_ */
185