xref: /freebsd/sys/dev/tpm/tpm.c (revision 97f24f666faf69a512fc3c2bd8ee3d11b41e51ef)
1*97f24f66STakanori Watanabe /*
2*97f24f66STakanori Watanabe  * Copyright (c) 2008, 2009 Michael Shalayeff
3*97f24f66STakanori Watanabe  * Copyright (c) 2009, 2010 Hans-Joerg Hoexer
4*97f24f66STakanori Watanabe  * All rights reserved.
5*97f24f66STakanori Watanabe  *
6*97f24f66STakanori Watanabe  * Permission to use, copy, modify, and distribute this software for any
7*97f24f66STakanori Watanabe  * purpose with or without fee is hereby granted, provided that the above
8*97f24f66STakanori Watanabe  * copyright notice and this permission notice appear in all copies.
9*97f24f66STakanori Watanabe  *
10*97f24f66STakanori Watanabe  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11*97f24f66STakanori Watanabe  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12*97f24f66STakanori Watanabe  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13*97f24f66STakanori Watanabe  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14*97f24f66STakanori Watanabe  * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
15*97f24f66STakanori Watanabe  * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
16*97f24f66STakanori Watanabe  * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17*97f24f66STakanori Watanabe  */
18*97f24f66STakanori Watanabe 
19*97f24f66STakanori Watanabe /* #define	TPM_DEBUG */
20*97f24f66STakanori Watanabe 
21*97f24f66STakanori Watanabe #include <sys/cdefs.h>
22*97f24f66STakanori Watanabe __FBSDID("$FreeBSD$");
23*97f24f66STakanori Watanabe 
24*97f24f66STakanori Watanabe #include <sys/param.h>
25*97f24f66STakanori Watanabe #include <sys/systm.h>
26*97f24f66STakanori Watanabe #include <sys/kernel.h>
27*97f24f66STakanori Watanabe #include <sys/malloc.h>
28*97f24f66STakanori Watanabe #include <sys/proc.h>
29*97f24f66STakanori Watanabe 
30*97f24f66STakanori Watanabe #ifdef __FreeBSD__
31*97f24f66STakanori Watanabe #include <sys/module.h>
32*97f24f66STakanori Watanabe #include <sys/conf.h>
33*97f24f66STakanori Watanabe #include <sys/uio.h>
34*97f24f66STakanori Watanabe #include <sys/bus.h>
35*97f24f66STakanori Watanabe 
36*97f24f66STakanori Watanabe #include <machine/bus.h>
37*97f24f66STakanori Watanabe #include <sys/rman.h>
38*97f24f66STakanori Watanabe #include <machine/resource.h>
39*97f24f66STakanori Watanabe 
40*97f24f66STakanori Watanabe #include <machine/md_var.h>
41*97f24f66STakanori Watanabe 
42*97f24f66STakanori Watanabe #include <isa/isareg.h>
43*97f24f66STakanori Watanabe #include <isa/isavar.h>
44*97f24f66STakanori Watanabe #else
45*97f24f66STakanori Watanabe #include <sys/device.h>
46*97f24f66STakanori Watanabe 
47*97f24f66STakanori Watanabe #include <machine/cpu.h>
48*97f24f66STakanori Watanabe #include <machine/bus.h>
49*97f24f66STakanori Watanabe #include <machine/intr.h>
50*97f24f66STakanori Watanabe #include <machine/conf.h>
51*97f24f66STakanori Watanabe 
52*97f24f66STakanori Watanabe #include <dev/isa/isareg.h>
53*97f24f66STakanori Watanabe #include <dev/isa/isavar.h>
54*97f24f66STakanori Watanabe #endif
55*97f24f66STakanori Watanabe #include <dev/tpm/tpmvar.h>
56*97f24f66STakanori Watanabe 
57*97f24f66STakanori Watanabe #ifndef __FreeBSD__
58*97f24f66STakanori Watanabe /* XXX horrible hack for tcsd (-lpthread) workaround on OpenBSD */
59*97f24f66STakanori Watanabe #undef PCATCH
60*97f24f66STakanori Watanabe #define PCATCH	0
61*97f24f66STakanori Watanabe #endif
62*97f24f66STakanori Watanabe 
63*97f24f66STakanori Watanabe #define	TPM_BUFSIZ	1024
64*97f24f66STakanori Watanabe 
65*97f24f66STakanori Watanabe #define TPM_HDRSIZE	10
66*97f24f66STakanori Watanabe 
67*97f24f66STakanori Watanabe #define TPM_PARAM_SIZE	0x0001
68*97f24f66STakanori Watanabe 
69*97f24f66STakanori Watanabe #ifdef __FreeBSD__
70*97f24f66STakanori Watanabe #define IRQUNK	-1
71*97f24f66STakanori Watanabe #endif
72*97f24f66STakanori Watanabe 
73*97f24f66STakanori Watanabe #define	TPM_ACCESS			0x0000	/* acess register */
74*97f24f66STakanori Watanabe #define	TPM_ACCESS_ESTABLISHMENT	0x01	/* establishment */
75*97f24f66STakanori Watanabe #define	TPM_ACCESS_REQUEST_USE		0x02	/* request using locality */
76*97f24f66STakanori Watanabe #define	TPM_ACCESS_REQUEST_PENDING	0x04	/* pending request */
77*97f24f66STakanori Watanabe #define	TPM_ACCESS_SEIZE		0x08	/* request locality seize */
78*97f24f66STakanori Watanabe #define	TPM_ACCESS_SEIZED		0x10	/* locality has been seized */
79*97f24f66STakanori Watanabe #define	TPM_ACCESS_ACTIVE_LOCALITY	0x20	/* locality is active */
80*97f24f66STakanori Watanabe #define	TPM_ACCESS_VALID		0x80	/* bits are valid */
81*97f24f66STakanori Watanabe #define	TPM_ACCESS_BITS	\
82*97f24f66STakanori Watanabe     "\020\01EST\02REQ\03PEND\04SEIZE\05SEIZED\06ACT\010VALID"
83*97f24f66STakanori Watanabe 
84*97f24f66STakanori Watanabe #define	TPM_INTERRUPT_ENABLE	0x0008
85*97f24f66STakanori Watanabe #define	TPM_GLOBAL_INT_ENABLE	0x80000000	/* enable ints */
86*97f24f66STakanori Watanabe #define	TPM_CMD_READY_INT	0x00000080	/* cmd ready enable */
87*97f24f66STakanori Watanabe #define	TPM_INT_EDGE_FALLING	0x00000018
88*97f24f66STakanori Watanabe #define	TPM_INT_EDGE_RISING	0x00000010
89*97f24f66STakanori Watanabe #define	TPM_INT_LEVEL_LOW	0x00000008
90*97f24f66STakanori Watanabe #define	TPM_INT_LEVEL_HIGH	0x00000000
91*97f24f66STakanori Watanabe #define	TPM_LOCALITY_CHANGE_INT	0x00000004	/* locality change enable */
92*97f24f66STakanori Watanabe #define	TPM_STS_VALID_INT	0x00000002	/* int on TPM_STS_VALID is set */
93*97f24f66STakanori Watanabe #define	TPM_DATA_AVAIL_INT	0x00000001	/* int on TPM_STS_DATA_AVAIL is set */
94*97f24f66STakanori Watanabe #define	TPM_INTERRUPT_ENABLE_BITS \
95*97f24f66STakanori Watanabe     "\020\040ENA\010RDY\03LOCH\02STSV\01DRDY"
96*97f24f66STakanori Watanabe 
97*97f24f66STakanori Watanabe #define	TPM_INT_VECTOR		0x000c	/* 8 bit reg for 4 bit irq vector */
98*97f24f66STakanori Watanabe #define	TPM_INT_STATUS		0x0010	/* bits are & 0x87 from TPM_INTERRUPT_ENABLE */
99*97f24f66STakanori Watanabe 
100*97f24f66STakanori Watanabe #define	TPM_INTF_CAPABILITIES		0x0014	/* capability register */
101*97f24f66STakanori Watanabe #define	TPM_INTF_BURST_COUNT_STATIC	0x0100	/* TPM_STS_BMASK static */
102*97f24f66STakanori Watanabe #define	TPM_INTF_CMD_READY_INT		0x0080	/* int on ready supported */
103*97f24f66STakanori Watanabe #define	TPM_INTF_INT_EDGE_FALLING	0x0040	/* falling edge ints supported */
104*97f24f66STakanori Watanabe #define	TPM_INTF_INT_EDGE_RISING	0x0020	/* rising edge ints supported */
105*97f24f66STakanori Watanabe #define	TPM_INTF_INT_LEVEL_LOW		0x0010	/* level-low ints supported */
106*97f24f66STakanori Watanabe #define	TPM_INTF_INT_LEVEL_HIGH		0x0008	/* level-high ints supported */
107*97f24f66STakanori Watanabe #define	TPM_INTF_LOCALITY_CHANGE_INT	0x0004	/* locality-change int (mb 1) */
108*97f24f66STakanori Watanabe #define	TPM_INTF_STS_VALID_INT		0x0002	/* TPM_STS_VALID int supported */
109*97f24f66STakanori Watanabe #define	TPM_INTF_DATA_AVAIL_INT		0x0001	/* TPM_STS_DATA_AVAIL int supported (mb 1) */
110*97f24f66STakanori Watanabe #define	TPM_CAPSREQ \
111*97f24f66STakanori Watanabe   (TPM_INTF_DATA_AVAIL_INT|TPM_INTF_LOCALITY_CHANGE_INT|TPM_INTF_INT_LEVEL_LOW)
112*97f24f66STakanori Watanabe #define	TPM_CAPBITS \
113*97f24f66STakanori Watanabe   "\020\01IDRDY\02ISTSV\03ILOCH\04IHIGH\05ILOW\06IEDGE\07IFALL\010IRDY\011BCST"
114*97f24f66STakanori Watanabe 
115*97f24f66STakanori Watanabe #define	TPM_STS			0x0018		/* status register */
116*97f24f66STakanori Watanabe #define TPM_STS_MASK		0x000000ff	/* status bits */
117*97f24f66STakanori Watanabe #define	TPM_STS_BMASK		0x00ffff00	/* ro io burst size */
118*97f24f66STakanori Watanabe #define	TPM_STS_VALID		0x00000080	/* ro other bits are valid */
119*97f24f66STakanori Watanabe #define	TPM_STS_CMD_READY	0x00000040	/* rw chip/signal ready */
120*97f24f66STakanori Watanabe #define	TPM_STS_GO		0x00000020	/* wo start the command */
121*97f24f66STakanori Watanabe #define	TPM_STS_DATA_AVAIL	0x00000010	/* ro data available */
122*97f24f66STakanori Watanabe #define	TPM_STS_DATA_EXPECT	0x00000008	/* ro more data to be written */
123*97f24f66STakanori Watanabe #define	TPM_STS_RESP_RETRY	0x00000002	/* wo resend the response */
124*97f24f66STakanori Watanabe #define	TPM_STS_BITS	"\020\010VALID\07RDY\06GO\05DRDY\04EXPECT\02RETRY"
125*97f24f66STakanori Watanabe 
126*97f24f66STakanori Watanabe #define	TPM_DATA	0x0024
127*97f24f66STakanori Watanabe #define	TPM_ID		0x0f00
128*97f24f66STakanori Watanabe #define	TPM_REV		0x0f04
129*97f24f66STakanori Watanabe #define	TPM_SIZE	0x5000		/* five pages of the above */
130*97f24f66STakanori Watanabe 
131*97f24f66STakanori Watanabe #define	TPM_ACCESS_TMO	2000		/* 2sec */
132*97f24f66STakanori Watanabe #define	TPM_READY_TMO	2000		/* 2sec */
133*97f24f66STakanori Watanabe #define	TPM_READ_TMO	120000		/* 2 minutes */
134*97f24f66STakanori Watanabe #define TPM_BURST_TMO	2000		/* 2sec */
135*97f24f66STakanori Watanabe 
136*97f24f66STakanori Watanabe #define	TPM_LEGACY_BUSY	0x01
137*97f24f66STakanori Watanabe #define	TPM_LEGACY_ABRT	0x01
138*97f24f66STakanori Watanabe #define	TPM_LEGACY_DA	0x02
139*97f24f66STakanori Watanabe #define	TPM_LEGACY_RE	0x04
140*97f24f66STakanori Watanabe #define	TPM_LEGACY_LAST	0x04
141*97f24f66STakanori Watanabe #define	TPM_LEGACY_BITS	"\020\01BUSY\2DA\3RE\4LAST"
142*97f24f66STakanori Watanabe #define	TPM_LEGACY_TMO		(2*60)	/* sec */
143*97f24f66STakanori Watanabe #define	TPM_LEGACY_SLEEP	5	/* ticks */
144*97f24f66STakanori Watanabe #define	TPM_LEGACY_DELAY	100
145*97f24f66STakanori Watanabe 
146*97f24f66STakanori Watanabe /* Set when enabling legacy interface in host bridge. */
147*97f24f66STakanori Watanabe int tpm_enabled;
148*97f24f66STakanori Watanabe 
149*97f24f66STakanori Watanabe 
150*97f24f66STakanori Watanabe #ifdef __FreeBSD__
151*97f24f66STakanori Watanabe #define	TPMSOFTC(dev) \
152*97f24f66STakanori Watanabe 	((struct tpm_softc *)dev->si_drv1)
153*97f24f66STakanori Watanabe 
154*97f24f66STakanori Watanabe d_open_t	tpmopen;
155*97f24f66STakanori Watanabe d_close_t	tpmclose;
156*97f24f66STakanori Watanabe d_read_t	tpmread;
157*97f24f66STakanori Watanabe d_write_t	tpmwrite;
158*97f24f66STakanori Watanabe d_ioctl_t	tpmioctl;
159*97f24f66STakanori Watanabe 
160*97f24f66STakanori Watanabe static struct cdevsw tpm_cdevsw = {
161*97f24f66STakanori Watanabe 	.d_version =	D_VERSION,
162*97f24f66STakanori Watanabe 	.d_flags =	D_NEEDGIANT,
163*97f24f66STakanori Watanabe 	.d_open =	tpmopen,
164*97f24f66STakanori Watanabe 	.d_close =	tpmclose,
165*97f24f66STakanori Watanabe 	.d_read =	tpmread,
166*97f24f66STakanori Watanabe 	.d_write =	tpmwrite,
167*97f24f66STakanori Watanabe 	.d_ioctl =	tpmioctl,
168*97f24f66STakanori Watanabe 	.d_name =	"tpm",
169*97f24f66STakanori Watanabe };
170*97f24f66STakanori Watanabe #else
171*97f24f66STakanori Watanabe #define	TPMSOFTC(dev) \
172*97f24f66STakanori Watanabe     (struct tpm_softc *)device_lookup(&tpm_cd, minor(dev))
173*97f24f66STakanori Watanabe 
174*97f24f66STakanori Watanabe struct cfdriver tpm_cd = {
175*97f24f66STakanori Watanabe 	NULL, "tpm", DV_DULL
176*97f24f66STakanori Watanabe };
177*97f24f66STakanori Watanabe 
178*97f24f66STakanori Watanabe int	tpm_match(struct device *, void *, void *);
179*97f24f66STakanori Watanabe void	tpm_attach(struct device *, struct device *, void *);
180*97f24f66STakanori Watanabe 
181*97f24f66STakanori Watanabe struct cfattach tpm_ca = {
182*97f24f66STakanori Watanabe 	sizeof(struct tpm_softc), tpm_match, tpm_attach
183*97f24f66STakanori Watanabe };
184*97f24f66STakanori Watanabe #endif
185*97f24f66STakanori Watanabe 
186*97f24f66STakanori Watanabe const struct {
187*97f24f66STakanori Watanabe 	u_int32_t devid;
188*97f24f66STakanori Watanabe 	char name[32];
189*97f24f66STakanori Watanabe 	int flags;
190*97f24f66STakanori Watanabe #define TPM_DEV_NOINTS	0x0001
191*97f24f66STakanori Watanabe } tpm_devs[] = {
192*97f24f66STakanori Watanabe 	{ 0x000615d1, "IFX SLD 9630 TT 1.1", 0 },
193*97f24f66STakanori Watanabe 	{ 0x000b15d1, "IFX SLB 9635 TT 1.2", 0 },
194*97f24f66STakanori Watanabe 	{ 0x100214e4, "Broadcom BCM0102", TPM_DEV_NOINTS },
195*97f24f66STakanori Watanabe 	{ 0x00fe1050, "WEC WPCT200", 0 },
196*97f24f66STakanori Watanabe 	{ 0x687119fa, "SNS SSX35", 0 },
197*97f24f66STakanori Watanabe 	{ 0x2e4d5453, "STM ST19WP18", 0 },
198*97f24f66STakanori Watanabe 	{ 0x32021114, "ATML 97SC3203", TPM_DEV_NOINTS },
199*97f24f66STakanori Watanabe 	{ 0x10408086, "INTEL INTC0102", 0 },
200*97f24f66STakanori Watanabe 	{ 0, "", TPM_DEV_NOINTS },
201*97f24f66STakanori Watanabe };
202*97f24f66STakanori Watanabe 
203*97f24f66STakanori Watanabe int tpm_tis12_irqinit(struct tpm_softc *, int, int);
204*97f24f66STakanori Watanabe int tpm_tis12_init(struct tpm_softc *, int, const char *);
205*97f24f66STakanori Watanabe int tpm_tis12_start(struct tpm_softc *, int);
206*97f24f66STakanori Watanabe int tpm_tis12_read(struct tpm_softc *, void *, int, size_t *, int);
207*97f24f66STakanori Watanabe int tpm_tis12_write(struct tpm_softc *, void *, int);
208*97f24f66STakanori Watanabe int tpm_tis12_end(struct tpm_softc *, int, int);
209*97f24f66STakanori Watanabe 
210*97f24f66STakanori Watanabe #ifdef __FreeBSD__
211*97f24f66STakanori Watanabe void tpm_intr(void *);
212*97f24f66STakanori Watanabe #else
213*97f24f66STakanori Watanabe int tpm_intr(void *);
214*97f24f66STakanori Watanabe void tpm_powerhook(int, void *);
215*97f24f66STakanori Watanabe int tpm_suspend(struct tpm_softc *, int);
216*97f24f66STakanori Watanabe int tpm_resume(struct tpm_softc *, int);
217*97f24f66STakanori Watanabe #endif
218*97f24f66STakanori Watanabe 
219*97f24f66STakanori Watanabe int tpm_waitfor_poll(struct tpm_softc *, u_int8_t, int, void *);
220*97f24f66STakanori Watanabe int tpm_waitfor_int(struct tpm_softc *, u_int8_t, int, void *, int);
221*97f24f66STakanori Watanabe int tpm_waitfor(struct tpm_softc *, u_int8_t, int, void *);
222*97f24f66STakanori Watanabe int tpm_request_locality(struct tpm_softc *, int);
223*97f24f66STakanori Watanabe int tpm_getburst(struct tpm_softc *);
224*97f24f66STakanori Watanabe u_int8_t tpm_status(struct tpm_softc *);
225*97f24f66STakanori Watanabe int tpm_tmotohz(int);
226*97f24f66STakanori Watanabe 
227*97f24f66STakanori Watanabe int tpm_legacy_probe(bus_space_tag_t, bus_addr_t);
228*97f24f66STakanori Watanabe int tpm_legacy_init(struct tpm_softc *, int, const char *);
229*97f24f66STakanori Watanabe int tpm_legacy_start(struct tpm_softc *, int);
230*97f24f66STakanori Watanabe int tpm_legacy_read(struct tpm_softc *, void *, int, size_t *, int);
231*97f24f66STakanori Watanabe int tpm_legacy_write(struct tpm_softc *, void *, int);
232*97f24f66STakanori Watanabe int tpm_legacy_end(struct tpm_softc *, int, int);
233*97f24f66STakanori Watanabe 
234*97f24f66STakanori Watanabe #ifdef __FreeBSD__
235*97f24f66STakanori Watanabe 
236*97f24f66STakanori Watanabe /*
237*97f24f66STakanori Watanabe  * FreeBSD specific code for probing and attaching TPM to device tree.
238*97f24f66STakanori Watanabe  */
239*97f24f66STakanori Watanabe #if 0
240*97f24f66STakanori Watanabe static void
241*97f24f66STakanori Watanabe tpm_identify(driver_t *driver, device_t parent)
242*97f24f66STakanori Watanabe {
243*97f24f66STakanori Watanabe 	BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, "tpm", 0);
244*97f24f66STakanori Watanabe }
245*97f24f66STakanori Watanabe #endif
246*97f24f66STakanori Watanabe 
247*97f24f66STakanori Watanabe 
248*97f24f66STakanori Watanabe int
249*97f24f66STakanori Watanabe tpm_attach(device_t dev)
250*97f24f66STakanori Watanabe {
251*97f24f66STakanori Watanabe 	struct tpm_softc *sc = device_get_softc(dev);
252*97f24f66STakanori Watanabe 	int irq;
253*97f24f66STakanori Watanabe 
254*97f24f66STakanori Watanabe 	sc->mem_rid = 0;
255*97f24f66STakanori Watanabe 	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
256*97f24f66STakanori Watanabe 	    RF_ACTIVE);
257*97f24f66STakanori Watanabe 	if (sc->mem_res == NULL)
258*97f24f66STakanori Watanabe 		return ENXIO;
259*97f24f66STakanori Watanabe 
260*97f24f66STakanori Watanabe 	sc->sc_bt = rman_get_bustag(sc->mem_res);
261*97f24f66STakanori Watanabe 	sc->sc_bh = rman_get_bushandle(sc->mem_res);
262*97f24f66STakanori Watanabe 
263*97f24f66STakanori Watanabe 	sc->irq_rid = 0;
264*97f24f66STakanori Watanabe 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
265*97f24f66STakanori Watanabe 	    RF_ACTIVE | RF_SHAREABLE);
266*97f24f66STakanori Watanabe 	if (sc->irq_res != NULL)
267*97f24f66STakanori Watanabe 		irq = rman_get_start(sc->irq_res);
268*97f24f66STakanori Watanabe 	else
269*97f24f66STakanori Watanabe 		irq = IRQUNK;
270*97f24f66STakanori Watanabe 
271*97f24f66STakanori Watanabe 	/* In case PnP probe this may contain some initialization. */
272*97f24f66STakanori Watanabe 	tpm_tis12_probe(sc->sc_bt, sc->sc_bh);
273*97f24f66STakanori Watanabe 
274*97f24f66STakanori Watanabe 	if (tpm_legacy_probe(sc->sc_bt, sc->sc_bh)) {
275*97f24f66STakanori Watanabe 		sc->sc_init = tpm_legacy_init;
276*97f24f66STakanori Watanabe 		sc->sc_start = tpm_legacy_start;
277*97f24f66STakanori Watanabe 		sc->sc_read = tpm_legacy_read;
278*97f24f66STakanori Watanabe 		sc->sc_write = tpm_legacy_write;
279*97f24f66STakanori Watanabe 		sc->sc_end = tpm_legacy_end;
280*97f24f66STakanori Watanabe 	} else {
281*97f24f66STakanori Watanabe 		sc->sc_init = tpm_tis12_init;
282*97f24f66STakanori Watanabe 		sc->sc_start = tpm_tis12_start;
283*97f24f66STakanori Watanabe 		sc->sc_read = tpm_tis12_read;
284*97f24f66STakanori Watanabe 		sc->sc_write = tpm_tis12_write;
285*97f24f66STakanori Watanabe 		sc->sc_end = tpm_tis12_end;
286*97f24f66STakanori Watanabe 	}
287*97f24f66STakanori Watanabe 
288*97f24f66STakanori Watanabe 	printf("%s", device_get_name(dev));
289*97f24f66STakanori Watanabe 	if ((sc->sc_init)(sc, irq, "tpm")) {
290*97f24f66STakanori Watanabe 		tpm_detach(dev);
291*97f24f66STakanori Watanabe 		return ENXIO;
292*97f24f66STakanori Watanabe 	}
293*97f24f66STakanori Watanabe 
294*97f24f66STakanori Watanabe 	if (sc->sc_init == tpm_tis12_init && sc->irq_res != NULL &&
295*97f24f66STakanori Watanabe 	    bus_setup_intr(dev, sc->irq_res, INTR_TYPE_TTY, NULL,
296*97f24f66STakanori Watanabe 	    tpm_intr, sc, &sc->intr_cookie) != 0) {
297*97f24f66STakanori Watanabe 		tpm_detach(dev);
298*97f24f66STakanori Watanabe 		printf(": cannot establish interrupt\n");
299*97f24f66STakanori Watanabe 		return 1;
300*97f24f66STakanori Watanabe 	}
301*97f24f66STakanori Watanabe 
302*97f24f66STakanori Watanabe 	sc->sc_cdev = make_dev(&tpm_cdevsw, device_get_unit(dev),
303*97f24f66STakanori Watanabe 			    UID_ROOT, GID_WHEEL, 0600, "tpm");
304*97f24f66STakanori Watanabe 	sc->sc_cdev->si_drv1 = sc;
305*97f24f66STakanori Watanabe 
306*97f24f66STakanori Watanabe 	return 0;
307*97f24f66STakanori Watanabe }
308*97f24f66STakanori Watanabe 
309*97f24f66STakanori Watanabe int
310*97f24f66STakanori Watanabe tpm_detach(device_t dev)
311*97f24f66STakanori Watanabe {
312*97f24f66STakanori Watanabe 	struct tpm_softc * sc = device_get_softc(dev);
313*97f24f66STakanori Watanabe 
314*97f24f66STakanori Watanabe 	if(sc->intr_cookie){
315*97f24f66STakanori Watanabe 		bus_teardown_intr(dev, sc->irq_res, sc->intr_cookie);
316*97f24f66STakanori Watanabe 	}
317*97f24f66STakanori Watanabe 
318*97f24f66STakanori Watanabe 	if(sc->mem_res){
319*97f24f66STakanori Watanabe 		bus_release_resource(dev, SYS_RES_MEMORY,
320*97f24f66STakanori Watanabe 				     sc->mem_rid, sc->mem_res);
321*97f24f66STakanori Watanabe 	}
322*97f24f66STakanori Watanabe 
323*97f24f66STakanori Watanabe 	if(sc->irq_res){
324*97f24f66STakanori Watanabe 		bus_release_resource(dev, SYS_RES_IRQ,
325*97f24f66STakanori Watanabe 				     sc->irq_rid, sc->irq_res);
326*97f24f66STakanori Watanabe 	}
327*97f24f66STakanori Watanabe 	if(sc->sc_cdev){
328*97f24f66STakanori Watanabe 		destroy_dev(sc->sc_cdev);
329*97f24f66STakanori Watanabe 	}
330*97f24f66STakanori Watanabe 
331*97f24f66STakanori Watanabe 	return 0;
332*97f24f66STakanori Watanabe }
333*97f24f66STakanori Watanabe 
334*97f24f66STakanori Watanabe 
335*97f24f66STakanori Watanabe #else
336*97f24f66STakanori Watanabe /*
337*97f24f66STakanori Watanabe  * OpenBSD specific code for probing and attaching TPM to device tree.
338*97f24f66STakanori Watanabe  */
339*97f24f66STakanori Watanabe int
340*97f24f66STakanori Watanabe tpm_match(struct device *parent, void *match, void *aux)
341*97f24f66STakanori Watanabe {
342*97f24f66STakanori Watanabe 	struct isa_attach_args *ia = aux;
343*97f24f66STakanori Watanabe 	struct cfdata *cf = match;
344*97f24f66STakanori Watanabe 	bus_space_tag_t bt = ia->ia_memt;
345*97f24f66STakanori Watanabe 	bus_space_handle_t bh;
346*97f24f66STakanori Watanabe 	int rv;
347*97f24f66STakanori Watanabe 
348*97f24f66STakanori Watanabe 	/* There can be only one. */
349*97f24f66STakanori Watanabe 	if (cf->cf_unit)
350*97f24f66STakanori Watanabe 		return 0;
351*97f24f66STakanori Watanabe 
352*97f24f66STakanori Watanabe 	if (tpm_legacy_probe(ia->ia_iot, ia->ia_iobase)) {
353*97f24f66STakanori Watanabe 		ia->ia_iosize = 2;
354*97f24f66STakanori Watanabe 		return 1;
355*97f24f66STakanori Watanabe 	}
356*97f24f66STakanori Watanabe 
357*97f24f66STakanori Watanabe 	if (ia->ia_maddr == -1)
358*97f24f66STakanori Watanabe 		return 0;
359*97f24f66STakanori Watanabe 
360*97f24f66STakanori Watanabe 	if (bus_space_map(bt, ia->ia_maddr, TPM_SIZE, 0, &bh))
361*97f24f66STakanori Watanabe 		return 0;
362*97f24f66STakanori Watanabe 
363*97f24f66STakanori Watanabe 	if ((rv = tpm_tis12_probe(bt, bh))) {
364*97f24f66STakanori Watanabe 		ia->ia_iosize = 0;
365*97f24f66STakanori Watanabe 		ia->ia_msize = TPM_SIZE;
366*97f24f66STakanori Watanabe 	}
367*97f24f66STakanori Watanabe 
368*97f24f66STakanori Watanabe 	bus_space_unmap(bt, bh, TPM_SIZE);
369*97f24f66STakanori Watanabe 	return rv;
370*97f24f66STakanori Watanabe }
371*97f24f66STakanori Watanabe 
372*97f24f66STakanori Watanabe void
373*97f24f66STakanori Watanabe tpm_attach(struct device *parent, struct device *self, void *aux)
374*97f24f66STakanori Watanabe {
375*97f24f66STakanori Watanabe 	struct tpm_softc *sc = (struct tpm_softc *)self;
376*97f24f66STakanori Watanabe 	struct isa_attach_args *ia = aux;
377*97f24f66STakanori Watanabe 	bus_addr_t iobase;
378*97f24f66STakanori Watanabe 	bus_size_t size;
379*97f24f66STakanori Watanabe 	int rv;
380*97f24f66STakanori Watanabe 
381*97f24f66STakanori Watanabe 	if (tpm_legacy_probe(ia->ia_iot, ia->ia_iobase)) {
382*97f24f66STakanori Watanabe 		sc->sc_bt = ia->ia_iot;
383*97f24f66STakanori Watanabe 		iobase = ia->ia_iobase;
384*97f24f66STakanori Watanabe 		size = ia->ia_iosize;
385*97f24f66STakanori Watanabe 		sc->sc_batm = ia->ia_iot;
386*97f24f66STakanori Watanabe 		sc->sc_init = tpm_legacy_init;
387*97f24f66STakanori Watanabe 		sc->sc_start = tpm_legacy_start;
388*97f24f66STakanori Watanabe 		sc->sc_read = tpm_legacy_read;
389*97f24f66STakanori Watanabe 		sc->sc_write = tpm_legacy_write;
390*97f24f66STakanori Watanabe 		sc->sc_end = tpm_legacy_end;
391*97f24f66STakanori Watanabe 	} else {
392*97f24f66STakanori Watanabe 		sc->sc_bt = ia->ia_memt;
393*97f24f66STakanori Watanabe 		iobase = ia->ia_maddr;
394*97f24f66STakanori Watanabe 		size = TPM_SIZE;
395*97f24f66STakanori Watanabe 		sc->sc_init = tpm_tis12_init;
396*97f24f66STakanori Watanabe 		sc->sc_start = tpm_tis12_start;
397*97f24f66STakanori Watanabe 		sc->sc_read = tpm_tis12_read;
398*97f24f66STakanori Watanabe 		sc->sc_write = tpm_tis12_write;
399*97f24f66STakanori Watanabe 		sc->sc_end = tpm_tis12_end;
400*97f24f66STakanori Watanabe 	}
401*97f24f66STakanori Watanabe 
402*97f24f66STakanori Watanabe 	if (bus_space_map(sc->sc_bt, iobase, size, 0, &sc->sc_bh)) {
403*97f24f66STakanori Watanabe 		printf(": cannot map registers\n");
404*97f24f66STakanori Watanabe 		return;
405*97f24f66STakanori Watanabe 	}
406*97f24f66STakanori Watanabe 
407*97f24f66STakanori Watanabe 	if ((rv = (sc->sc_init)(sc, ia->ia_irq, sc->sc_dev.dv_xname))) {
408*97f24f66STakanori Watanabe 		bus_space_unmap(sc->sc_bt, sc->sc_bh, size);
409*97f24f66STakanori Watanabe 		return;
410*97f24f66STakanori Watanabe 	}
411*97f24f66STakanori Watanabe 
412*97f24f66STakanori Watanabe 	/*
413*97f24f66STakanori Watanabe 	 * Only setup interrupt handler when we have a vector and the
414*97f24f66STakanori Watanabe 	 * chip is TIS 1.2 compliant.
415*97f24f66STakanori Watanabe 	 */
416*97f24f66STakanori Watanabe 	if (sc->sc_init == tpm_tis12_init && ia->ia_irq != IRQUNK &&
417*97f24f66STakanori Watanabe 	    (sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
418*97f24f66STakanori Watanabe 	    IPL_TTY, tpm_intr, sc, sc->sc_dev.dv_xname)) == NULL) {
419*97f24f66STakanori Watanabe 		bus_space_unmap(sc->sc_bt, sc->sc_bh, TPM_SIZE);
420*97f24f66STakanori Watanabe 		printf("%s: cannot establish interrupt\n",
421*97f24f66STakanori Watanabe 		    sc->sc_dev.dv_xname);
422*97f24f66STakanori Watanabe 		return;
423*97f24f66STakanori Watanabe 	}
424*97f24f66STakanori Watanabe 
425*97f24f66STakanori Watanabe #ifdef __FreeBSD__
426*97f24f66STakanori Watanabe 	sc->sc_suspend = 0;
427*97f24f66STakanori Watanabe #else
428*97f24f66STakanori Watanabe 	sc->sc_suspend = PWR_RESUME;
429*97f24f66STakanori Watanabe 	sc->sc_powerhook = powerhook_establish(tpm_powerhook, sc);
430*97f24f66STakanori Watanabe #endif
431*97f24f66STakanori Watanabe }
432*97f24f66STakanori Watanabe #endif
433*97f24f66STakanori Watanabe 
434*97f24f66STakanori Watanabe /* Probe TPM using TIS 1.2 interface. */
435*97f24f66STakanori Watanabe int
436*97f24f66STakanori Watanabe tpm_tis12_probe(bus_space_tag_t bt, bus_space_handle_t bh)
437*97f24f66STakanori Watanabe {
438*97f24f66STakanori Watanabe 	u_int32_t r;
439*97f24f66STakanori Watanabe 	u_int8_t save, reg;
440*97f24f66STakanori Watanabe 
441*97f24f66STakanori Watanabe 	r = bus_space_read_4(bt, bh, TPM_INTF_CAPABILITIES);
442*97f24f66STakanori Watanabe 	if (r == 0xffffffff)
443*97f24f66STakanori Watanabe 		return 0;
444*97f24f66STakanori Watanabe 
445*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
446*97f24f66STakanori Watanabe 	printf("tpm: caps=%b\n", r, TPM_CAPBITS);
447*97f24f66STakanori Watanabe #endif
448*97f24f66STakanori Watanabe 	if ((r & TPM_CAPSREQ) != TPM_CAPSREQ ||
449*97f24f66STakanori Watanabe 	    !(r & (TPM_INTF_INT_EDGE_RISING | TPM_INTF_INT_LEVEL_LOW))) {
450*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
451*97f24f66STakanori Watanabe 		printf("tpm: caps too low (caps=%b)\n", r, TPM_CAPBITS);
452*97f24f66STakanori Watanabe #endif
453*97f24f66STakanori Watanabe 		return 0;
454*97f24f66STakanori Watanabe 	}
455*97f24f66STakanori Watanabe 
456*97f24f66STakanori Watanabe 	save = bus_space_read_1(bt, bh, TPM_ACCESS);
457*97f24f66STakanori Watanabe 	bus_space_write_1(bt, bh, TPM_ACCESS, TPM_ACCESS_REQUEST_USE);
458*97f24f66STakanori Watanabe 	reg = bus_space_read_1(bt, bh, TPM_ACCESS);
459*97f24f66STakanori Watanabe 	if ((reg & TPM_ACCESS_VALID) && (reg & TPM_ACCESS_ACTIVE_LOCALITY) &&
460*97f24f66STakanori Watanabe 	    bus_space_read_4(bt, bh, TPM_ID) != 0xffffffff)
461*97f24f66STakanori Watanabe 		return 1;
462*97f24f66STakanori Watanabe 
463*97f24f66STakanori Watanabe 	bus_space_write_1(bt, bh, TPM_ACCESS, save);
464*97f24f66STakanori Watanabe 	return 0;
465*97f24f66STakanori Watanabe }
466*97f24f66STakanori Watanabe 
467*97f24f66STakanori Watanabe /*
468*97f24f66STakanori Watanabe  * Setup interrupt vector if one is provided and interrupts are know to
469*97f24f66STakanori Watanabe  * work on that particular chip.
470*97f24f66STakanori Watanabe  */
471*97f24f66STakanori Watanabe int
472*97f24f66STakanori Watanabe tpm_tis12_irqinit(struct tpm_softc *sc, int irq, int idx)
473*97f24f66STakanori Watanabe {
474*97f24f66STakanori Watanabe 	u_int32_t r;
475*97f24f66STakanori Watanabe 
476*97f24f66STakanori Watanabe 	if ((irq == IRQUNK) || (tpm_devs[idx].flags & TPM_DEV_NOINTS)) {
477*97f24f66STakanori Watanabe 		sc->sc_vector = IRQUNK;
478*97f24f66STakanori Watanabe 		return 0;
479*97f24f66STakanori Watanabe 	}
480*97f24f66STakanori Watanabe 
481*97f24f66STakanori Watanabe 	/* Ack and disable all interrupts. */
482*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE,
483*97f24f66STakanori Watanabe 	    bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
484*97f24f66STakanori Watanabe 	    ~TPM_GLOBAL_INT_ENABLE);
485*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS,
486*97f24f66STakanori Watanabe 	    bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS));
487*97f24f66STakanori Watanabe 
488*97f24f66STakanori Watanabe 	/* Program interrupt vector. */
489*97f24f66STakanori Watanabe 	bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_INT_VECTOR, irq);
490*97f24f66STakanori Watanabe 	sc->sc_vector = irq;
491*97f24f66STakanori Watanabe 
492*97f24f66STakanori Watanabe 	/* Program interrupt type. */
493*97f24f66STakanori Watanabe 	if (sc->sc_capabilities & TPM_INTF_INT_EDGE_RISING)
494*97f24f66STakanori Watanabe 		r = TPM_INT_EDGE_RISING;
495*97f24f66STakanori Watanabe 	else if (sc->sc_capabilities & TPM_INTF_INT_LEVEL_HIGH)
496*97f24f66STakanori Watanabe 		r = TPM_INT_LEVEL_HIGH;
497*97f24f66STakanori Watanabe 	else
498*97f24f66STakanori Watanabe 		r = TPM_INT_LEVEL_LOW;
499*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, r);
500*97f24f66STakanori Watanabe 
501*97f24f66STakanori Watanabe 	return 0;
502*97f24f66STakanori Watanabe }
503*97f24f66STakanori Watanabe 
504*97f24f66STakanori Watanabe /* Setup TPM using TIS 1.2 interface. */
505*97f24f66STakanori Watanabe int
506*97f24f66STakanori Watanabe tpm_tis12_init(struct tpm_softc *sc, int irq, const char *name)
507*97f24f66STakanori Watanabe {
508*97f24f66STakanori Watanabe 	u_int32_t r;
509*97f24f66STakanori Watanabe 	int i;
510*97f24f66STakanori Watanabe 
511*97f24f66STakanori Watanabe 	r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTF_CAPABILITIES);
512*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
513*97f24f66STakanori Watanabe 	printf(" caps=%b ", r, TPM_CAPBITS);
514*97f24f66STakanori Watanabe #endif
515*97f24f66STakanori Watanabe 	if ((r & TPM_CAPSREQ) != TPM_CAPSREQ ||
516*97f24f66STakanori Watanabe 	    !(r & (TPM_INTF_INT_EDGE_RISING | TPM_INTF_INT_LEVEL_LOW))) {
517*97f24f66STakanori Watanabe 		printf(": capabilities too low (caps=%b)\n", r, TPM_CAPBITS);
518*97f24f66STakanori Watanabe 		return 1;
519*97f24f66STakanori Watanabe 	}
520*97f24f66STakanori Watanabe 	sc->sc_capabilities = r;
521*97f24f66STakanori Watanabe 
522*97f24f66STakanori Watanabe 	sc->sc_devid = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_ID);
523*97f24f66STakanori Watanabe 	sc->sc_rev = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_REV);
524*97f24f66STakanori Watanabe 
525*97f24f66STakanori Watanabe 	for (i = 0; tpm_devs[i].devid; i++)
526*97f24f66STakanori Watanabe 		if (tpm_devs[i].devid == sc->sc_devid)
527*97f24f66STakanori Watanabe 			break;
528*97f24f66STakanori Watanabe 
529*97f24f66STakanori Watanabe 	if (tpm_devs[i].devid)
530*97f24f66STakanori Watanabe 		printf(": %s rev 0x%x\n", tpm_devs[i].name, sc->sc_rev);
531*97f24f66STakanori Watanabe 	else
532*97f24f66STakanori Watanabe 		printf(": device 0x%08x rev 0x%x\n", sc->sc_devid, sc->sc_rev);
533*97f24f66STakanori Watanabe 
534*97f24f66STakanori Watanabe 	if (tpm_tis12_irqinit(sc, irq, i))
535*97f24f66STakanori Watanabe 		return 1;
536*97f24f66STakanori Watanabe 
537*97f24f66STakanori Watanabe 	if (tpm_request_locality(sc, 0))
538*97f24f66STakanori Watanabe 		return 1;
539*97f24f66STakanori Watanabe 
540*97f24f66STakanori Watanabe 	/* Abort whatever it thought it was doing. */
541*97f24f66STakanori Watanabe 	bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, TPM_STS_CMD_READY);
542*97f24f66STakanori Watanabe 
543*97f24f66STakanori Watanabe 	return 0;
544*97f24f66STakanori Watanabe }
545*97f24f66STakanori Watanabe 
546*97f24f66STakanori Watanabe int
547*97f24f66STakanori Watanabe tpm_request_locality(struct tpm_softc *sc, int l)
548*97f24f66STakanori Watanabe {
549*97f24f66STakanori Watanabe 	u_int32_t r;
550*97f24f66STakanori Watanabe 	int to, rv;
551*97f24f66STakanori Watanabe 
552*97f24f66STakanori Watanabe 	if (l != 0)
553*97f24f66STakanori Watanabe 		return EINVAL;
554*97f24f66STakanori Watanabe 
555*97f24f66STakanori Watanabe 	if ((bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_ACCESS) &
556*97f24f66STakanori Watanabe 	    (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) ==
557*97f24f66STakanori Watanabe 	    (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY))
558*97f24f66STakanori Watanabe 		return 0;
559*97f24f66STakanori Watanabe 
560*97f24f66STakanori Watanabe 	bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_ACCESS,
561*97f24f66STakanori Watanabe 	    TPM_ACCESS_REQUEST_USE);
562*97f24f66STakanori Watanabe 
563*97f24f66STakanori Watanabe 	to = tpm_tmotohz(TPM_ACCESS_TMO);
564*97f24f66STakanori Watanabe 
565*97f24f66STakanori Watanabe 	while ((r = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_ACCESS) &
566*97f24f66STakanori Watanabe 	    (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) !=
567*97f24f66STakanori Watanabe 	    (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY) && to--) {
568*97f24f66STakanori Watanabe 		rv = tsleep(sc->sc_init, PRIBIO | PCATCH, "tpm_locality", 1);
569*97f24f66STakanori Watanabe 		if (rv &&  rv != EWOULDBLOCK) {
570*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
571*97f24f66STakanori Watanabe 			printf("tpm_request_locality: interrupted %d\n", rv);
572*97f24f66STakanori Watanabe #endif
573*97f24f66STakanori Watanabe 			return rv;
574*97f24f66STakanori Watanabe 		}
575*97f24f66STakanori Watanabe 	}
576*97f24f66STakanori Watanabe 
577*97f24f66STakanori Watanabe 	if ((r & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) !=
578*97f24f66STakanori Watanabe 	    (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) {
579*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
580*97f24f66STakanori Watanabe 		printf("tpm_request_locality: access %b\n", r, TPM_ACCESS_BITS);
581*97f24f66STakanori Watanabe #endif
582*97f24f66STakanori Watanabe 		return EBUSY;
583*97f24f66STakanori Watanabe 	}
584*97f24f66STakanori Watanabe 
585*97f24f66STakanori Watanabe 	return 0;
586*97f24f66STakanori Watanabe }
587*97f24f66STakanori Watanabe 
588*97f24f66STakanori Watanabe int
589*97f24f66STakanori Watanabe tpm_getburst(struct tpm_softc *sc)
590*97f24f66STakanori Watanabe {
591*97f24f66STakanori Watanabe 	int burst, to, rv;
592*97f24f66STakanori Watanabe 
593*97f24f66STakanori Watanabe 	to = tpm_tmotohz(TPM_BURST_TMO);
594*97f24f66STakanori Watanabe 
595*97f24f66STakanori Watanabe 	burst = 0;
596*97f24f66STakanori Watanabe 	while (burst == 0 && to--) {
597*97f24f66STakanori Watanabe 		/*
598*97f24f66STakanori Watanabe 		 * Burst count has to be read from bits 8 to 23 without
599*97f24f66STakanori Watanabe 		 * touching any other bits, eg. the actual status bits 0
600*97f24f66STakanori Watanabe 		 * to 7.
601*97f24f66STakanori Watanabe 		 */
602*97f24f66STakanori Watanabe 		burst = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_STS + 1);
603*97f24f66STakanori Watanabe 		burst |= bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_STS + 2)
604*97f24f66STakanori Watanabe 		    << 8;
605*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
606*97f24f66STakanori Watanabe 		printf("tpm_getburst: read %d\n", burst);
607*97f24f66STakanori Watanabe #endif
608*97f24f66STakanori Watanabe 		if (burst)
609*97f24f66STakanori Watanabe 			return burst;
610*97f24f66STakanori Watanabe 
611*97f24f66STakanori Watanabe 		rv = tsleep(sc, PRIBIO | PCATCH, "tpm_getburst", 1);
612*97f24f66STakanori Watanabe 		if (rv && rv != EWOULDBLOCK) {
613*97f24f66STakanori Watanabe 			return 0;
614*97f24f66STakanori Watanabe 		}
615*97f24f66STakanori Watanabe 	}
616*97f24f66STakanori Watanabe 
617*97f24f66STakanori Watanabe 	return 0;
618*97f24f66STakanori Watanabe }
619*97f24f66STakanori Watanabe 
620*97f24f66STakanori Watanabe u_int8_t
621*97f24f66STakanori Watanabe tpm_status(struct tpm_softc *sc)
622*97f24f66STakanori Watanabe {
623*97f24f66STakanori Watanabe 	u_int8_t status;
624*97f24f66STakanori Watanabe 
625*97f24f66STakanori Watanabe 	status = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_STS) &
626*97f24f66STakanori Watanabe 	    TPM_STS_MASK;
627*97f24f66STakanori Watanabe 
628*97f24f66STakanori Watanabe 	return status;
629*97f24f66STakanori Watanabe }
630*97f24f66STakanori Watanabe 
631*97f24f66STakanori Watanabe int
632*97f24f66STakanori Watanabe tpm_tmotohz(int tmo)
633*97f24f66STakanori Watanabe {
634*97f24f66STakanori Watanabe 	struct timeval tv;
635*97f24f66STakanori Watanabe 
636*97f24f66STakanori Watanabe 	tv.tv_sec = tmo / 1000;
637*97f24f66STakanori Watanabe 	tv.tv_usec = 1000 * (tmo % 1000);
638*97f24f66STakanori Watanabe 
639*97f24f66STakanori Watanabe 	return tvtohz(&tv);
640*97f24f66STakanori Watanabe }
641*97f24f66STakanori Watanabe 
642*97f24f66STakanori Watanabe /* Save TPM state on suspend. */
643*97f24f66STakanori Watanabe int
644*97f24f66STakanori Watanabe #ifdef __FreeBSD__
645*97f24f66STakanori Watanabe tpm_suspend(device_t dev)
646*97f24f66STakanori Watanabe #else
647*97f24f66STakanori Watanabe tpm_suspend(struct tpm_softc *sc, int why)
648*97f24f66STakanori Watanabe #endif
649*97f24f66STakanori Watanabe {
650*97f24f66STakanori Watanabe #ifdef __FreeBSD__
651*97f24f66STakanori Watanabe 	struct tpm_softc *sc = device_get_softc(dev);
652*97f24f66STakanori Watanabe 	int why = 1;
653*97f24f66STakanori Watanabe #endif
654*97f24f66STakanori Watanabe 	u_int8_t command[] = {
655*97f24f66STakanori Watanabe 	    0, 193,		/* TPM_TAG_RQU_COMMAND */
656*97f24f66STakanori Watanabe 	    0, 0, 0, 10,	/* Length in bytes */
657*97f24f66STakanori Watanabe 	    0, 0, 0, 156	/* TPM_ORD_SaveStates */
658*97f24f66STakanori Watanabe 	};
659*97f24f66STakanori Watanabe 
660*97f24f66STakanori Watanabe 	/*
661*97f24f66STakanori Watanabe 	 * Power down:  We have to issue the SaveStates command.
662*97f24f66STakanori Watanabe 	 */
663*97f24f66STakanori Watanabe 	sc->sc_write(sc, &command, sizeof(command));
664*97f24f66STakanori Watanabe 	sc->sc_read(sc, &command, sizeof(command), NULL, TPM_HDRSIZE);
665*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
666*97f24f66STakanori Watanabe 	printf("tpm_suspend: power down: %d -> %d\n", sc->sc_suspend, why);
667*97f24f66STakanori Watanabe #endif
668*97f24f66STakanori Watanabe 	sc->sc_suspend = why;
669*97f24f66STakanori Watanabe 
670*97f24f66STakanori Watanabe 	return 0;
671*97f24f66STakanori Watanabe }
672*97f24f66STakanori Watanabe 
673*97f24f66STakanori Watanabe /*
674*97f24f66STakanori Watanabe  * Handle resume event.  Actually nothing to do as the BIOS is supposed
675*97f24f66STakanori Watanabe  * to restore the previously saved state.
676*97f24f66STakanori Watanabe  */
677*97f24f66STakanori Watanabe int
678*97f24f66STakanori Watanabe #ifdef __FreeBSD__
679*97f24f66STakanori Watanabe tpm_resume(device_t dev)
680*97f24f66STakanori Watanabe #else
681*97f24f66STakanori Watanabe tpm_resume(struct tpm_softc *sc, int why)
682*97f24f66STakanori Watanabe #endif
683*97f24f66STakanori Watanabe {
684*97f24f66STakanori Watanabe #ifdef __FreeBSD__
685*97f24f66STakanori Watanabe 	struct tpm_softc *sc = device_get_softc(dev);
686*97f24f66STakanori Watanabe 	int why = 0;
687*97f24f66STakanori Watanabe #endif
688*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
689*97f24f66STakanori Watanabe 	printf("tpm_resume: resume: %d -> %d\n", sc->sc_suspend, why);
690*97f24f66STakanori Watanabe #endif
691*97f24f66STakanori Watanabe 	sc->sc_suspend = why;
692*97f24f66STakanori Watanabe 
693*97f24f66STakanori Watanabe 	return 0;
694*97f24f66STakanori Watanabe }
695*97f24f66STakanori Watanabe 
696*97f24f66STakanori Watanabe /* Dispatch suspend and resume events. */
697*97f24f66STakanori Watanabe #ifndef __FreeBSD__
698*97f24f66STakanori Watanabe void
699*97f24f66STakanori Watanabe tpm_powerhook(int why, void *self)
700*97f24f66STakanori Watanabe {
701*97f24f66STakanori Watanabe 	struct tpm_softc *sc = (struct tpm_softc *)self;
702*97f24f66STakanori Watanabe 
703*97f24f66STakanori Watanabe 	if (why != PWR_RESUME)
704*97f24f66STakanori Watanabe 		tpm_suspend(sc, why);
705*97f24f66STakanori Watanabe 	else
706*97f24f66STakanori Watanabe 		tpm_resume(sc, why);
707*97f24f66STakanori Watanabe }
708*97f24f66STakanori Watanabe #endif	/* !__FreeBSD__ */
709*97f24f66STakanori Watanabe 
710*97f24f66STakanori Watanabe /* Wait for given status bits using polling. */
711*97f24f66STakanori Watanabe int
712*97f24f66STakanori Watanabe tpm_waitfor_poll(struct tpm_softc *sc, u_int8_t mask, int tmo, void *c)
713*97f24f66STakanori Watanabe {
714*97f24f66STakanori Watanabe 	int rv;
715*97f24f66STakanori Watanabe 
716*97f24f66STakanori Watanabe 	/*
717*97f24f66STakanori Watanabe 	 * Poll until either the requested condition or a time out is
718*97f24f66STakanori Watanabe 	 * met.
719*97f24f66STakanori Watanabe 	 */
720*97f24f66STakanori Watanabe 	while (((sc->sc_stat = tpm_status(sc)) & mask) != mask && tmo--) {
721*97f24f66STakanori Watanabe 		rv = tsleep(c, PRIBIO | PCATCH, "tpm_poll", 1);
722*97f24f66STakanori Watanabe 		if (rv && rv != EWOULDBLOCK) {
723*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
724*97f24f66STakanori Watanabe 			printf("tpm_waitfor_poll: interrupted %d\n", rv);
725*97f24f66STakanori Watanabe #endif
726*97f24f66STakanori Watanabe 			return rv;
727*97f24f66STakanori Watanabe 		}
728*97f24f66STakanori Watanabe 	}
729*97f24f66STakanori Watanabe 
730*97f24f66STakanori Watanabe 	return 0;
731*97f24f66STakanori Watanabe }
732*97f24f66STakanori Watanabe 
733*97f24f66STakanori Watanabe /* Wait for given status bits using interrupts. */
734*97f24f66STakanori Watanabe int
735*97f24f66STakanori Watanabe tpm_waitfor_int(struct tpm_softc *sc, u_int8_t mask, int tmo, void *c,
736*97f24f66STakanori Watanabe     int inttype)
737*97f24f66STakanori Watanabe {
738*97f24f66STakanori Watanabe 	int rv, to;
739*97f24f66STakanori Watanabe 
740*97f24f66STakanori Watanabe 	/* Poll and return when condition is already met. */
741*97f24f66STakanori Watanabe 	sc->sc_stat = tpm_status(sc);
742*97f24f66STakanori Watanabe 	if ((sc->sc_stat & mask) == mask)
743*97f24f66STakanori Watanabe 		return 0;
744*97f24f66STakanori Watanabe 
745*97f24f66STakanori Watanabe 	/*
746*97f24f66STakanori Watanabe 	 * Enable interrupt on tpm chip.  Note that interrupts on our
747*97f24f66STakanori Watanabe 	 * level (SPL_TTY) are disabled (see tpm{read,write} et al) and
748*97f24f66STakanori Watanabe 	 * will not be delivered to the cpu until we call tsleep(9) below.
749*97f24f66STakanori Watanabe 	 */
750*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE,
751*97f24f66STakanori Watanabe 	    bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) |
752*97f24f66STakanori Watanabe 	    inttype);
753*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE,
754*97f24f66STakanori Watanabe 	    bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) |
755*97f24f66STakanori Watanabe 	    TPM_GLOBAL_INT_ENABLE);
756*97f24f66STakanori Watanabe 
757*97f24f66STakanori Watanabe 	/*
758*97f24f66STakanori Watanabe 	 * Poll once more to remedy the race between previous polling
759*97f24f66STakanori Watanabe 	 * and enabling interrupts on the tpm chip.
760*97f24f66STakanori Watanabe 	 */
761*97f24f66STakanori Watanabe 	sc->sc_stat = tpm_status(sc);
762*97f24f66STakanori Watanabe 	if ((sc->sc_stat & mask) == mask) {
763*97f24f66STakanori Watanabe 		rv = 0;
764*97f24f66STakanori Watanabe 		goto out;
765*97f24f66STakanori Watanabe 	}
766*97f24f66STakanori Watanabe 
767*97f24f66STakanori Watanabe 	to = tpm_tmotohz(tmo);
768*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
769*97f24f66STakanori Watanabe 	printf("tpm_waitfor_int: sleeping for %d ticks on %p\n", to, c);
770*97f24f66STakanori Watanabe #endif
771*97f24f66STakanori Watanabe 	/*
772*97f24f66STakanori Watanabe 	 * tsleep(9) enables interrupts on the cpu and returns after
773*97f24f66STakanori Watanabe 	 * wake up with interrupts disabled again.  Note that interrupts
774*97f24f66STakanori Watanabe 	 * generated by the tpm chip while being at SPL_TTY are not lost
775*97f24f66STakanori Watanabe 	 * but held and delivered as soon as the cpu goes below SPL_TTY.
776*97f24f66STakanori Watanabe 	 */
777*97f24f66STakanori Watanabe 	rv = tsleep(c, PRIBIO | PCATCH, "tpm_intr", to);
778*97f24f66STakanori Watanabe 
779*97f24f66STakanori Watanabe 	sc->sc_stat = tpm_status(sc);
780*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
781*97f24f66STakanori Watanabe 	printf("tpm_waitfor_int: woke up with rv %d stat %b\n", rv,
782*97f24f66STakanori Watanabe 	    sc->sc_stat, TPM_STS_BITS);
783*97f24f66STakanori Watanabe #endif
784*97f24f66STakanori Watanabe 	if ((sc->sc_stat & mask) == mask)
785*97f24f66STakanori Watanabe 		rv = 0;
786*97f24f66STakanori Watanabe 
787*97f24f66STakanori Watanabe 	/* Disable interrupts on tpm chip again. */
788*97f24f66STakanori Watanabe out:	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE,
789*97f24f66STakanori Watanabe 	    bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
790*97f24f66STakanori Watanabe 	    ~TPM_GLOBAL_INT_ENABLE);
791*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE,
792*97f24f66STakanori Watanabe 	    bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
793*97f24f66STakanori Watanabe 	    ~inttype);
794*97f24f66STakanori Watanabe 
795*97f24f66STakanori Watanabe 	return rv;
796*97f24f66STakanori Watanabe }
797*97f24f66STakanori Watanabe 
798*97f24f66STakanori Watanabe /*
799*97f24f66STakanori Watanabe  * Wait on given status bits, uses interrupts where possible, otherwise polls.
800*97f24f66STakanori Watanabe  */
801*97f24f66STakanori Watanabe int
802*97f24f66STakanori Watanabe tpm_waitfor(struct tpm_softc *sc, u_int8_t b0, int tmo, void *c)
803*97f24f66STakanori Watanabe {
804*97f24f66STakanori Watanabe 	u_int8_t b;
805*97f24f66STakanori Watanabe 	int re, to, rv;
806*97f24f66STakanori Watanabe 
807*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
808*97f24f66STakanori Watanabe 	printf("tpm_waitfor: b0 %b\n", b0, TPM_STS_BITS);
809*97f24f66STakanori Watanabe #endif
810*97f24f66STakanori Watanabe 
811*97f24f66STakanori Watanabe 	/*
812*97f24f66STakanori Watanabe 	 * If possible, use interrupts, otherwise poll.
813*97f24f66STakanori Watanabe 	 *
814*97f24f66STakanori Watanabe 	 * We use interrupts for TPM_STS_VALID and TPM_STS_DATA_AVAIL (if
815*97f24f66STakanori Watanabe 	 * the tpm chips supports them) as waiting for those can take
816*97f24f66STakanori Watanabe 	 * really long.  The other TPM_STS* are not needed very often
817*97f24f66STakanori Watanabe 	 * so we do not support them.
818*97f24f66STakanori Watanabe 	 */
819*97f24f66STakanori Watanabe 	if (sc->sc_vector != IRQUNK) {
820*97f24f66STakanori Watanabe 		b = b0;
821*97f24f66STakanori Watanabe 
822*97f24f66STakanori Watanabe 		/*
823*97f24f66STakanori Watanabe 		 * Wait for data ready.  This interrupt only occures
824*97f24f66STakanori Watanabe 		 * when both TPM_STS_VALID and TPM_STS_DATA_AVAIL are asserted.
825*97f24f66STakanori Watanabe 		 * Thus we don't have to bother with TPM_STS_VALID
826*97f24f66STakanori Watanabe 		 * separately and can just return.
827*97f24f66STakanori Watanabe 		 *
828*97f24f66STakanori Watanabe 		 * This only holds for interrupts!  When using polling
829*97f24f66STakanori Watanabe 		 * both flags have to be waited for, see below.
830*97f24f66STakanori Watanabe 		 */
831*97f24f66STakanori Watanabe 		if ((b & TPM_STS_DATA_AVAIL) && (sc->sc_capabilities &
832*97f24f66STakanori Watanabe 		    TPM_INTF_DATA_AVAIL_INT))
833*97f24f66STakanori Watanabe 			return tpm_waitfor_int(sc, b, tmo, c,
834*97f24f66STakanori Watanabe 			    TPM_DATA_AVAIL_INT);
835*97f24f66STakanori Watanabe 
836*97f24f66STakanori Watanabe 		/* Wait for status valid bit. */
837*97f24f66STakanori Watanabe 		if ((b & TPM_STS_VALID) && (sc->sc_capabilities &
838*97f24f66STakanori Watanabe 		    TPM_INTF_STS_VALID_INT)) {
839*97f24f66STakanori Watanabe 			rv = tpm_waitfor_int(sc, b, tmo, c, TPM_STS_VALID_INT);
840*97f24f66STakanori Watanabe 			if (rv != 0)
841*97f24f66STakanori Watanabe 				return rv;
842*97f24f66STakanori Watanabe 			else
843*97f24f66STakanori Watanabe 				b = b0 & ~TPM_STS_VALID;
844*97f24f66STakanori Watanabe 		}
845*97f24f66STakanori Watanabe 
846*97f24f66STakanori Watanabe 		/*
847*97f24f66STakanori Watanabe 		 * When all flags are taken care of, return.  Otherwise
848*97f24f66STakanori Watanabe 		 * use polling for eg. TPM_STS_CMD_READY.
849*97f24f66STakanori Watanabe 		 */
850*97f24f66STakanori Watanabe 		if (b == 0)
851*97f24f66STakanori Watanabe 			return 0;
852*97f24f66STakanori Watanabe 	}
853*97f24f66STakanori Watanabe 
854*97f24f66STakanori Watanabe 	re = 3;
855*97f24f66STakanori Watanabe restart:
856*97f24f66STakanori Watanabe 	/*
857*97f24f66STakanori Watanabe 	 * If requested wait for TPM_STS_VALID before dealing with
858*97f24f66STakanori Watanabe 	 * any other flag.  Eg. when both TPM_STS_DATA_AVAIL and TPM_STS_VALID
859*97f24f66STakanori Watanabe 	 * are requested, wait for the latter first.
860*97f24f66STakanori Watanabe 	 */
861*97f24f66STakanori Watanabe 	b = b0;
862*97f24f66STakanori Watanabe 	if (b0 & TPM_STS_VALID)
863*97f24f66STakanori Watanabe 		b = TPM_STS_VALID;
864*97f24f66STakanori Watanabe 
865*97f24f66STakanori Watanabe 	to = tpm_tmotohz(tmo);
866*97f24f66STakanori Watanabe again:
867*97f24f66STakanori Watanabe 	if ((rv = tpm_waitfor_poll(sc, b, to, c)) != 0)
868*97f24f66STakanori Watanabe 		return rv;
869*97f24f66STakanori Watanabe 
870*97f24f66STakanori Watanabe 	if ((b & sc->sc_stat) == TPM_STS_VALID) {
871*97f24f66STakanori Watanabe 		/* Now wait for other flags. */
872*97f24f66STakanori Watanabe 		b = b0 & ~TPM_STS_VALID;
873*97f24f66STakanori Watanabe 		to++;
874*97f24f66STakanori Watanabe 		goto again;
875*97f24f66STakanori Watanabe 	}
876*97f24f66STakanori Watanabe 
877*97f24f66STakanori Watanabe 	if ((sc->sc_stat & b) != b) {
878*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
879*97f24f66STakanori Watanabe 		printf("tpm_waitfor: timeout: stat=%b b=%b\n",
880*97f24f66STakanori Watanabe 		    sc->sc_stat, TPM_STS_BITS, b, TPM_STS_BITS);
881*97f24f66STakanori Watanabe #endif
882*97f24f66STakanori Watanabe 		if (re-- && (b0 & TPM_STS_VALID)) {
883*97f24f66STakanori Watanabe 			bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS,
884*97f24f66STakanori Watanabe 			    TPM_STS_RESP_RETRY);
885*97f24f66STakanori Watanabe 			goto restart;
886*97f24f66STakanori Watanabe 		}
887*97f24f66STakanori Watanabe 		return EIO;
888*97f24f66STakanori Watanabe 	}
889*97f24f66STakanori Watanabe 
890*97f24f66STakanori Watanabe 	return 0;
891*97f24f66STakanori Watanabe }
892*97f24f66STakanori Watanabe 
893*97f24f66STakanori Watanabe /* Start transaction. */
894*97f24f66STakanori Watanabe int
895*97f24f66STakanori Watanabe tpm_tis12_start(struct tpm_softc *sc, int flag)
896*97f24f66STakanori Watanabe {
897*97f24f66STakanori Watanabe 	int rv;
898*97f24f66STakanori Watanabe 
899*97f24f66STakanori Watanabe 	if (flag == UIO_READ) {
900*97f24f66STakanori Watanabe 		rv = tpm_waitfor(sc, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
901*97f24f66STakanori Watanabe 		    TPM_READ_TMO, sc->sc_read);
902*97f24f66STakanori Watanabe 		return rv;
903*97f24f66STakanori Watanabe 	}
904*97f24f66STakanori Watanabe 
905*97f24f66STakanori Watanabe 	/* Own our (0th) locality. */
906*97f24f66STakanori Watanabe 	if ((rv = tpm_request_locality(sc, 0)) != 0)
907*97f24f66STakanori Watanabe 		return rv;
908*97f24f66STakanori Watanabe 
909*97f24f66STakanori Watanabe 	sc->sc_stat = tpm_status(sc);
910*97f24f66STakanori Watanabe 	if (sc->sc_stat & TPM_STS_CMD_READY) {
911*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
912*97f24f66STakanori Watanabe 		printf("tpm_tis12_start: UIO_WRITE status %b\n", sc->sc_stat,
913*97f24f66STakanori Watanabe 		   TPM_STS_BITS);
914*97f24f66STakanori Watanabe #endif
915*97f24f66STakanori Watanabe 		return 0;
916*97f24f66STakanori Watanabe 	}
917*97f24f66STakanori Watanabe 
918*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
919*97f24f66STakanori Watanabe 	printf("tpm_tis12_start: UIO_WRITE readying chip\n");
920*97f24f66STakanori Watanabe #endif
921*97f24f66STakanori Watanabe 
922*97f24f66STakanori Watanabe 	/* Abort previous and restart. */
923*97f24f66STakanori Watanabe 	bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, TPM_STS_CMD_READY);
924*97f24f66STakanori Watanabe 	if ((rv = tpm_waitfor(sc, TPM_STS_CMD_READY, TPM_READY_TMO,
925*97f24f66STakanori Watanabe 	    sc->sc_write))) {
926*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
927*97f24f66STakanori Watanabe 		printf("tpm_tis12_start: UIO_WRITE readying failed %d\n", rv);
928*97f24f66STakanori Watanabe #endif
929*97f24f66STakanori Watanabe 		return rv;
930*97f24f66STakanori Watanabe 	}
931*97f24f66STakanori Watanabe 
932*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
933*97f24f66STakanori Watanabe 	printf("tpm_tis12_start: UIO_WRITE readying done\n");
934*97f24f66STakanori Watanabe #endif
935*97f24f66STakanori Watanabe 
936*97f24f66STakanori Watanabe 	return 0;
937*97f24f66STakanori Watanabe }
938*97f24f66STakanori Watanabe 
939*97f24f66STakanori Watanabe int
940*97f24f66STakanori Watanabe tpm_tis12_read(struct tpm_softc *sc, void *buf, int len, size_t *count,
941*97f24f66STakanori Watanabe     int flags)
942*97f24f66STakanori Watanabe {
943*97f24f66STakanori Watanabe 	u_int8_t *p = buf;
944*97f24f66STakanori Watanabe 	size_t cnt;
945*97f24f66STakanori Watanabe 	int rv, n, bcnt;
946*97f24f66STakanori Watanabe 
947*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
948*97f24f66STakanori Watanabe 	printf("tpm_tis12_read: len %d\n", len);
949*97f24f66STakanori Watanabe #endif
950*97f24f66STakanori Watanabe 	cnt = 0;
951*97f24f66STakanori Watanabe 	while (len > 0) {
952*97f24f66STakanori Watanabe 		if ((rv = tpm_waitfor(sc, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
953*97f24f66STakanori Watanabe 		    TPM_READ_TMO, sc->sc_read)))
954*97f24f66STakanori Watanabe 			return rv;
955*97f24f66STakanori Watanabe 
956*97f24f66STakanori Watanabe 		bcnt = tpm_getburst(sc);
957*97f24f66STakanori Watanabe 		n = MIN(len, bcnt);
958*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
959*97f24f66STakanori Watanabe 		printf("tpm_tis12_read: fetching %d, burst is %d\n", n, bcnt);
960*97f24f66STakanori Watanabe #endif
961*97f24f66STakanori Watanabe 		for (; n--; len--) {
962*97f24f66STakanori Watanabe 			*p++ = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_DATA);
963*97f24f66STakanori Watanabe 			cnt++;
964*97f24f66STakanori Watanabe 		}
965*97f24f66STakanori Watanabe 
966*97f24f66STakanori Watanabe 		if ((flags & TPM_PARAM_SIZE) == 0 && cnt >= 6)
967*97f24f66STakanori Watanabe 			break;
968*97f24f66STakanori Watanabe 	}
969*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
970*97f24f66STakanori Watanabe 	printf("tpm_tis12_read: read %zd bytes, len %d\n", cnt, len);
971*97f24f66STakanori Watanabe #endif
972*97f24f66STakanori Watanabe 
973*97f24f66STakanori Watanabe 	if (count)
974*97f24f66STakanori Watanabe 		*count = cnt;
975*97f24f66STakanori Watanabe 
976*97f24f66STakanori Watanabe 	return 0;
977*97f24f66STakanori Watanabe }
978*97f24f66STakanori Watanabe 
979*97f24f66STakanori Watanabe int
980*97f24f66STakanori Watanabe tpm_tis12_write(struct tpm_softc *sc, void *buf, int len)
981*97f24f66STakanori Watanabe {
982*97f24f66STakanori Watanabe 	u_int8_t *p = buf;
983*97f24f66STakanori Watanabe 	size_t cnt;
984*97f24f66STakanori Watanabe 	int rv, r;
985*97f24f66STakanori Watanabe 
986*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
987*97f24f66STakanori Watanabe 	printf("tpm_tis12_write: sc %p buf %p len %d\n", sc, buf, len);
988*97f24f66STakanori Watanabe #endif
989*97f24f66STakanori Watanabe 
990*97f24f66STakanori Watanabe 	if ((rv = tpm_request_locality(sc, 0)) != 0)
991*97f24f66STakanori Watanabe 		return rv;
992*97f24f66STakanori Watanabe 
993*97f24f66STakanori Watanabe 	cnt = 0;
994*97f24f66STakanori Watanabe 	while (cnt < len - 1) {
995*97f24f66STakanori Watanabe 		for (r = tpm_getburst(sc); r > 0 && cnt < len - 1; r--) {
996*97f24f66STakanori Watanabe 			bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_DATA, *p++);
997*97f24f66STakanori Watanabe 			cnt++;
998*97f24f66STakanori Watanabe 		}
999*97f24f66STakanori Watanabe 		if ((rv = tpm_waitfor(sc, TPM_STS_VALID, TPM_READ_TMO, sc))) {
1000*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1001*97f24f66STakanori Watanabe 			printf("tpm_tis12_write: failed burst rv %d\n", rv);
1002*97f24f66STakanori Watanabe #endif
1003*97f24f66STakanori Watanabe 			return rv;
1004*97f24f66STakanori Watanabe 		}
1005*97f24f66STakanori Watanabe 		sc->sc_stat = tpm_status(sc);
1006*97f24f66STakanori Watanabe 		if (!(sc->sc_stat & TPM_STS_DATA_EXPECT)) {
1007*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1008*97f24f66STakanori Watanabe 			printf("tpm_tis12_write: failed rv %d stat=%b\n", rv,
1009*97f24f66STakanori Watanabe 			    sc->sc_stat, TPM_STS_BITS);
1010*97f24f66STakanori Watanabe #endif
1011*97f24f66STakanori Watanabe 			return EIO;
1012*97f24f66STakanori Watanabe 		}
1013*97f24f66STakanori Watanabe 	}
1014*97f24f66STakanori Watanabe 
1015*97f24f66STakanori Watanabe 	bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_DATA, *p++);
1016*97f24f66STakanori Watanabe 	cnt++;
1017*97f24f66STakanori Watanabe 
1018*97f24f66STakanori Watanabe 	if ((rv = tpm_waitfor(sc, TPM_STS_VALID, TPM_READ_TMO, sc))) {
1019*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1020*97f24f66STakanori Watanabe 		printf("tpm_tis12_write: failed last byte rv %d\n", rv);
1021*97f24f66STakanori Watanabe #endif
1022*97f24f66STakanori Watanabe 		return rv;
1023*97f24f66STakanori Watanabe 	}
1024*97f24f66STakanori Watanabe 	if ((sc->sc_stat & TPM_STS_DATA_EXPECT) != 0) {
1025*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1026*97f24f66STakanori Watanabe 		printf("tpm_tis12_write: failed rv %d stat=%b\n", rv,
1027*97f24f66STakanori Watanabe 		    sc->sc_stat, TPM_STS_BITS);
1028*97f24f66STakanori Watanabe #endif
1029*97f24f66STakanori Watanabe 		return EIO;
1030*97f24f66STakanori Watanabe 	}
1031*97f24f66STakanori Watanabe 
1032*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1033*97f24f66STakanori Watanabe 	printf("tpm_tis12_write: wrote %d byte\n", cnt);
1034*97f24f66STakanori Watanabe #endif
1035*97f24f66STakanori Watanabe 
1036*97f24f66STakanori Watanabe 	return 0;
1037*97f24f66STakanori Watanabe }
1038*97f24f66STakanori Watanabe 
1039*97f24f66STakanori Watanabe /* Finish transaction. */
1040*97f24f66STakanori Watanabe int
1041*97f24f66STakanori Watanabe tpm_tis12_end(struct tpm_softc *sc, int flag, int err)
1042*97f24f66STakanori Watanabe {
1043*97f24f66STakanori Watanabe 	int rv = 0;
1044*97f24f66STakanori Watanabe 
1045*97f24f66STakanori Watanabe 	if (flag == UIO_READ) {
1046*97f24f66STakanori Watanabe 		if ((rv = tpm_waitfor(sc, TPM_STS_VALID, TPM_READ_TMO,
1047*97f24f66STakanori Watanabe 		    sc->sc_read)))
1048*97f24f66STakanori Watanabe 			return rv;
1049*97f24f66STakanori Watanabe 
1050*97f24f66STakanori Watanabe 		/* Still more data? */
1051*97f24f66STakanori Watanabe 		sc->sc_stat = tpm_status(sc);
1052*97f24f66STakanori Watanabe 		if (!err && ((sc->sc_stat & TPM_STS_DATA_AVAIL) == TPM_STS_DATA_AVAIL)) {
1053*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1054*97f24f66STakanori Watanabe 			printf("tpm_tis12_end: read failed stat=%b\n",
1055*97f24f66STakanori Watanabe 			    sc->sc_stat, TPM_STS_BITS);
1056*97f24f66STakanori Watanabe #endif
1057*97f24f66STakanori Watanabe 			rv = EIO;
1058*97f24f66STakanori Watanabe 		}
1059*97f24f66STakanori Watanabe 
1060*97f24f66STakanori Watanabe 		bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS,
1061*97f24f66STakanori Watanabe 		    TPM_STS_CMD_READY);
1062*97f24f66STakanori Watanabe 
1063*97f24f66STakanori Watanabe 		/* Release our (0th) locality. */
1064*97f24f66STakanori Watanabe 		bus_space_write_1(sc->sc_bt, sc->sc_bh,TPM_ACCESS,
1065*97f24f66STakanori Watanabe 		    TPM_ACCESS_ACTIVE_LOCALITY);
1066*97f24f66STakanori Watanabe 	} else {
1067*97f24f66STakanori Watanabe 		/* Hungry for more? */
1068*97f24f66STakanori Watanabe 		sc->sc_stat = tpm_status(sc);
1069*97f24f66STakanori Watanabe 		if (!err && (sc->sc_stat & TPM_STS_DATA_EXPECT)) {
1070*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1071*97f24f66STakanori Watanabe 			printf("tpm_tis12_end: write failed stat=%b\n",
1072*97f24f66STakanori Watanabe 			    sc->sc_stat, TPM_STS_BITS);
1073*97f24f66STakanori Watanabe #endif
1074*97f24f66STakanori Watanabe 			rv = EIO;
1075*97f24f66STakanori Watanabe 		}
1076*97f24f66STakanori Watanabe 
1077*97f24f66STakanori Watanabe 		bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS,
1078*97f24f66STakanori Watanabe 		    err ? TPM_STS_CMD_READY : TPM_STS_GO);
1079*97f24f66STakanori Watanabe 	}
1080*97f24f66STakanori Watanabe 
1081*97f24f66STakanori Watanabe 	return rv;
1082*97f24f66STakanori Watanabe }
1083*97f24f66STakanori Watanabe 
1084*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1085*97f24f66STakanori Watanabe void
1086*97f24f66STakanori Watanabe #else
1087*97f24f66STakanori Watanabe int
1088*97f24f66STakanori Watanabe #endif
1089*97f24f66STakanori Watanabe tpm_intr(void *v)
1090*97f24f66STakanori Watanabe {
1091*97f24f66STakanori Watanabe 	struct tpm_softc *sc = v;
1092*97f24f66STakanori Watanabe 	u_int32_t r;
1093*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1094*97f24f66STakanori Watanabe 	static int cnt = 0;
1095*97f24f66STakanori Watanabe #endif
1096*97f24f66STakanori Watanabe 
1097*97f24f66STakanori Watanabe 	r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS);
1098*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1099*97f24f66STakanori Watanabe 	if (r != 0)
1100*97f24f66STakanori Watanabe 		printf("tpm_intr: int=%b (%d)\n", r, TPM_INTERRUPT_ENABLE_BITS,
1101*97f24f66STakanori Watanabe 		    cnt);
1102*97f24f66STakanori Watanabe 	else
1103*97f24f66STakanori Watanabe 		cnt++;
1104*97f24f66STakanori Watanabe #endif
1105*97f24f66STakanori Watanabe 	if (!(r & (TPM_CMD_READY_INT | TPM_LOCALITY_CHANGE_INT |
1106*97f24f66STakanori Watanabe 	    TPM_STS_VALID_INT | TPM_DATA_AVAIL_INT)))
1107*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1108*97f24f66STakanori Watanabe 		return;
1109*97f24f66STakanori Watanabe #else
1110*97f24f66STakanori Watanabe 		return 0;
1111*97f24f66STakanori Watanabe #endif
1112*97f24f66STakanori Watanabe 	if (r & TPM_STS_VALID_INT)
1113*97f24f66STakanori Watanabe 		wakeup(sc);
1114*97f24f66STakanori Watanabe 
1115*97f24f66STakanori Watanabe 	if (r & TPM_CMD_READY_INT)
1116*97f24f66STakanori Watanabe 		wakeup(sc->sc_write);
1117*97f24f66STakanori Watanabe 
1118*97f24f66STakanori Watanabe 	if (r & TPM_DATA_AVAIL_INT)
1119*97f24f66STakanori Watanabe 		wakeup(sc->sc_read);
1120*97f24f66STakanori Watanabe 
1121*97f24f66STakanori Watanabe 	if (r & TPM_LOCALITY_CHANGE_INT)
1122*97f24f66STakanori Watanabe 		wakeup(sc->sc_init);
1123*97f24f66STakanori Watanabe 
1124*97f24f66STakanori Watanabe 	bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS, r);
1125*97f24f66STakanori Watanabe 
1126*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1127*97f24f66STakanori Watanabe 	return;
1128*97f24f66STakanori Watanabe #else
1129*97f24f66STakanori Watanabe 	return 1;
1130*97f24f66STakanori Watanabe #endif
1131*97f24f66STakanori Watanabe }
1132*97f24f66STakanori Watanabe 
1133*97f24f66STakanori Watanabe /* Read single byte using legacy interface. */
1134*97f24f66STakanori Watanabe static inline u_int8_t
1135*97f24f66STakanori Watanabe tpm_legacy_in(bus_space_tag_t iot, bus_space_handle_t ioh, int reg)
1136*97f24f66STakanori Watanabe {
1137*97f24f66STakanori Watanabe 	bus_space_write_1(iot, ioh, 0, reg);
1138*97f24f66STakanori Watanabe 	return bus_space_read_1(iot, ioh, 1);
1139*97f24f66STakanori Watanabe }
1140*97f24f66STakanori Watanabe 
1141*97f24f66STakanori Watanabe /* Write single byte using legacy interface. */
1142*97f24f66STakanori Watanabe static inline void
1143*97f24f66STakanori Watanabe tpm_legacy_out(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, u_int8_t v)
1144*97f24f66STakanori Watanabe {
1145*97f24f66STakanori Watanabe 	bus_space_write_1(iot, ioh, 0, reg);
1146*97f24f66STakanori Watanabe 	bus_space_write_1(iot, ioh, 1, v);
1147*97f24f66STakanori Watanabe }
1148*97f24f66STakanori Watanabe 
1149*97f24f66STakanori Watanabe /* Probe for TPM using legacy interface. */
1150*97f24f66STakanori Watanabe int
1151*97f24f66STakanori Watanabe tpm_legacy_probe(bus_space_tag_t iot, bus_addr_t iobase)
1152*97f24f66STakanori Watanabe {
1153*97f24f66STakanori Watanabe 	bus_space_handle_t ioh;
1154*97f24f66STakanori Watanabe 	u_int8_t r, v;
1155*97f24f66STakanori Watanabe 	int i, rv = 0;
1156*97f24f66STakanori Watanabe 	char id[8];
1157*97f24f66STakanori Watanabe 
1158*97f24f66STakanori Watanabe 	if (!tpm_enabled || iobase == -1)
1159*97f24f66STakanori Watanabe 		return 0;
1160*97f24f66STakanori Watanabe 
1161*97f24f66STakanori Watanabe 	if (bus_space_map(iot, iobase, 2, 0, &ioh))
1162*97f24f66STakanori Watanabe 		return 0;
1163*97f24f66STakanori Watanabe 
1164*97f24f66STakanori Watanabe 	v = bus_space_read_1(iot, ioh, 0);
1165*97f24f66STakanori Watanabe 	if (v == 0xff) {
1166*97f24f66STakanori Watanabe 		bus_space_unmap(iot, ioh, 2);
1167*97f24f66STakanori Watanabe 		return 0;
1168*97f24f66STakanori Watanabe 	}
1169*97f24f66STakanori Watanabe 	r = bus_space_read_1(iot, ioh, 1);
1170*97f24f66STakanori Watanabe 
1171*97f24f66STakanori Watanabe 	for (i = sizeof(id); i--; )
1172*97f24f66STakanori Watanabe 		id[i] = tpm_legacy_in(iot, ioh, TPM_ID + i);
1173*97f24f66STakanori Watanabe 
1174*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1175*97f24f66STakanori Watanabe 	printf("tpm_legacy_probe %.4s %d.%d.%d.%d\n",
1176*97f24f66STakanori Watanabe 	    &id[4], id[0], id[1], id[2], id[3]);
1177*97f24f66STakanori Watanabe #endif
1178*97f24f66STakanori Watanabe 	/*
1179*97f24f66STakanori Watanabe 	 * The only chips using the legacy interface we are aware of are
1180*97f24f66STakanori Watanabe 	 * by Atmel.  For other chips more signature would have to be added.
1181*97f24f66STakanori Watanabe 	 */
1182*97f24f66STakanori Watanabe 	if (!bcmp(&id[4], "ATML", 4))
1183*97f24f66STakanori Watanabe 		rv = 1;
1184*97f24f66STakanori Watanabe 
1185*97f24f66STakanori Watanabe 	if (!rv) {
1186*97f24f66STakanori Watanabe 		bus_space_write_1(iot, ioh, r, 1);
1187*97f24f66STakanori Watanabe 		bus_space_write_1(iot, ioh, v, 0);
1188*97f24f66STakanori Watanabe 	}
1189*97f24f66STakanori Watanabe 	bus_space_unmap(iot, ioh, 2);
1190*97f24f66STakanori Watanabe 
1191*97f24f66STakanori Watanabe 	return rv;
1192*97f24f66STakanori Watanabe }
1193*97f24f66STakanori Watanabe 
1194*97f24f66STakanori Watanabe /* Setup TPM using legacy interface. */
1195*97f24f66STakanori Watanabe int
1196*97f24f66STakanori Watanabe tpm_legacy_init(struct tpm_softc *sc, int irq, const char *name)
1197*97f24f66STakanori Watanabe {
1198*97f24f66STakanori Watanabe 	char id[8];
1199*97f24f66STakanori Watanabe 	u_int8_t ioh, iol;
1200*97f24f66STakanori Watanabe 	int i;
1201*97f24f66STakanori Watanabe 
1202*97f24f66STakanori Watanabe 	if ((i = bus_space_map(sc->sc_batm, tpm_enabled, 2, 0, &sc->sc_bahm))) {
1203*97f24f66STakanori Watanabe 		printf(": cannot map tpm registers (%d)\n", i);
1204*97f24f66STakanori Watanabe 		tpm_enabled = 0;
1205*97f24f66STakanori Watanabe 		return 1;
1206*97f24f66STakanori Watanabe 	}
1207*97f24f66STakanori Watanabe 
1208*97f24f66STakanori Watanabe 	for (i = sizeof(id); i--; )
1209*97f24f66STakanori Watanabe 		id[i] = tpm_legacy_in(sc->sc_bt, sc->sc_bh, TPM_ID + i);
1210*97f24f66STakanori Watanabe 
1211*97f24f66STakanori Watanabe 	printf(": %.4s %d.%d @0x%x\n", &id[4], id[0], id[1], tpm_enabled);
1212*97f24f66STakanori Watanabe 	iol = tpm_enabled & 0xff;
1213*97f24f66STakanori Watanabe 	ioh = tpm_enabled >> 16;
1214*97f24f66STakanori Watanabe 	tpm_enabled = 0;
1215*97f24f66STakanori Watanabe 
1216*97f24f66STakanori Watanabe 	return 0;
1217*97f24f66STakanori Watanabe }
1218*97f24f66STakanori Watanabe 
1219*97f24f66STakanori Watanabe /* Start transaction. */
1220*97f24f66STakanori Watanabe int
1221*97f24f66STakanori Watanabe tpm_legacy_start(struct tpm_softc *sc, int flag)
1222*97f24f66STakanori Watanabe {
1223*97f24f66STakanori Watanabe 	struct timeval tv;
1224*97f24f66STakanori Watanabe 	u_int8_t bits, r;
1225*97f24f66STakanori Watanabe 	int to, rv;
1226*97f24f66STakanori Watanabe 
1227*97f24f66STakanori Watanabe 	bits = flag == UIO_READ ? TPM_LEGACY_DA : 0;
1228*97f24f66STakanori Watanabe 	tv.tv_sec = TPM_LEGACY_TMO;
1229*97f24f66STakanori Watanabe 	tv.tv_usec = 0;
1230*97f24f66STakanori Watanabe 	to = tvtohz(&tv) / TPM_LEGACY_SLEEP;
1231*97f24f66STakanori Watanabe 	while (((r = bus_space_read_1(sc->sc_batm, sc->sc_bahm, 1)) &
1232*97f24f66STakanori Watanabe 	    (TPM_LEGACY_BUSY|bits)) != bits && to--) {
1233*97f24f66STakanori Watanabe 		rv = tsleep(sc, PRIBIO | PCATCH, "legacy_tpm_start",
1234*97f24f66STakanori Watanabe 		    TPM_LEGACY_SLEEP);
1235*97f24f66STakanori Watanabe 		if (rv && rv != EWOULDBLOCK)
1236*97f24f66STakanori Watanabe 			return rv;
1237*97f24f66STakanori Watanabe 	}
1238*97f24f66STakanori Watanabe 
1239*97f24f66STakanori Watanabe #if defined(TPM_DEBUG) && !defined(__FreeBSD__)
1240*97f24f66STakanori Watanabe 	printf("%s: bits %b\n", sc->sc_dev.dv_xname, r, TPM_LEGACY_BITS);
1241*97f24f66STakanori Watanabe #endif
1242*97f24f66STakanori Watanabe 	if ((r & (TPM_LEGACY_BUSY|bits)) != bits)
1243*97f24f66STakanori Watanabe 		return EIO;
1244*97f24f66STakanori Watanabe 
1245*97f24f66STakanori Watanabe 	return 0;
1246*97f24f66STakanori Watanabe }
1247*97f24f66STakanori Watanabe 
1248*97f24f66STakanori Watanabe int
1249*97f24f66STakanori Watanabe tpm_legacy_read(struct tpm_softc *sc, void *buf, int len, size_t *count,
1250*97f24f66STakanori Watanabe     int flags)
1251*97f24f66STakanori Watanabe {
1252*97f24f66STakanori Watanabe 	u_int8_t *p;
1253*97f24f66STakanori Watanabe 	size_t cnt;
1254*97f24f66STakanori Watanabe 	int to, rv;
1255*97f24f66STakanori Watanabe 
1256*97f24f66STakanori Watanabe 	cnt = rv = 0;
1257*97f24f66STakanori Watanabe 	for (p = buf; !rv && len > 0; len--) {
1258*97f24f66STakanori Watanabe 		for (to = 1000;
1259*97f24f66STakanori Watanabe 		    !(bus_space_read_1(sc->sc_batm, sc->sc_bahm, 1) &
1260*97f24f66STakanori Watanabe 		    TPM_LEGACY_DA); DELAY(1))
1261*97f24f66STakanori Watanabe 			if (!to--)
1262*97f24f66STakanori Watanabe 				return EIO;
1263*97f24f66STakanori Watanabe 
1264*97f24f66STakanori Watanabe 		DELAY(TPM_LEGACY_DELAY);
1265*97f24f66STakanori Watanabe 		*p++ = bus_space_read_1(sc->sc_batm, sc->sc_bahm, 0);
1266*97f24f66STakanori Watanabe 		cnt++;
1267*97f24f66STakanori Watanabe 	}
1268*97f24f66STakanori Watanabe 
1269*97f24f66STakanori Watanabe 	*count = cnt;
1270*97f24f66STakanori Watanabe 	return 0;
1271*97f24f66STakanori Watanabe }
1272*97f24f66STakanori Watanabe 
1273*97f24f66STakanori Watanabe int
1274*97f24f66STakanori Watanabe tpm_legacy_write(struct tpm_softc *sc, void *buf, int len)
1275*97f24f66STakanori Watanabe {
1276*97f24f66STakanori Watanabe 	u_int8_t *p;
1277*97f24f66STakanori Watanabe 	int n;
1278*97f24f66STakanori Watanabe 
1279*97f24f66STakanori Watanabe 	for (p = buf, n = len; n--; DELAY(TPM_LEGACY_DELAY)) {
1280*97f24f66STakanori Watanabe 		if (!n && len != TPM_BUFSIZ) {
1281*97f24f66STakanori Watanabe 			bus_space_write_1(sc->sc_batm, sc->sc_bahm, 1,
1282*97f24f66STakanori Watanabe 			    TPM_LEGACY_LAST);
1283*97f24f66STakanori Watanabe 			DELAY(TPM_LEGACY_DELAY);
1284*97f24f66STakanori Watanabe 		}
1285*97f24f66STakanori Watanabe 		bus_space_write_1(sc->sc_batm, sc->sc_bahm, 0, *p++);
1286*97f24f66STakanori Watanabe 	}
1287*97f24f66STakanori Watanabe 
1288*97f24f66STakanori Watanabe 	return 0;
1289*97f24f66STakanori Watanabe }
1290*97f24f66STakanori Watanabe 
1291*97f24f66STakanori Watanabe /* Finish transaction. */
1292*97f24f66STakanori Watanabe int
1293*97f24f66STakanori Watanabe tpm_legacy_end(struct tpm_softc *sc, int flag, int rv)
1294*97f24f66STakanori Watanabe {
1295*97f24f66STakanori Watanabe 	struct timeval tv;
1296*97f24f66STakanori Watanabe 	u_int8_t r;
1297*97f24f66STakanori Watanabe 	int to;
1298*97f24f66STakanori Watanabe 
1299*97f24f66STakanori Watanabe 	if (rv || flag == UIO_READ)
1300*97f24f66STakanori Watanabe 		bus_space_write_1(sc->sc_batm, sc->sc_bahm, 1, TPM_LEGACY_ABRT);
1301*97f24f66STakanori Watanabe 	else {
1302*97f24f66STakanori Watanabe 		tv.tv_sec = TPM_LEGACY_TMO;
1303*97f24f66STakanori Watanabe 		tv.tv_usec = 0;
1304*97f24f66STakanori Watanabe 		to = tvtohz(&tv) / TPM_LEGACY_SLEEP;
1305*97f24f66STakanori Watanabe 		while(((r = bus_space_read_1(sc->sc_batm, sc->sc_bahm, 1)) &
1306*97f24f66STakanori Watanabe 		    TPM_LEGACY_BUSY) && to--) {
1307*97f24f66STakanori Watanabe 			rv = tsleep(sc, PRIBIO | PCATCH, "legacy_tpm_end",
1308*97f24f66STakanori Watanabe 			    TPM_LEGACY_SLEEP);
1309*97f24f66STakanori Watanabe 			if (rv && rv != EWOULDBLOCK)
1310*97f24f66STakanori Watanabe 				return rv;
1311*97f24f66STakanori Watanabe 		}
1312*97f24f66STakanori Watanabe 
1313*97f24f66STakanori Watanabe #if defined(TPM_DEBUG) && !defined(__FreeBSD__)
1314*97f24f66STakanori Watanabe 		printf("%s: bits %b\n", sc->sc_dev.dv_xname, r, TPM_LEGACY_BITS);
1315*97f24f66STakanori Watanabe #endif
1316*97f24f66STakanori Watanabe 		if (r & TPM_LEGACY_BUSY)
1317*97f24f66STakanori Watanabe 			return EIO;
1318*97f24f66STakanori Watanabe 
1319*97f24f66STakanori Watanabe 		if (r & TPM_LEGACY_RE)
1320*97f24f66STakanori Watanabe 			return EIO;	/* XXX Retry the loop? */
1321*97f24f66STakanori Watanabe 	}
1322*97f24f66STakanori Watanabe 
1323*97f24f66STakanori Watanabe 	return rv;
1324*97f24f66STakanori Watanabe }
1325*97f24f66STakanori Watanabe 
1326*97f24f66STakanori Watanabe int
1327*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1328*97f24f66STakanori Watanabe tpmopen(struct cdev *dev, int flag, int mode, struct thread *td)
1329*97f24f66STakanori Watanabe #else
1330*97f24f66STakanori Watanabe tpmopen(dev_t dev, int flag, int mode, struct proc *p)
1331*97f24f66STakanori Watanabe #endif
1332*97f24f66STakanori Watanabe {
1333*97f24f66STakanori Watanabe 	struct tpm_softc *sc = TPMSOFTC(dev);
1334*97f24f66STakanori Watanabe 
1335*97f24f66STakanori Watanabe 	if (!sc)
1336*97f24f66STakanori Watanabe 		return ENXIO;
1337*97f24f66STakanori Watanabe 
1338*97f24f66STakanori Watanabe 	if (sc->sc_flags & TPM_OPEN)
1339*97f24f66STakanori Watanabe 		return EBUSY;
1340*97f24f66STakanori Watanabe 
1341*97f24f66STakanori Watanabe 	sc->sc_flags |= TPM_OPEN;
1342*97f24f66STakanori Watanabe 
1343*97f24f66STakanori Watanabe 	return 0;
1344*97f24f66STakanori Watanabe }
1345*97f24f66STakanori Watanabe 
1346*97f24f66STakanori Watanabe int
1347*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1348*97f24f66STakanori Watanabe tpmclose(struct cdev *dev, int flag, int mode, struct thread *td)
1349*97f24f66STakanori Watanabe #else
1350*97f24f66STakanori Watanabe tpmclose(dev_t dev, int flag, int mode, struct proc *p)
1351*97f24f66STakanori Watanabe #endif
1352*97f24f66STakanori Watanabe {
1353*97f24f66STakanori Watanabe 	struct tpm_softc *sc = TPMSOFTC(dev);
1354*97f24f66STakanori Watanabe 
1355*97f24f66STakanori Watanabe 	if (!sc)
1356*97f24f66STakanori Watanabe 		return ENXIO;
1357*97f24f66STakanori Watanabe 
1358*97f24f66STakanori Watanabe 	if (!(sc->sc_flags & TPM_OPEN))
1359*97f24f66STakanori Watanabe 		return EINVAL;
1360*97f24f66STakanori Watanabe 
1361*97f24f66STakanori Watanabe 	sc->sc_flags &= ~TPM_OPEN;
1362*97f24f66STakanori Watanabe 
1363*97f24f66STakanori Watanabe 	return 0;
1364*97f24f66STakanori Watanabe }
1365*97f24f66STakanori Watanabe 
1366*97f24f66STakanori Watanabe int
1367*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1368*97f24f66STakanori Watanabe tpmread(struct cdev *dev, struct uio *uio, int flags)
1369*97f24f66STakanori Watanabe #else
1370*97f24f66STakanori Watanabe tpmread(dev_t dev, struct uio *uio, int flags)
1371*97f24f66STakanori Watanabe #endif
1372*97f24f66STakanori Watanabe {
1373*97f24f66STakanori Watanabe 	struct tpm_softc *sc = TPMSOFTC(dev);
1374*97f24f66STakanori Watanabe 	u_int8_t buf[TPM_BUFSIZ], *p;
1375*97f24f66STakanori Watanabe 	size_t cnt;
1376*97f24f66STakanori Watanabe 	int n, len, rv, s;
1377*97f24f66STakanori Watanabe 
1378*97f24f66STakanori Watanabe 	if (!sc)
1379*97f24f66STakanori Watanabe 		return ENXIO;
1380*97f24f66STakanori Watanabe 
1381*97f24f66STakanori Watanabe 	s = spltty();
1382*97f24f66STakanori Watanabe 	if ((rv = (sc->sc_start)(sc, UIO_READ))) {
1383*97f24f66STakanori Watanabe 		splx(s);
1384*97f24f66STakanori Watanabe 		return rv;
1385*97f24f66STakanori Watanabe 	}
1386*97f24f66STakanori Watanabe 
1387*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1388*97f24f66STakanori Watanabe 	printf("tpmread: getting header\n");
1389*97f24f66STakanori Watanabe #endif
1390*97f24f66STakanori Watanabe 	if ((rv = (sc->sc_read)(sc, buf, TPM_HDRSIZE, &cnt, 0))) {
1391*97f24f66STakanori Watanabe 		(sc->sc_end)(sc, UIO_READ, rv);
1392*97f24f66STakanori Watanabe 		splx(s);
1393*97f24f66STakanori Watanabe 		return rv;
1394*97f24f66STakanori Watanabe 	}
1395*97f24f66STakanori Watanabe 
1396*97f24f66STakanori Watanabe 	len = (buf[2] << 24) | (buf[3] << 16) | (buf[4] << 8) | buf[5];
1397*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1398*97f24f66STakanori Watanabe 	printf("tpmread: len %d, io count %d\n", len, uio->uio_resid);
1399*97f24f66STakanori Watanabe #endif
1400*97f24f66STakanori Watanabe 	if (len > uio->uio_resid) {
1401*97f24f66STakanori Watanabe 		rv = EIO;
1402*97f24f66STakanori Watanabe 		(sc->sc_end)(sc, UIO_READ, rv);
1403*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1404*97f24f66STakanori Watanabe 		printf("tpmread: bad residual io count 0x%x\n", uio->uio_resid);
1405*97f24f66STakanori Watanabe #endif
1406*97f24f66STakanori Watanabe 		splx(s);
1407*97f24f66STakanori Watanabe 		return rv;
1408*97f24f66STakanori Watanabe 	}
1409*97f24f66STakanori Watanabe 
1410*97f24f66STakanori Watanabe 	/* Copy out header. */
1411*97f24f66STakanori Watanabe 	if ((rv = uiomove((caddr_t)buf, cnt, uio))) {
1412*97f24f66STakanori Watanabe 		(sc->sc_end)(sc, UIO_READ, rv);
1413*97f24f66STakanori Watanabe 		splx(s);
1414*97f24f66STakanori Watanabe 		return rv;
1415*97f24f66STakanori Watanabe 	}
1416*97f24f66STakanori Watanabe 
1417*97f24f66STakanori Watanabe 	/* Get remaining part of the answer (if anything is left). */
1418*97f24f66STakanori Watanabe 	for (len -= cnt, p = buf, n = sizeof(buf); len > 0; p = buf, len -= n,
1419*97f24f66STakanori Watanabe 	    n = sizeof(buf)) {
1420*97f24f66STakanori Watanabe 		n = MIN(n, len);
1421*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1422*97f24f66STakanori Watanabe 		printf("tpmread: n %d len %d\n", n, len);
1423*97f24f66STakanori Watanabe #endif
1424*97f24f66STakanori Watanabe 		if ((rv = (sc->sc_read)(sc, p, n, NULL, TPM_PARAM_SIZE))) {
1425*97f24f66STakanori Watanabe 			(sc->sc_end)(sc, UIO_READ, rv);
1426*97f24f66STakanori Watanabe 			splx(s);
1427*97f24f66STakanori Watanabe 			return rv;
1428*97f24f66STakanori Watanabe 		}
1429*97f24f66STakanori Watanabe 		p += n;
1430*97f24f66STakanori Watanabe 		if ((rv = uiomove((caddr_t)buf, p - buf, uio))) {
1431*97f24f66STakanori Watanabe 			(sc->sc_end)(sc, UIO_READ, rv);
1432*97f24f66STakanori Watanabe 			splx(s);
1433*97f24f66STakanori Watanabe 			return rv;
1434*97f24f66STakanori Watanabe 		}
1435*97f24f66STakanori Watanabe 	}
1436*97f24f66STakanori Watanabe 
1437*97f24f66STakanori Watanabe 	rv = (sc->sc_end)(sc, UIO_READ, rv);
1438*97f24f66STakanori Watanabe 	splx(s);
1439*97f24f66STakanori Watanabe 	return rv;
1440*97f24f66STakanori Watanabe }
1441*97f24f66STakanori Watanabe 
1442*97f24f66STakanori Watanabe int
1443*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1444*97f24f66STakanori Watanabe tpmwrite(struct cdev *dev, struct uio *uio, int flags)
1445*97f24f66STakanori Watanabe #else
1446*97f24f66STakanori Watanabe tpmwrite(dev_t dev, struct uio *uio, int flags)
1447*97f24f66STakanori Watanabe #endif
1448*97f24f66STakanori Watanabe {
1449*97f24f66STakanori Watanabe 	struct tpm_softc *sc = TPMSOFTC(dev);
1450*97f24f66STakanori Watanabe 	u_int8_t buf[TPM_BUFSIZ];
1451*97f24f66STakanori Watanabe 	int n, rv, s;
1452*97f24f66STakanori Watanabe 
1453*97f24f66STakanori Watanabe 	if (!sc)
1454*97f24f66STakanori Watanabe 		return ENXIO;
1455*97f24f66STakanori Watanabe 
1456*97f24f66STakanori Watanabe 	s = spltty();
1457*97f24f66STakanori Watanabe 
1458*97f24f66STakanori Watanabe #ifdef TPM_DEBUG
1459*97f24f66STakanori Watanabe 	printf("tpmwrite: io count %d\n", uio->uio_resid);
1460*97f24f66STakanori Watanabe #endif
1461*97f24f66STakanori Watanabe 
1462*97f24f66STakanori Watanabe 	n = MIN(sizeof(buf), uio->uio_resid);
1463*97f24f66STakanori Watanabe 	if ((rv = uiomove((caddr_t)buf, n, uio))) {
1464*97f24f66STakanori Watanabe 		splx(s);
1465*97f24f66STakanori Watanabe 		return rv;
1466*97f24f66STakanori Watanabe 	}
1467*97f24f66STakanori Watanabe 
1468*97f24f66STakanori Watanabe 	if ((rv = (sc->sc_start)(sc, UIO_WRITE))) {
1469*97f24f66STakanori Watanabe 		splx(s);
1470*97f24f66STakanori Watanabe 		return rv;
1471*97f24f66STakanori Watanabe 	}
1472*97f24f66STakanori Watanabe 
1473*97f24f66STakanori Watanabe 	if ((rv = (sc->sc_write(sc, buf, n)))) {
1474*97f24f66STakanori Watanabe 		splx(s);
1475*97f24f66STakanori Watanabe 		return rv;
1476*97f24f66STakanori Watanabe 	}
1477*97f24f66STakanori Watanabe 
1478*97f24f66STakanori Watanabe 	rv = (sc->sc_end)(sc, UIO_WRITE, rv);
1479*97f24f66STakanori Watanabe 	splx(s);
1480*97f24f66STakanori Watanabe 	return rv;
1481*97f24f66STakanori Watanabe }
1482*97f24f66STakanori Watanabe 
1483*97f24f66STakanori Watanabe int
1484*97f24f66STakanori Watanabe #ifdef __FreeBSD__
1485*97f24f66STakanori Watanabe tpmioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags,
1486*97f24f66STakanori Watanabe     struct thread *td)
1487*97f24f66STakanori Watanabe #else
1488*97f24f66STakanori Watanabe tpmioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p)
1489*97f24f66STakanori Watanabe #endif
1490*97f24f66STakanori Watanabe {
1491*97f24f66STakanori Watanabe 	return ENOTTY;
1492*97f24f66STakanori Watanabe }
1493