1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Andriy Gapon 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/mutex.h> 38 #include <sys/malloc.h> 39 #include <sys/module.h> 40 #include <sys/proc.h> 41 #include <sys/rman.h> 42 #include <sys/sbuf.h> 43 #include <sys/time.h> 44 45 #include <machine/bus.h> 46 #include <machine/resource.h> 47 #include <machine/stdarg.h> 48 49 #include <isa/isavar.h> 50 51 #include <dev/superio/superio.h> 52 #include <dev/superio/superio_io.h> 53 54 #include "isa_if.h" 55 56 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t); 57 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t); 58 59 struct sio_conf_methods { 60 sio_conf_enter_f enter; 61 sio_conf_exit_f exit; 62 superio_vendor_t vendor; 63 }; 64 65 struct sio_device { 66 uint8_t ldn; 67 superio_dev_type_t type; 68 }; 69 70 struct superio_devinfo { 71 STAILQ_ENTRY(superio_devinfo) link; 72 struct resource_list resources; 73 device_t dev; 74 uint8_t ldn; 75 superio_dev_type_t type; 76 uint16_t iobase; 77 uint16_t iobase2; 78 uint8_t irq; 79 uint8_t dma; 80 }; 81 82 struct siosc { 83 struct mtx conf_lock; 84 STAILQ_HEAD(, superio_devinfo) devlist; 85 struct resource* io_res; 86 struct cdev *chardev; 87 int io_rid; 88 uint16_t io_port; 89 const struct sio_conf_methods *methods; 90 const struct sio_device *known_devices; 91 superio_vendor_t vendor; 92 uint16_t devid; 93 uint8_t revid; 94 int extid; 95 uint8_t current_ldn; 96 uint8_t ldn_reg; 97 uint8_t enable_reg; 98 }; 99 100 static d_ioctl_t superio_ioctl; 101 102 static struct cdevsw superio_cdevsw = { 103 .d_version = D_VERSION, 104 .d_ioctl = superio_ioctl, 105 .d_name = "superio", 106 }; 107 108 #define NUMPORTS 2 109 110 static uint8_t 111 sio_read(struct resource* res, uint8_t reg) 112 { 113 bus_write_1(res, 0, reg); 114 return (bus_read_1(res, 1)); 115 } 116 117 /* Read a word from two one-byte registers, big endian. */ 118 static uint16_t 119 sio_readw(struct resource* res, uint8_t reg) 120 { 121 uint16_t v; 122 123 v = sio_read(res, reg); 124 v <<= 8; 125 v |= sio_read(res, reg + 1); 126 return (v); 127 } 128 129 static void 130 sio_write(struct resource* res, uint8_t reg, uint8_t val) 131 { 132 bus_write_1(res, 0, reg); 133 bus_write_1(res, 1, val); 134 } 135 136 static void 137 sio_ldn_select(struct siosc *sc, uint8_t ldn) 138 { 139 mtx_assert(&sc->conf_lock, MA_OWNED); 140 if (ldn == sc->current_ldn) 141 return; 142 sio_write(sc->io_res, sc->ldn_reg, ldn); 143 sc->current_ldn = ldn; 144 } 145 146 static uint8_t 147 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg) 148 { 149 mtx_assert(&sc->conf_lock, MA_OWNED); 150 if (reg >= sc->enable_reg) { 151 sio_ldn_select(sc, ldn); 152 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 153 } 154 return (sio_read(sc->io_res, reg)); 155 } 156 157 static uint16_t 158 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg) 159 { 160 mtx_assert(&sc->conf_lock, MA_OWNED); 161 if (reg >= sc->enable_reg) { 162 sio_ldn_select(sc, ldn); 163 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 164 } 165 return (sio_readw(sc->io_res, reg)); 166 } 167 168 static void 169 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val) 170 { 171 mtx_assert(&sc->conf_lock, MA_OWNED); 172 if (reg <= sc->ldn_reg) { 173 printf("ignored attempt to write special register 0x%x\n", reg); 174 return; 175 } 176 sio_ldn_select(sc, ldn); 177 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 178 sio_write(sc->io_res, reg, val); 179 } 180 181 static void 182 sio_conf_enter(struct siosc *sc) 183 { 184 mtx_lock(&sc->conf_lock); 185 sc->methods->enter(sc->io_res, sc->io_port); 186 } 187 188 static void 189 sio_conf_exit(struct siosc *sc) 190 { 191 sc->methods->exit(sc->io_res, sc->io_port); 192 sc->current_ldn = 0xff; 193 mtx_unlock(&sc->conf_lock); 194 } 195 196 static void 197 ite_conf_enter(struct resource* res, uint16_t port) 198 { 199 bus_write_1(res, 0, 0x87); 200 bus_write_1(res, 0, 0x01); 201 bus_write_1(res, 0, 0x55); 202 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); 203 } 204 205 static void 206 ite_conf_exit(struct resource* res, uint16_t port) 207 { 208 sio_write(res, 0x02, 0x02); 209 } 210 211 static const struct sio_conf_methods ite_conf_methods = { 212 .enter = ite_conf_enter, 213 .exit = ite_conf_exit, 214 .vendor = SUPERIO_VENDOR_ITE 215 }; 216 217 static void 218 nvt_conf_enter(struct resource* res, uint16_t port) 219 { 220 bus_write_1(res, 0, 0x87); 221 bus_write_1(res, 0, 0x87); 222 } 223 224 static void 225 nvt_conf_exit(struct resource* res, uint16_t port) 226 { 227 bus_write_1(res, 0, 0xaa); 228 } 229 230 static const struct sio_conf_methods nvt_conf_methods = { 231 .enter = nvt_conf_enter, 232 .exit = nvt_conf_exit, 233 .vendor = SUPERIO_VENDOR_NUVOTON 234 }; 235 236 static void 237 fintek_conf_enter(struct resource* res, uint16_t port) 238 { 239 bus_write_1(res, 0, 0x87); 240 bus_write_1(res, 0, 0x87); 241 } 242 243 static void 244 fintek_conf_exit(struct resource* res, uint16_t port) 245 { 246 bus_write_1(res, 0, 0xaa); 247 } 248 249 static const struct sio_conf_methods fintek_conf_methods = { 250 .enter = fintek_conf_enter, 251 .exit = fintek_conf_exit, 252 .vendor = SUPERIO_VENDOR_FINTEK 253 }; 254 255 static const struct sio_conf_methods * const methods_table[] = { 256 &ite_conf_methods, 257 &nvt_conf_methods, 258 &fintek_conf_methods, 259 NULL 260 }; 261 262 static const uint16_t ports_table[] = { 263 0x2e, 0x4e, 0 264 }; 265 266 const struct sio_device ite_devices[] = { 267 { .ldn = 4, .type = SUPERIO_DEV_HWM }, 268 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 269 { .type = SUPERIO_DEV_NONE }, 270 }; 271 272 const struct sio_device w83627_devices[] = { 273 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 274 { .ldn = 9, .type = SUPERIO_DEV_GPIO }, 275 { .type = SUPERIO_DEV_NONE }, 276 }; 277 278 const struct sio_device nvt_devices[] = { 279 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 280 { .type = SUPERIO_DEV_NONE }, 281 }; 282 283 const struct sio_device nct5104_devices[] = { 284 { .ldn = 7, .type = SUPERIO_DEV_GPIO }, 285 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 286 { .ldn = 15, .type = SUPERIO_DEV_GPIO }, 287 { .type = SUPERIO_DEV_NONE }, 288 }; 289 290 const struct sio_device nct5585_devices[] = { 291 { .ldn = 9, .type = SUPERIO_DEV_GPIO }, 292 { .type = SUPERIO_DEV_NONE }, 293 }; 294 295 const struct sio_device nct611x_devices[] = { 296 { .ldn = 0x7, .type = SUPERIO_DEV_GPIO }, 297 { .ldn = 0x8, .type = SUPERIO_DEV_WDT }, 298 { .type = SUPERIO_DEV_NONE }, 299 }; 300 301 const struct sio_device nct67xx_devices[] = { 302 { .ldn = 0x8, .type = SUPERIO_DEV_WDT }, 303 { .ldn = 0x9, .type = SUPERIO_DEV_GPIO }, 304 { .ldn = 0xb, .type = SUPERIO_DEV_HWM }, 305 { .type = SUPERIO_DEV_NONE }, 306 }; 307 308 const struct sio_device fintek_devices[] = { 309 { .ldn = 6, .type = SUPERIO_DEV_GPIO }, 310 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 311 { .type = SUPERIO_DEV_NONE }, 312 }; 313 314 static const struct { 315 superio_vendor_t vendor; 316 uint16_t devid; 317 uint16_t mask; 318 int extid; /* Extra ID: used to handle conflicting devid. */ 319 const char *descr; 320 const struct sio_device *devices; 321 } superio_table[] = { 322 { 323 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8613, 324 .devices = ite_devices, 325 }, 326 { 327 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712, 328 .devices = ite_devices, 329 }, 330 { 331 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716, 332 .devices = ite_devices, 333 }, 334 { 335 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718, 336 .devices = ite_devices, 337 }, 338 { 339 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720, 340 .devices = ite_devices, 341 }, 342 { 343 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721, 344 .devices = ite_devices, 345 }, 346 { 347 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726, 348 .devices = ite_devices, 349 }, 350 { 351 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728, 352 .devices = ite_devices, 353 }, 354 { 355 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771, 356 .devices = ite_devices, 357 }, 358 { 359 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00, 360 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)", 361 .devices = nct5104_devices, 362 }, 363 { 364 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff, 365 .descr = "Winbond 83627HF/F/HG/G", 366 .devices = nvt_devices, 367 }, 368 { 369 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff, 370 .descr = "Winbond 83627S", 371 .devices = nvt_devices, 372 }, 373 { 374 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff, 375 .descr = "Winbond 83697HF", 376 .devices = nvt_devices, 377 }, 378 { 379 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff, 380 .descr = "Winbond 83697UG", 381 .devices = nvt_devices, 382 }, 383 { 384 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff, 385 .descr = "Winbond 83637HF", 386 .devices = nvt_devices, 387 }, 388 { 389 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff, 390 .descr = "Winbond 83627THF", 391 .devices = nvt_devices, 392 }, 393 { 394 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff, 395 .descr = "Winbond 83687THF", 396 .devices = nvt_devices, 397 }, 398 { 399 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff, 400 .descr = "Winbond 83627EHF", 401 .devices = nvt_devices, 402 }, 403 { 404 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff, 405 .descr = "Winbond 83627DHG", 406 .devices = w83627_devices, 407 }, 408 { 409 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff, 410 .descr = "Winbond 83627UHG", 411 .devices = nvt_devices, 412 }, 413 { 414 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff, 415 .descr = "Winbond 83667HG", 416 .devices = nvt_devices, 417 }, 418 { 419 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff, 420 .descr = "Winbond 83627DHG-P", 421 .devices = nvt_devices, 422 }, 423 { 424 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff, 425 .descr = "Winbond 83667HG-B", 426 .devices = nvt_devices, 427 }, 428 { 429 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff, 430 .descr = "Nuvoton NCT6775", 431 .devices = nvt_devices, 432 }, 433 { 434 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff, 435 .descr = "Nuvoton NCT6776", 436 .devices = nvt_devices, 437 }, 438 { 439 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff, 440 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)", 441 .devices = nct5104_devices, 442 }, 443 { 444 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff, 445 .descr = "Nuvoton NCT6779D", 446 .devices = nct67xx_devices, 447 }, 448 { 449 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 1, 450 .descr = "Nuvoton NCT6796D-E", 451 .devices = nct67xx_devices, 452 }, 453 { 454 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 2, 455 .descr = "Nuvoton NCT5585D", 456 .devices = nct5585_devices, 457 }, 458 { 459 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff, 460 .descr = "Nuvoton NCT6791", 461 .devices = nvt_devices, 462 }, 463 { 464 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff, 465 .descr = "Nuvoton NCT6792", 466 .devices = nvt_devices, 467 }, 468 { 469 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff, 470 .descr = "Nuvoton NCT6793", 471 .devices = nvt_devices, 472 }, 473 { 474 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd200, .mask = 0xff, 475 .descr = "Nuvoton NCT6112D/NCT6114D/NCT6116D", 476 .devices = nct611x_devices, 477 }, 478 { 479 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff, 480 .descr = "Nuvoton NCT6795", 481 .devices = nvt_devices, 482 }, 483 { 484 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x1210, .mask = 0xff, 485 .descr = "Fintek F81803", 486 .devices = fintek_devices, 487 }, 488 { 489 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x0704, 490 .descr = "Fintek F81865", 491 .devices = fintek_devices, 492 }, 493 { 0, 0 } 494 }; 495 496 static const char * 497 devtype_to_str(superio_dev_type_t type) 498 { 499 switch (type) { 500 case SUPERIO_DEV_NONE: 501 return ("none"); 502 case SUPERIO_DEV_HWM: 503 return ("HWM"); 504 case SUPERIO_DEV_WDT: 505 return ("WDT"); 506 case SUPERIO_DEV_GPIO: 507 return ("GPIO"); 508 case SUPERIO_DEV_MAX: 509 return ("invalid"); 510 } 511 return ("invalid"); 512 } 513 514 static int 515 superio_detect(device_t dev, bool claim, struct siosc *sc) 516 { 517 struct resource *res; 518 rman_res_t port; 519 rman_res_t count; 520 uint16_t devid; 521 uint8_t revid; 522 int error; 523 int rid; 524 int i, m; 525 int prefer; 526 527 error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count); 528 if (error != 0) 529 return (error); 530 if (port > UINT16_MAX || count < NUMPORTS) { 531 device_printf(dev, "unexpected I/O range size\n"); 532 return (ENXIO); 533 } 534 535 /* 536 * Make a temporary resource reservation for hardware probing. 537 * If we can't get the resources we need then 538 * we need to abort. Possibly this indicates 539 * the resources were used by another device 540 * in which case the probe would have failed anyhow. 541 */ 542 rid = 0; 543 res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); 544 if (res == NULL) { 545 if (claim) 546 device_printf(dev, "failed to allocate I/O resource\n"); 547 return (ENXIO); 548 } 549 550 prefer = 0; 551 resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer", &prefer); 552 if (bootverbose && prefer > 0) 553 device_printf(dev, "prefer extid %d\n", prefer); 554 555 for (m = 0; methods_table[m] != NULL; m++) { 556 methods_table[m]->enter(res, port); 557 if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) { 558 devid = sio_readw(res, 0x20); 559 revid = sio_read(res, 0x22); 560 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) { 561 devid = sio_read(res, 0x20); 562 revid = sio_read(res, 0x21); 563 devid = (devid << 8) | revid; 564 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_FINTEK) { 565 devid = sio_read(res, 0x20); 566 revid = sio_read(res, 0x21); 567 devid = (devid << 8) | revid; 568 } else { 569 continue; 570 } 571 methods_table[m]->exit(res, port); 572 for (i = 0; superio_table[i].vendor != 0; i++) { 573 uint16_t mask; 574 575 mask = superio_table[i].mask; 576 if (superio_table[i].vendor != 577 methods_table[m]->vendor) 578 continue; 579 if ((superio_table[i].devid & ~mask) != (devid & ~mask)) 580 continue; 581 if (prefer > 0 && prefer != superio_table[i].extid) 582 continue; 583 break; 584 } 585 586 /* Found a matching SuperIO entry. */ 587 if (superio_table[i].vendor != 0) 588 break; 589 } 590 591 if (methods_table[m] == NULL) 592 error = ENXIO; 593 else 594 error = 0; 595 if (!claim || error != 0) { 596 bus_release_resource(dev, SYS_RES_IOPORT, rid, res); 597 return (error); 598 } 599 600 sc->methods = methods_table[m]; 601 sc->vendor = sc->methods->vendor; 602 sc->known_devices = superio_table[i].devices; 603 sc->io_res = res; 604 sc->io_rid = rid; 605 sc->io_port = port; 606 sc->devid = devid; 607 sc->revid = revid; 608 sc->extid = superio_table[i].extid; 609 610 KASSERT(sc->vendor == SUPERIO_VENDOR_ITE || 611 sc->vendor == SUPERIO_VENDOR_NUVOTON || 612 sc->vendor == SUPERIO_VENDOR_FINTEK, 613 ("Only ITE, Nuvoton and Fintek SuperIO-s are supported")); 614 sc->ldn_reg = 0x07; 615 sc->enable_reg = 0x30; /* FIXME enable_reg not used by nctgpio(4). */ 616 sc->current_ldn = 0xff; /* no device should have this */ 617 618 if (superio_table[i].descr != NULL) { 619 device_set_desc(dev, superio_table[i].descr); 620 } else if (sc->vendor == SUPERIO_VENDOR_ITE) { 621 char descr[64]; 622 623 snprintf(descr, sizeof(descr), 624 "ITE IT%4x SuperIO (revision 0x%02x)", 625 sc->devid, sc->revid); 626 device_set_desc_copy(dev, descr); 627 } 628 return (0); 629 } 630 631 static void 632 superio_identify(driver_t *driver, device_t parent) 633 { 634 device_t child; 635 int i; 636 637 /* 638 * Don't create child devices if any already exist. 639 * Those could be created via isa hints or if this 640 * driver is loaded, unloaded and then loaded again. 641 */ 642 if (device_find_child(parent, "superio", -1)) { 643 if (bootverbose) 644 printf("superio: device(s) already created\n"); 645 return; 646 } 647 648 /* 649 * Create a child for each candidate port. 650 * It would be nice if we could somehow clean up those 651 * that this driver fails to probe. 652 */ 653 for (i = 0; ports_table[i] != 0; i++) { 654 child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, 655 "superio", -1); 656 if (child == NULL) { 657 device_printf(parent, "failed to add superio child\n"); 658 continue; 659 } 660 bus_set_resource(child, SYS_RES_IOPORT, 0, ports_table[i], 2); 661 if (superio_detect(child, false, NULL) != 0) 662 device_delete_child(parent, child); 663 } 664 } 665 666 static int 667 superio_probe(device_t dev) 668 { 669 struct siosc *sc; 670 int error; 671 672 /* Make sure we do not claim some ISA PNP device. */ 673 if (isa_get_logicalid(dev) != 0) 674 return (ENXIO); 675 676 /* 677 * XXX We can populate the softc now only because we return 678 * BUS_PROBE_SPECIFIC 679 */ 680 sc = device_get_softc(dev); 681 error = superio_detect(dev, true, sc); 682 if (error != 0) 683 return (error); 684 return (BUS_PROBE_SPECIFIC); 685 } 686 687 static void 688 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn) 689 { 690 struct siosc *sc = device_get_softc(dev); 691 struct superio_devinfo *dinfo; 692 device_t child; 693 694 child = BUS_ADD_CHILD(dev, 0, NULL, -1); 695 if (child == NULL) { 696 device_printf(dev, "failed to add child for ldn %d, type %s\n", 697 ldn, devtype_to_str(type)); 698 return; 699 } 700 dinfo = device_get_ivars(child); 701 dinfo->ldn = ldn; 702 dinfo->type = type; 703 sio_conf_enter(sc); 704 dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60); 705 dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62); 706 dinfo->irq = sio_ldn_readw(sc, ldn, 0x70); 707 dinfo->dma = sio_ldn_readw(sc, ldn, 0x74); 708 sio_conf_exit(sc); 709 STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link); 710 } 711 712 static int 713 superio_attach(device_t dev) 714 { 715 struct siosc *sc = device_get_softc(dev); 716 int i; 717 718 mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF); 719 STAILQ_INIT(&sc->devlist); 720 721 for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) { 722 superio_add_known_child(dev, sc->known_devices[i].type, 723 sc->known_devices[i].ldn); 724 } 725 726 bus_generic_probe(dev); 727 bus_generic_attach(dev); 728 729 sc->chardev = make_dev(&superio_cdevsw, device_get_unit(dev), 730 UID_ROOT, GID_WHEEL, 0600, "superio%d", device_get_unit(dev)); 731 if (sc->chardev == NULL) 732 device_printf(dev, "failed to create character device\n"); 733 else 734 sc->chardev->si_drv1 = sc; 735 return (0); 736 } 737 738 static int 739 superio_detach(device_t dev) 740 { 741 struct siosc *sc = device_get_softc(dev); 742 int error; 743 744 error = bus_generic_detach(dev); 745 if (error != 0) 746 return (error); 747 if (sc->chardev != NULL) 748 destroy_dev(sc->chardev); 749 device_delete_children(dev); 750 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res); 751 mtx_destroy(&sc->conf_lock); 752 return (0); 753 } 754 755 static device_t 756 superio_add_child(device_t dev, u_int order, const char *name, int unit) 757 { 758 struct superio_devinfo *dinfo; 759 device_t child; 760 761 child = device_add_child_ordered(dev, order, name, unit); 762 if (child == NULL) 763 return (NULL); 764 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 765 if (dinfo == NULL) { 766 device_delete_child(dev, child); 767 return (NULL); 768 } 769 dinfo->ldn = 0xff; 770 dinfo->type = SUPERIO_DEV_NONE; 771 dinfo->dev = child; 772 resource_list_init(&dinfo->resources); 773 device_set_ivars(child, dinfo); 774 return (child); 775 } 776 777 static int 778 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 779 { 780 struct superio_devinfo *dinfo; 781 782 dinfo = device_get_ivars(child); 783 switch (which) { 784 case SUPERIO_IVAR_LDN: 785 *result = dinfo->ldn; 786 break; 787 case SUPERIO_IVAR_TYPE: 788 *result = dinfo->type; 789 break; 790 case SUPERIO_IVAR_IOBASE: 791 *result = dinfo->iobase; 792 break; 793 case SUPERIO_IVAR_IOBASE2: 794 *result = dinfo->iobase2; 795 break; 796 case SUPERIO_IVAR_IRQ: 797 *result = dinfo->irq; 798 break; 799 case SUPERIO_IVAR_DMA: 800 *result = dinfo->dma; 801 break; 802 default: 803 return (ENOENT); 804 } 805 return (0); 806 } 807 808 static int 809 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 810 { 811 812 switch (which) { 813 case SUPERIO_IVAR_LDN: 814 case SUPERIO_IVAR_TYPE: 815 case SUPERIO_IVAR_IOBASE: 816 case SUPERIO_IVAR_IOBASE2: 817 case SUPERIO_IVAR_IRQ: 818 case SUPERIO_IVAR_DMA: 819 return (EINVAL); 820 default: 821 return (ENOENT); 822 } 823 } 824 825 static struct resource_list * 826 superio_get_resource_list(device_t dev, device_t child) 827 { 828 struct superio_devinfo *dinfo = device_get_ivars(child); 829 830 return (&dinfo->resources); 831 } 832 833 static int 834 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...) 835 { 836 va_list ap; 837 int retval; 838 839 retval = printf("superio:%s@ldn%0x2x: ", 840 devtype_to_str(dinfo->type), dinfo->ldn); 841 va_start(ap, fmt); 842 retval += vprintf(fmt, ap); 843 va_end(ap); 844 return (retval); 845 } 846 847 static void 848 superio_child_detached(device_t dev, device_t child) 849 { 850 struct superio_devinfo *dinfo; 851 struct resource_list *rl; 852 853 dinfo = device_get_ivars(child); 854 rl = &dinfo->resources; 855 856 if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0) 857 superio_printf(dinfo, "Device leaked IRQ resources\n"); 858 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0) 859 superio_printf(dinfo, "Device leaked memory resources\n"); 860 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0) 861 superio_printf(dinfo, "Device leaked I/O resources\n"); 862 } 863 864 static int 865 superio_child_location(device_t parent, device_t child, struct sbuf *sb) 866 { 867 uint8_t ldn; 868 869 ldn = superio_get_ldn(child); 870 sbuf_printf(sb, "ldn=0x%02x", ldn); 871 return (0); 872 } 873 874 static int 875 superio_child_pnp(device_t parent, device_t child, struct sbuf *sb) 876 { 877 superio_dev_type_t type; 878 879 type = superio_get_type(child); 880 sbuf_printf(sb, "type=%s", devtype_to_str(type)); 881 return (0); 882 } 883 884 static int 885 superio_print_child(device_t parent, device_t child) 886 { 887 superio_dev_type_t type; 888 uint8_t ldn; 889 int retval; 890 891 ldn = superio_get_ldn(child); 892 type = superio_get_type(child); 893 894 retval = bus_print_child_header(parent, child); 895 retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn); 896 retval += bus_print_child_footer(parent, child); 897 898 return (retval); 899 } 900 901 superio_vendor_t 902 superio_vendor(device_t dev) 903 { 904 device_t sio_dev = device_get_parent(dev); 905 struct siosc *sc = device_get_softc(sio_dev); 906 907 return (sc->vendor); 908 } 909 910 uint16_t 911 superio_devid(device_t dev) 912 { 913 device_t sio_dev = device_get_parent(dev); 914 struct siosc *sc = device_get_softc(sio_dev); 915 916 return (sc->devid); 917 } 918 919 uint8_t 920 superio_revid(device_t dev) 921 { 922 device_t sio_dev = device_get_parent(dev); 923 struct siosc *sc = device_get_softc(sio_dev); 924 925 return (sc->revid); 926 } 927 928 int 929 superio_extid(device_t dev) 930 { 931 device_t sio_dev = device_get_parent(dev); 932 struct siosc *sc = device_get_softc(sio_dev); 933 934 return (sc->extid); 935 } 936 937 uint8_t 938 superio_ldn_read(device_t dev, uint8_t ldn, uint8_t reg) 939 { 940 device_t sio_dev = device_get_parent(dev); 941 struct siosc *sc = device_get_softc(sio_dev); 942 uint8_t v; 943 944 sio_conf_enter(sc); 945 v = sio_ldn_read(sc, ldn, reg); 946 sio_conf_exit(sc); 947 return (v); 948 } 949 950 uint8_t 951 superio_read(device_t dev, uint8_t reg) 952 { 953 struct superio_devinfo *dinfo = device_get_ivars(dev); 954 955 return (superio_ldn_read(dev, dinfo->ldn, reg)); 956 } 957 958 void 959 superio_ldn_write(device_t dev, uint8_t ldn, uint8_t reg, uint8_t val) 960 { 961 device_t sio_dev = device_get_parent(dev); 962 struct siosc *sc = device_get_softc(sio_dev); 963 964 sio_conf_enter(sc); 965 sio_ldn_write(sc, ldn, reg, val); 966 sio_conf_exit(sc); 967 } 968 969 void 970 superio_write(device_t dev, uint8_t reg, uint8_t val) 971 { 972 struct superio_devinfo *dinfo = device_get_ivars(dev); 973 974 return (superio_ldn_write(dev, dinfo->ldn, reg, val)); 975 } 976 977 bool 978 superio_dev_enabled(device_t dev, uint8_t mask) 979 { 980 device_t sio_dev = device_get_parent(dev); 981 struct siosc *sc = device_get_softc(sio_dev); 982 struct superio_devinfo *dinfo = device_get_ivars(dev); 983 uint8_t v; 984 985 /* GPIO device is always active in ITE chips. */ 986 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 987 return (true); 988 989 v = superio_read(dev, sc->enable_reg); /* FIXME enable_reg not used by nctgpio(4). */ 990 return ((v & mask) != 0); 991 } 992 993 void 994 superio_dev_enable(device_t dev, uint8_t mask) 995 { 996 device_t sio_dev = device_get_parent(dev); 997 struct siosc *sc = device_get_softc(sio_dev); 998 struct superio_devinfo *dinfo = device_get_ivars(dev); 999 uint8_t v; 1000 1001 /* GPIO device is always active in ITE chips. */ 1002 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 1003 return; 1004 1005 sio_conf_enter(sc); 1006 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 1007 v |= mask; 1008 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 1009 sio_conf_exit(sc); 1010 } 1011 1012 void 1013 superio_dev_disable(device_t dev, uint8_t mask) 1014 { 1015 device_t sio_dev = device_get_parent(dev); 1016 struct siosc *sc = device_get_softc(sio_dev); 1017 struct superio_devinfo *dinfo = device_get_ivars(dev); 1018 uint8_t v; 1019 1020 /* GPIO device is always active in ITE chips. */ 1021 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 1022 return; 1023 1024 sio_conf_enter(sc); 1025 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 1026 v &= ~mask; 1027 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 1028 sio_conf_exit(sc); 1029 } 1030 1031 device_t 1032 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn) 1033 { 1034 struct siosc *sc = device_get_softc(superio); 1035 struct superio_devinfo *dinfo; 1036 1037 if (ldn < -1 || ldn > UINT8_MAX) 1038 return (NULL); /* ERANGE */ 1039 if (type == SUPERIO_DEV_NONE && ldn == -1) 1040 return (NULL); /* EINVAL */ 1041 1042 STAILQ_FOREACH(dinfo, &sc->devlist, link) { 1043 if (ldn != -1 && dinfo->ldn != ldn) 1044 continue; 1045 if (type != SUPERIO_DEV_NONE && dinfo->type != type) 1046 continue; 1047 return (dinfo->dev); 1048 } 1049 return (NULL); 1050 } 1051 1052 static int 1053 superio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, 1054 struct thread *td) 1055 { 1056 struct siosc *sc; 1057 struct superiocmd *s; 1058 1059 sc = dev->si_drv1; 1060 s = (struct superiocmd *)data; 1061 switch (cmd) { 1062 case SUPERIO_CR_READ: 1063 sio_conf_enter(sc); 1064 s->val = sio_ldn_read(sc, s->ldn, s->cr); 1065 sio_conf_exit(sc); 1066 return (0); 1067 case SUPERIO_CR_WRITE: 1068 sio_conf_enter(sc); 1069 sio_ldn_write(sc, s->ldn, s->cr, s->val); 1070 sio_conf_exit(sc); 1071 return (0); 1072 default: 1073 return (ENOTTY); 1074 } 1075 } 1076 1077 static device_method_t superio_methods[] = { 1078 DEVMETHOD(device_identify, superio_identify), 1079 DEVMETHOD(device_probe, superio_probe), 1080 DEVMETHOD(device_attach, superio_attach), 1081 DEVMETHOD(device_detach, superio_detach), 1082 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1083 DEVMETHOD(device_suspend, bus_generic_suspend), 1084 DEVMETHOD(device_resume, bus_generic_resume), 1085 1086 DEVMETHOD(bus_add_child, superio_add_child), 1087 DEVMETHOD(bus_child_detached, superio_child_detached), 1088 DEVMETHOD(bus_child_location, superio_child_location), 1089 DEVMETHOD(bus_child_pnpinfo, superio_child_pnp), 1090 DEVMETHOD(bus_print_child, superio_print_child), 1091 DEVMETHOD(bus_read_ivar, superio_read_ivar), 1092 DEVMETHOD(bus_write_ivar, superio_write_ivar), 1093 DEVMETHOD(bus_get_resource_list, superio_get_resource_list), 1094 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 1095 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 1096 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1097 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1098 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1099 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1100 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1101 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1102 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1103 1104 DEVMETHOD_END 1105 }; 1106 1107 static driver_t superio_driver = { 1108 "superio", 1109 superio_methods, 1110 sizeof(struct siosc) 1111 }; 1112 1113 DRIVER_MODULE(superio, isa, superio_driver, 0, 0); 1114 MODULE_VERSION(superio, 1); 1115