1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Andriy Gapon 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/kernel.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/proc.h> 43 #include <sys/rman.h> 44 #include <sys/sbuf.h> 45 #include <sys/time.h> 46 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 #include <machine/stdarg.h> 50 51 #include <isa/isavar.h> 52 53 #include <dev/superio/superio.h> 54 #include <dev/superio/superio_io.h> 55 56 #include "isa_if.h" 57 58 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t); 59 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t); 60 61 struct sio_conf_methods { 62 sio_conf_enter_f enter; 63 sio_conf_exit_f exit; 64 superio_vendor_t vendor; 65 }; 66 67 struct sio_device { 68 uint8_t ldn; 69 superio_dev_type_t type; 70 }; 71 72 struct superio_devinfo { 73 STAILQ_ENTRY(superio_devinfo) link; 74 struct resource_list resources; 75 device_t dev; 76 uint8_t ldn; 77 superio_dev_type_t type; 78 uint16_t iobase; 79 uint16_t iobase2; 80 uint8_t irq; 81 uint8_t dma; 82 }; 83 84 struct siosc { 85 struct mtx conf_lock; 86 STAILQ_HEAD(, superio_devinfo) devlist; 87 struct resource* io_res; 88 struct cdev *chardev; 89 int io_rid; 90 uint16_t io_port; 91 const struct sio_conf_methods *methods; 92 const struct sio_device *known_devices; 93 superio_vendor_t vendor; 94 uint16_t devid; 95 uint8_t revid; 96 int extid; 97 uint8_t current_ldn; 98 uint8_t ldn_reg; 99 uint8_t enable_reg; 100 }; 101 102 static d_ioctl_t superio_ioctl; 103 104 static struct cdevsw superio_cdevsw = { 105 .d_version = D_VERSION, 106 .d_ioctl = superio_ioctl, 107 .d_name = "superio", 108 }; 109 110 #define NUMPORTS 2 111 112 static uint8_t 113 sio_read(struct resource* res, uint8_t reg) 114 { 115 bus_write_1(res, 0, reg); 116 return (bus_read_1(res, 1)); 117 } 118 119 /* Read a word from two one-byte registers, big endian. */ 120 static uint16_t 121 sio_readw(struct resource* res, uint8_t reg) 122 { 123 uint16_t v; 124 125 v = sio_read(res, reg); 126 v <<= 8; 127 v |= sio_read(res, reg + 1); 128 return (v); 129 } 130 131 static void 132 sio_write(struct resource* res, uint8_t reg, uint8_t val) 133 { 134 bus_write_1(res, 0, reg); 135 bus_write_1(res, 1, val); 136 } 137 138 static void 139 sio_ldn_select(struct siosc *sc, uint8_t ldn) 140 { 141 mtx_assert(&sc->conf_lock, MA_OWNED); 142 if (ldn == sc->current_ldn) 143 return; 144 sio_write(sc->io_res, sc->ldn_reg, ldn); 145 sc->current_ldn = ldn; 146 } 147 148 static uint8_t 149 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg) 150 { 151 mtx_assert(&sc->conf_lock, MA_OWNED); 152 if (reg >= sc->enable_reg) { 153 sio_ldn_select(sc, ldn); 154 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 155 } 156 return (sio_read(sc->io_res, reg)); 157 } 158 159 static uint16_t 160 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg) 161 { 162 mtx_assert(&sc->conf_lock, MA_OWNED); 163 if (reg >= sc->enable_reg) { 164 sio_ldn_select(sc, ldn); 165 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 166 } 167 return (sio_readw(sc->io_res, reg)); 168 } 169 170 static void 171 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val) 172 { 173 mtx_assert(&sc->conf_lock, MA_OWNED); 174 if (reg <= sc->ldn_reg) { 175 printf("ignored attempt to write special register 0x%x\n", reg); 176 return; 177 } 178 sio_ldn_select(sc, ldn); 179 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 180 sio_write(sc->io_res, reg, val); 181 } 182 183 static void 184 sio_conf_enter(struct siosc *sc) 185 { 186 mtx_lock(&sc->conf_lock); 187 sc->methods->enter(sc->io_res, sc->io_port); 188 } 189 190 static void 191 sio_conf_exit(struct siosc *sc) 192 { 193 sc->methods->exit(sc->io_res, sc->io_port); 194 sc->current_ldn = 0xff; 195 mtx_unlock(&sc->conf_lock); 196 } 197 198 static void 199 ite_conf_enter(struct resource* res, uint16_t port) 200 { 201 bus_write_1(res, 0, 0x87); 202 bus_write_1(res, 0, 0x01); 203 bus_write_1(res, 0, 0x55); 204 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); 205 } 206 207 static void 208 ite_conf_exit(struct resource* res, uint16_t port) 209 { 210 sio_write(res, 0x02, 0x02); 211 } 212 213 static const struct sio_conf_methods ite_conf_methods = { 214 .enter = ite_conf_enter, 215 .exit = ite_conf_exit, 216 .vendor = SUPERIO_VENDOR_ITE 217 }; 218 219 static void 220 nvt_conf_enter(struct resource* res, uint16_t port) 221 { 222 bus_write_1(res, 0, 0x87); 223 bus_write_1(res, 0, 0x87); 224 } 225 226 static void 227 nvt_conf_exit(struct resource* res, uint16_t port) 228 { 229 bus_write_1(res, 0, 0xaa); 230 } 231 232 static const struct sio_conf_methods nvt_conf_methods = { 233 .enter = nvt_conf_enter, 234 .exit = nvt_conf_exit, 235 .vendor = SUPERIO_VENDOR_NUVOTON 236 }; 237 238 static void 239 fintek_conf_enter(struct resource* res, uint16_t port) 240 { 241 bus_write_1(res, 0, 0x87); 242 bus_write_1(res, 0, 0x87); 243 } 244 245 static void 246 fintek_conf_exit(struct resource* res, uint16_t port) 247 { 248 bus_write_1(res, 0, 0xaa); 249 } 250 251 static const struct sio_conf_methods fintek_conf_methods = { 252 .enter = fintek_conf_enter, 253 .exit = fintek_conf_exit, 254 .vendor = SUPERIO_VENDOR_FINTEK 255 }; 256 257 static const struct sio_conf_methods * const methods_table[] = { 258 &ite_conf_methods, 259 &nvt_conf_methods, 260 &fintek_conf_methods, 261 NULL 262 }; 263 264 static const uint16_t ports_table[] = { 265 0x2e, 0x4e, 0 266 }; 267 268 const struct sio_device ite_devices[] = { 269 { .ldn = 4, .type = SUPERIO_DEV_HWM }, 270 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 271 { .type = SUPERIO_DEV_NONE }, 272 }; 273 274 const struct sio_device w83627_devices[] = { 275 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 276 { .ldn = 9, .type = SUPERIO_DEV_GPIO }, 277 { .type = SUPERIO_DEV_NONE }, 278 }; 279 280 const struct sio_device nvt_devices[] = { 281 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 282 { .type = SUPERIO_DEV_NONE }, 283 }; 284 285 const struct sio_device nct5104_devices[] = { 286 { .ldn = 7, .type = SUPERIO_DEV_GPIO }, 287 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 288 { .ldn = 15, .type = SUPERIO_DEV_GPIO }, 289 { .type = SUPERIO_DEV_NONE }, 290 }; 291 292 const struct sio_device nct5585_devices[] = { 293 { .ldn = 9, .type = SUPERIO_DEV_GPIO }, 294 { .type = SUPERIO_DEV_NONE }, 295 }; 296 297 const struct sio_device nct611x_devices[] = { 298 { .ldn = 0x7, .type = SUPERIO_DEV_GPIO }, 299 { .ldn = 0x8, .type = SUPERIO_DEV_WDT }, 300 { .type = SUPERIO_DEV_NONE }, 301 }; 302 303 const struct sio_device nct67xx_devices[] = { 304 { .ldn = 0x8, .type = SUPERIO_DEV_WDT }, 305 { .ldn = 0x9, .type = SUPERIO_DEV_GPIO }, 306 { .ldn = 0xb, .type = SUPERIO_DEV_HWM }, 307 { .type = SUPERIO_DEV_NONE }, 308 }; 309 310 const struct sio_device fintek_devices[] = { 311 { .ldn = 6, .type = SUPERIO_DEV_GPIO }, 312 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 313 { .type = SUPERIO_DEV_NONE }, 314 }; 315 316 static const struct { 317 superio_vendor_t vendor; 318 uint16_t devid; 319 uint16_t mask; 320 int extid; /* Extra ID: used to handle conflicting devid. */ 321 const char *descr; 322 const struct sio_device *devices; 323 } superio_table[] = { 324 { 325 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8613, 326 .devices = ite_devices, 327 }, 328 { 329 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712, 330 .devices = ite_devices, 331 }, 332 { 333 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716, 334 .devices = ite_devices, 335 }, 336 { 337 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718, 338 .devices = ite_devices, 339 }, 340 { 341 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720, 342 .devices = ite_devices, 343 }, 344 { 345 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721, 346 .devices = ite_devices, 347 }, 348 { 349 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726, 350 .devices = ite_devices, 351 }, 352 { 353 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728, 354 .devices = ite_devices, 355 }, 356 { 357 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771, 358 .devices = ite_devices, 359 }, 360 { 361 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00, 362 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)", 363 .devices = nct5104_devices, 364 }, 365 { 366 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff, 367 .descr = "Winbond 83627HF/F/HG/G", 368 .devices = nvt_devices, 369 }, 370 { 371 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff, 372 .descr = "Winbond 83627S", 373 .devices = nvt_devices, 374 }, 375 { 376 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff, 377 .descr = "Winbond 83697HF", 378 .devices = nvt_devices, 379 }, 380 { 381 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff, 382 .descr = "Winbond 83697UG", 383 .devices = nvt_devices, 384 }, 385 { 386 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff, 387 .descr = "Winbond 83637HF", 388 .devices = nvt_devices, 389 }, 390 { 391 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff, 392 .descr = "Winbond 83627THF", 393 .devices = nvt_devices, 394 }, 395 { 396 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff, 397 .descr = "Winbond 83687THF", 398 .devices = nvt_devices, 399 }, 400 { 401 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff, 402 .descr = "Winbond 83627EHF", 403 .devices = nvt_devices, 404 }, 405 { 406 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff, 407 .descr = "Winbond 83627DHG", 408 .devices = w83627_devices, 409 }, 410 { 411 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff, 412 .descr = "Winbond 83627UHG", 413 .devices = nvt_devices, 414 }, 415 { 416 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff, 417 .descr = "Winbond 83667HG", 418 .devices = nvt_devices, 419 }, 420 { 421 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff, 422 .descr = "Winbond 83627DHG-P", 423 .devices = nvt_devices, 424 }, 425 { 426 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff, 427 .descr = "Winbond 83667HG-B", 428 .devices = nvt_devices, 429 }, 430 { 431 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff, 432 .descr = "Nuvoton NCT6775", 433 .devices = nvt_devices, 434 }, 435 { 436 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff, 437 .descr = "Nuvoton NCT6776", 438 .devices = nvt_devices, 439 }, 440 { 441 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff, 442 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)", 443 .devices = nct5104_devices, 444 }, 445 { 446 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff, 447 .descr = "Nuvoton NCT6779D", 448 .devices = nct67xx_devices, 449 }, 450 { 451 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 1, 452 .descr = "Nuvoton NCT6796D-E", 453 .devices = nct67xx_devices, 454 }, 455 { 456 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 2, 457 .descr = "Nuvoton NCT5585D", 458 .devices = nct5585_devices, 459 }, 460 { 461 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff, 462 .descr = "Nuvoton NCT6791", 463 .devices = nvt_devices, 464 }, 465 { 466 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff, 467 .descr = "Nuvoton NCT6792", 468 .devices = nvt_devices, 469 }, 470 { 471 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff, 472 .descr = "Nuvoton NCT6793", 473 .devices = nvt_devices, 474 }, 475 { 476 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd200, .mask = 0xff, 477 .descr = "Nuvoton NCT6112D/NCT6114D/NCT6116D", 478 .devices = nct611x_devices, 479 }, 480 { 481 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff, 482 .descr = "Nuvoton NCT6795", 483 .devices = nvt_devices, 484 }, 485 { 486 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x1210, .mask = 0xff, 487 .descr = "Fintek F81803", 488 .devices = fintek_devices, 489 }, 490 { 491 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x0704, 492 .descr = "Fintek F81865", 493 .devices = fintek_devices, 494 }, 495 { 0, 0 } 496 }; 497 498 static const char * 499 devtype_to_str(superio_dev_type_t type) 500 { 501 switch (type) { 502 case SUPERIO_DEV_NONE: 503 return ("none"); 504 case SUPERIO_DEV_HWM: 505 return ("HWM"); 506 case SUPERIO_DEV_WDT: 507 return ("WDT"); 508 case SUPERIO_DEV_GPIO: 509 return ("GPIO"); 510 case SUPERIO_DEV_MAX: 511 return ("invalid"); 512 } 513 return ("invalid"); 514 } 515 516 static int 517 superio_detect(device_t dev, bool claim, struct siosc *sc) 518 { 519 struct resource *res; 520 rman_res_t port; 521 rman_res_t count; 522 uint16_t devid; 523 uint8_t revid; 524 int error; 525 int rid; 526 int i, m; 527 int prefer; 528 529 error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count); 530 if (error != 0) 531 return (error); 532 if (port > UINT16_MAX || count < NUMPORTS) { 533 device_printf(dev, "unexpected I/O range size\n"); 534 return (ENXIO); 535 } 536 537 /* 538 * Make a temporary resource reservation for hardware probing. 539 * If we can't get the resources we need then 540 * we need to abort. Possibly this indicates 541 * the resources were used by another device 542 * in which case the probe would have failed anyhow. 543 */ 544 rid = 0; 545 res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); 546 if (res == NULL) { 547 if (claim) 548 device_printf(dev, "failed to allocate I/O resource\n"); 549 return (ENXIO); 550 } 551 552 prefer = 0; 553 resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer", &prefer); 554 if (bootverbose && prefer > 0) 555 device_printf(dev, "prefer extid %d\n", prefer); 556 557 for (m = 0; methods_table[m] != NULL; m++) { 558 methods_table[m]->enter(res, port); 559 if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) { 560 devid = sio_readw(res, 0x20); 561 revid = sio_read(res, 0x22); 562 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) { 563 devid = sio_read(res, 0x20); 564 revid = sio_read(res, 0x21); 565 devid = (devid << 8) | revid; 566 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_FINTEK) { 567 devid = sio_read(res, 0x20); 568 revid = sio_read(res, 0x21); 569 devid = (devid << 8) | revid; 570 } else { 571 continue; 572 } 573 methods_table[m]->exit(res, port); 574 for (i = 0; superio_table[i].vendor != 0; i++) { 575 uint16_t mask; 576 577 mask = superio_table[i].mask; 578 if (superio_table[i].vendor != 579 methods_table[m]->vendor) 580 continue; 581 if ((superio_table[i].devid & ~mask) != (devid & ~mask)) 582 continue; 583 if (prefer > 0 && prefer != superio_table[i].extid) 584 continue; 585 break; 586 } 587 588 /* Found a matching SuperIO entry. */ 589 if (superio_table[i].vendor != 0) 590 break; 591 } 592 593 if (methods_table[m] == NULL) 594 error = ENXIO; 595 else 596 error = 0; 597 if (!claim || error != 0) { 598 bus_release_resource(dev, SYS_RES_IOPORT, rid, res); 599 return (error); 600 } 601 602 sc->methods = methods_table[m]; 603 sc->vendor = sc->methods->vendor; 604 sc->known_devices = superio_table[i].devices; 605 sc->io_res = res; 606 sc->io_rid = rid; 607 sc->io_port = port; 608 sc->devid = devid; 609 sc->revid = revid; 610 sc->extid = superio_table[i].extid; 611 612 KASSERT(sc->vendor == SUPERIO_VENDOR_ITE || 613 sc->vendor == SUPERIO_VENDOR_NUVOTON || 614 sc->vendor == SUPERIO_VENDOR_FINTEK, 615 ("Only ITE, Nuvoton and Fintek SuperIO-s are supported")); 616 sc->ldn_reg = 0x07; 617 sc->enable_reg = 0x30; /* FIXME enable_reg not used by nctgpio(4). */ 618 sc->current_ldn = 0xff; /* no device should have this */ 619 620 if (superio_table[i].descr != NULL) { 621 device_set_desc(dev, superio_table[i].descr); 622 } else if (sc->vendor == SUPERIO_VENDOR_ITE) { 623 char descr[64]; 624 625 snprintf(descr, sizeof(descr), 626 "ITE IT%4x SuperIO (revision 0x%02x)", 627 sc->devid, sc->revid); 628 device_set_desc_copy(dev, descr); 629 } 630 return (0); 631 } 632 633 static void 634 superio_identify(driver_t *driver, device_t parent) 635 { 636 device_t child; 637 int i; 638 639 /* 640 * Don't create child devices if any already exist. 641 * Those could be created via isa hints or if this 642 * driver is loaded, unloaded and then loaded again. 643 */ 644 if (device_find_child(parent, "superio", -1)) { 645 if (bootverbose) 646 printf("superio: device(s) already created\n"); 647 return; 648 } 649 650 /* 651 * Create a child for each candidate port. 652 * It would be nice if we could somehow clean up those 653 * that this driver fails to probe. 654 */ 655 for (i = 0; ports_table[i] != 0; i++) { 656 child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, 657 "superio", -1); 658 if (child == NULL) { 659 device_printf(parent, "failed to add superio child\n"); 660 continue; 661 } 662 bus_set_resource(child, SYS_RES_IOPORT, 0, ports_table[i], 2); 663 if (superio_detect(child, false, NULL) != 0) 664 device_delete_child(parent, child); 665 } 666 } 667 668 static int 669 superio_probe(device_t dev) 670 { 671 struct siosc *sc; 672 int error; 673 674 /* Make sure we do not claim some ISA PNP device. */ 675 if (isa_get_logicalid(dev) != 0) 676 return (ENXIO); 677 678 /* 679 * XXX We can populate the softc now only because we return 680 * BUS_PROBE_SPECIFIC 681 */ 682 sc = device_get_softc(dev); 683 error = superio_detect(dev, true, sc); 684 if (error != 0) 685 return (error); 686 return (BUS_PROBE_SPECIFIC); 687 } 688 689 static void 690 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn) 691 { 692 struct siosc *sc = device_get_softc(dev); 693 struct superio_devinfo *dinfo; 694 device_t child; 695 696 child = BUS_ADD_CHILD(dev, 0, NULL, -1); 697 if (child == NULL) { 698 device_printf(dev, "failed to add child for ldn %d, type %s\n", 699 ldn, devtype_to_str(type)); 700 return; 701 } 702 dinfo = device_get_ivars(child); 703 dinfo->ldn = ldn; 704 dinfo->type = type; 705 sio_conf_enter(sc); 706 dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60); 707 dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62); 708 dinfo->irq = sio_ldn_readw(sc, ldn, 0x70); 709 dinfo->dma = sio_ldn_readw(sc, ldn, 0x74); 710 sio_conf_exit(sc); 711 STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link); 712 } 713 714 static int 715 superio_attach(device_t dev) 716 { 717 struct siosc *sc = device_get_softc(dev); 718 int i; 719 720 mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF); 721 STAILQ_INIT(&sc->devlist); 722 723 for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) { 724 superio_add_known_child(dev, sc->known_devices[i].type, 725 sc->known_devices[i].ldn); 726 } 727 728 bus_generic_probe(dev); 729 bus_generic_attach(dev); 730 731 sc->chardev = make_dev(&superio_cdevsw, device_get_unit(dev), 732 UID_ROOT, GID_WHEEL, 0600, "superio%d", device_get_unit(dev)); 733 if (sc->chardev == NULL) 734 device_printf(dev, "failed to create character device\n"); 735 else 736 sc->chardev->si_drv1 = sc; 737 return (0); 738 } 739 740 static int 741 superio_detach(device_t dev) 742 { 743 struct siosc *sc = device_get_softc(dev); 744 int error; 745 746 error = bus_generic_detach(dev); 747 if (error != 0) 748 return (error); 749 if (sc->chardev != NULL) 750 destroy_dev(sc->chardev); 751 device_delete_children(dev); 752 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res); 753 mtx_destroy(&sc->conf_lock); 754 return (0); 755 } 756 757 static device_t 758 superio_add_child(device_t dev, u_int order, const char *name, int unit) 759 { 760 struct superio_devinfo *dinfo; 761 device_t child; 762 763 child = device_add_child_ordered(dev, order, name, unit); 764 if (child == NULL) 765 return (NULL); 766 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 767 if (dinfo == NULL) { 768 device_delete_child(dev, child); 769 return (NULL); 770 } 771 dinfo->ldn = 0xff; 772 dinfo->type = SUPERIO_DEV_NONE; 773 dinfo->dev = child; 774 resource_list_init(&dinfo->resources); 775 device_set_ivars(child, dinfo); 776 return (child); 777 } 778 779 static int 780 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 781 { 782 struct superio_devinfo *dinfo; 783 784 dinfo = device_get_ivars(child); 785 switch (which) { 786 case SUPERIO_IVAR_LDN: 787 *result = dinfo->ldn; 788 break; 789 case SUPERIO_IVAR_TYPE: 790 *result = dinfo->type; 791 break; 792 case SUPERIO_IVAR_IOBASE: 793 *result = dinfo->iobase; 794 break; 795 case SUPERIO_IVAR_IOBASE2: 796 *result = dinfo->iobase2; 797 break; 798 case SUPERIO_IVAR_IRQ: 799 *result = dinfo->irq; 800 break; 801 case SUPERIO_IVAR_DMA: 802 *result = dinfo->dma; 803 break; 804 default: 805 return (ENOENT); 806 } 807 return (0); 808 } 809 810 static int 811 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 812 { 813 814 switch (which) { 815 case SUPERIO_IVAR_LDN: 816 case SUPERIO_IVAR_TYPE: 817 case SUPERIO_IVAR_IOBASE: 818 case SUPERIO_IVAR_IOBASE2: 819 case SUPERIO_IVAR_IRQ: 820 case SUPERIO_IVAR_DMA: 821 return (EINVAL); 822 default: 823 return (ENOENT); 824 } 825 } 826 827 static struct resource_list * 828 superio_get_resource_list(device_t dev, device_t child) 829 { 830 struct superio_devinfo *dinfo = device_get_ivars(child); 831 832 return (&dinfo->resources); 833 } 834 835 static int 836 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...) 837 { 838 va_list ap; 839 int retval; 840 841 retval = printf("superio:%s@ldn%0x2x: ", 842 devtype_to_str(dinfo->type), dinfo->ldn); 843 va_start(ap, fmt); 844 retval += vprintf(fmt, ap); 845 va_end(ap); 846 return (retval); 847 } 848 849 static void 850 superio_child_detached(device_t dev, device_t child) 851 { 852 struct superio_devinfo *dinfo; 853 struct resource_list *rl; 854 855 dinfo = device_get_ivars(child); 856 rl = &dinfo->resources; 857 858 if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0) 859 superio_printf(dinfo, "Device leaked IRQ resources\n"); 860 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0) 861 superio_printf(dinfo, "Device leaked memory resources\n"); 862 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0) 863 superio_printf(dinfo, "Device leaked I/O resources\n"); 864 } 865 866 static int 867 superio_child_location(device_t parent, device_t child, struct sbuf *sb) 868 { 869 uint8_t ldn; 870 871 ldn = superio_get_ldn(child); 872 sbuf_printf(sb, "ldn=0x%02x", ldn); 873 return (0); 874 } 875 876 static int 877 superio_child_pnp(device_t parent, device_t child, struct sbuf *sb) 878 { 879 superio_dev_type_t type; 880 881 type = superio_get_type(child); 882 sbuf_printf(sb, "type=%s", devtype_to_str(type)); 883 return (0); 884 } 885 886 static int 887 superio_print_child(device_t parent, device_t child) 888 { 889 superio_dev_type_t type; 890 uint8_t ldn; 891 int retval; 892 893 ldn = superio_get_ldn(child); 894 type = superio_get_type(child); 895 896 retval = bus_print_child_header(parent, child); 897 retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn); 898 retval += bus_print_child_footer(parent, child); 899 900 return (retval); 901 } 902 903 superio_vendor_t 904 superio_vendor(device_t dev) 905 { 906 device_t sio_dev = device_get_parent(dev); 907 struct siosc *sc = device_get_softc(sio_dev); 908 909 return (sc->vendor); 910 } 911 912 uint16_t 913 superio_devid(device_t dev) 914 { 915 device_t sio_dev = device_get_parent(dev); 916 struct siosc *sc = device_get_softc(sio_dev); 917 918 return (sc->devid); 919 } 920 921 uint8_t 922 superio_revid(device_t dev) 923 { 924 device_t sio_dev = device_get_parent(dev); 925 struct siosc *sc = device_get_softc(sio_dev); 926 927 return (sc->revid); 928 } 929 930 int 931 superio_extid(device_t dev) 932 { 933 device_t sio_dev = device_get_parent(dev); 934 struct siosc *sc = device_get_softc(sio_dev); 935 936 return (sc->extid); 937 } 938 939 uint8_t 940 superio_ldn_read(device_t dev, uint8_t ldn, uint8_t reg) 941 { 942 device_t sio_dev = device_get_parent(dev); 943 struct siosc *sc = device_get_softc(sio_dev); 944 uint8_t v; 945 946 sio_conf_enter(sc); 947 v = sio_ldn_read(sc, ldn, reg); 948 sio_conf_exit(sc); 949 return (v); 950 } 951 952 uint8_t 953 superio_read(device_t dev, uint8_t reg) 954 { 955 struct superio_devinfo *dinfo = device_get_ivars(dev); 956 957 return (superio_ldn_read(dev, dinfo->ldn, reg)); 958 } 959 960 void 961 superio_ldn_write(device_t dev, uint8_t ldn, uint8_t reg, uint8_t val) 962 { 963 device_t sio_dev = device_get_parent(dev); 964 struct siosc *sc = device_get_softc(sio_dev); 965 966 sio_conf_enter(sc); 967 sio_ldn_write(sc, ldn, reg, val); 968 sio_conf_exit(sc); 969 } 970 971 void 972 superio_write(device_t dev, uint8_t reg, uint8_t val) 973 { 974 struct superio_devinfo *dinfo = device_get_ivars(dev); 975 976 return (superio_ldn_write(dev, dinfo->ldn, reg, val)); 977 } 978 979 bool 980 superio_dev_enabled(device_t dev, uint8_t mask) 981 { 982 device_t sio_dev = device_get_parent(dev); 983 struct siosc *sc = device_get_softc(sio_dev); 984 struct superio_devinfo *dinfo = device_get_ivars(dev); 985 uint8_t v; 986 987 /* GPIO device is always active in ITE chips. */ 988 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 989 return (true); 990 991 v = superio_read(dev, sc->enable_reg); /* FIXME enable_reg not used by nctgpio(4). */ 992 return ((v & mask) != 0); 993 } 994 995 void 996 superio_dev_enable(device_t dev, uint8_t mask) 997 { 998 device_t sio_dev = device_get_parent(dev); 999 struct siosc *sc = device_get_softc(sio_dev); 1000 struct superio_devinfo *dinfo = device_get_ivars(dev); 1001 uint8_t v; 1002 1003 /* GPIO device is always active in ITE chips. */ 1004 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 1005 return; 1006 1007 sio_conf_enter(sc); 1008 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 1009 v |= mask; 1010 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 1011 sio_conf_exit(sc); 1012 } 1013 1014 void 1015 superio_dev_disable(device_t dev, uint8_t mask) 1016 { 1017 device_t sio_dev = device_get_parent(dev); 1018 struct siosc *sc = device_get_softc(sio_dev); 1019 struct superio_devinfo *dinfo = device_get_ivars(dev); 1020 uint8_t v; 1021 1022 /* GPIO device is always active in ITE chips. */ 1023 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 1024 return; 1025 1026 sio_conf_enter(sc); 1027 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 1028 v &= ~mask; 1029 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 1030 sio_conf_exit(sc); 1031 } 1032 1033 device_t 1034 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn) 1035 { 1036 struct siosc *sc = device_get_softc(superio); 1037 struct superio_devinfo *dinfo; 1038 1039 if (ldn < -1 || ldn > UINT8_MAX) 1040 return (NULL); /* ERANGE */ 1041 if (type == SUPERIO_DEV_NONE && ldn == -1) 1042 return (NULL); /* EINVAL */ 1043 1044 STAILQ_FOREACH(dinfo, &sc->devlist, link) { 1045 if (ldn != -1 && dinfo->ldn != ldn) 1046 continue; 1047 if (type != SUPERIO_DEV_NONE && dinfo->type != type) 1048 continue; 1049 return (dinfo->dev); 1050 } 1051 return (NULL); 1052 } 1053 1054 static int 1055 superio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, 1056 struct thread *td) 1057 { 1058 struct siosc *sc; 1059 struct superiocmd *s; 1060 1061 sc = dev->si_drv1; 1062 s = (struct superiocmd *)data; 1063 switch (cmd) { 1064 case SUPERIO_CR_READ: 1065 sio_conf_enter(sc); 1066 s->val = sio_ldn_read(sc, s->ldn, s->cr); 1067 sio_conf_exit(sc); 1068 return (0); 1069 case SUPERIO_CR_WRITE: 1070 sio_conf_enter(sc); 1071 sio_ldn_write(sc, s->ldn, s->cr, s->val); 1072 sio_conf_exit(sc); 1073 return (0); 1074 default: 1075 return (ENOTTY); 1076 } 1077 } 1078 1079 static device_method_t superio_methods[] = { 1080 DEVMETHOD(device_identify, superio_identify), 1081 DEVMETHOD(device_probe, superio_probe), 1082 DEVMETHOD(device_attach, superio_attach), 1083 DEVMETHOD(device_detach, superio_detach), 1084 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1085 DEVMETHOD(device_suspend, bus_generic_suspend), 1086 DEVMETHOD(device_resume, bus_generic_resume), 1087 1088 DEVMETHOD(bus_add_child, superio_add_child), 1089 DEVMETHOD(bus_child_detached, superio_child_detached), 1090 DEVMETHOD(bus_child_location, superio_child_location), 1091 DEVMETHOD(bus_child_pnpinfo, superio_child_pnp), 1092 DEVMETHOD(bus_print_child, superio_print_child), 1093 DEVMETHOD(bus_read_ivar, superio_read_ivar), 1094 DEVMETHOD(bus_write_ivar, superio_write_ivar), 1095 DEVMETHOD(bus_get_resource_list, superio_get_resource_list), 1096 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 1097 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 1098 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1099 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1100 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1101 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1102 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1103 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1104 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1105 1106 DEVMETHOD_END 1107 }; 1108 1109 static driver_t superio_driver = { 1110 "superio", 1111 superio_methods, 1112 sizeof(struct siosc) 1113 }; 1114 1115 DRIVER_MODULE(superio, isa, superio_driver, 0, 0); 1116 MODULE_VERSION(superio, 1); 1117