1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com> 5 * 6 * This work was supported by Innovate UK project 105694, "Digital Security 7 * by Design (DSbD) Technology Platform Prototype". 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/bus.h> 35 #include <sys/rman.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 39 #include <machine/bus.h> 40 41 #include <dev/fdt/simplebus.h> 42 #include <dev/fdt/fdt_common.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 45 #include "mmio_sram_if.h" 46 47 #define dprintf(fmt, ...) 48 49 static struct resource_spec mmio_sram_spec[] = { 50 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 51 { -1, 0 } 52 }; 53 54 struct mmio_sram_softc { 55 struct simplebus_softc simplebus_sc; 56 struct resource *res[1]; 57 device_t dev; 58 }; 59 60 static int 61 mmio_sram_probe(device_t dev) 62 { 63 64 if (!ofw_bus_is_compatible(dev, "mmio-sram")) 65 return (ENXIO); 66 67 if (!ofw_bus_status_okay(dev)) 68 return (ENXIO); 69 70 device_set_desc(dev, "MMIO SRAM"); 71 72 return (BUS_PROBE_DEFAULT); 73 } 74 75 static int 76 mmio_sram_attach(device_t dev) 77 { 78 struct mmio_sram_softc *sc; 79 phandle_t node; 80 81 sc = device_get_softc(dev); 82 sc->dev = dev; 83 84 if (bus_alloc_resources(dev, mmio_sram_spec, sc->res) != 0) { 85 device_printf(dev, "Can't allocate resources for device.\n"); 86 return (ENXIO); 87 } 88 89 node = ofw_bus_get_node(dev); 90 if (node == -1) 91 return (ENXIO); 92 93 simplebus_init(dev, node); 94 95 /* 96 * Allow devices to identify. 97 */ 98 bus_generic_probe(dev); 99 100 /* 101 * Now walk the OFW tree and attach top-level devices. 102 */ 103 for (node = OF_child(node); node > 0; node = OF_peer(node)) 104 simplebus_add_device(dev, node, 0, NULL, -1, NULL); 105 106 return (bus_generic_attach(dev)); 107 } 108 109 static int 110 mmio_sram_detach(device_t dev) 111 { 112 struct mmio_sram_softc *sc; 113 114 sc = device_get_softc(dev); 115 116 bus_release_resources(dev, mmio_sram_spec, sc->res); 117 118 return (0); 119 } 120 121 static uint8_t 122 mmio_sram_read_1(device_t dev, bus_size_t offset) 123 { 124 struct mmio_sram_softc *sc; 125 126 sc = device_get_softc(dev); 127 128 dprintf("%s: reading from %lx\n", __func__, offset); 129 130 return (bus_read_1(sc->res[0], offset)); 131 } 132 133 static void 134 mmio_sram_write_1(device_t dev, bus_size_t offset, uint8_t val) 135 { 136 struct mmio_sram_softc *sc; 137 138 sc = device_get_softc(dev); 139 140 dprintf("%s: writing to %lx val %x\n", __func__, offset, val); 141 142 bus_write_1(sc->res[0], offset, val); 143 } 144 145 static device_method_t mmio_sram_methods[] = { 146 /* Device Interface */ 147 DEVMETHOD(device_probe, mmio_sram_probe), 148 DEVMETHOD(device_attach, mmio_sram_attach), 149 DEVMETHOD(device_detach, mmio_sram_detach), 150 151 /* MMIO interface */ 152 DEVMETHOD(mmio_sram_read_1, mmio_sram_read_1), 153 DEVMETHOD(mmio_sram_write_1, mmio_sram_write_1), 154 DEVMETHOD_END 155 }; 156 157 DEFINE_CLASS_1(mmio_sram, mmio_sram_driver, mmio_sram_methods, 158 sizeof(struct mmio_sram_softc), simplebus_driver); 159 160 EARLY_DRIVER_MODULE(mmio_sram, simplebus, mmio_sram_driver, 0, 0, 161 BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE); 162 MODULE_VERSION(mmio_sram, 1); 163