xref: /freebsd/sys/dev/sound/pci/vibes.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1098ca2bdSWarner Losh /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni  *
4dfe67249SOrion Hodson  * Copyright (c) 2001 Orion Hodson <O.Hodson@cs.ucl.ac.uk>
5dfe67249SOrion Hodson  * All rights reserved.
6dfe67249SOrion Hodson  *
7dfe67249SOrion Hodson  * Redistribution and use in source and binary forms, with or without
8dfe67249SOrion Hodson  * modification, are permitted provided that the following conditions
9dfe67249SOrion Hodson  * are met:
10dfe67249SOrion Hodson  * 1. Redistributions of source code must retain the above copyright
11dfe67249SOrion Hodson  *    notice, this list of conditions and the following disclaimer.
12dfe67249SOrion Hodson  * 2. Redistributions in binary form must reproduce the above copyright
13dfe67249SOrion Hodson  *    notice, this list of conditions and the following disclaimer in the
14dfe67249SOrion Hodson  *    documentation and/or other materials provided with the distribution.
15dfe67249SOrion Hodson  *
16dfe67249SOrion Hodson  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17dfe67249SOrion Hodson  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18dfe67249SOrion Hodson  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19dfe67249SOrion Hodson  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20dfe67249SOrion Hodson  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21dfe67249SOrion Hodson  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22dfe67249SOrion Hodson  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23dfe67249SOrion Hodson  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24dfe67249SOrion Hodson  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25dfe67249SOrion Hodson  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26dfe67249SOrion Hodson  * SUCH DAMAGE.
27dfe67249SOrion Hodson  */
28dfe67249SOrion Hodson 
29dfe67249SOrion Hodson /* ------------------------------------------------------------------------- */
30dfe67249SOrion Hodson /* PCI Configuration Register Offsets */
31dfe67249SOrion Hodson 
32dfe67249SOrion Hodson #define SV_PCI_COMPAT	0x10
33dfe67249SOrion Hodson #define SV_PCI_ENHANCED 0x14
34dfe67249SOrion Hodson #define SV_PCI_FMSYNTH	0x18
35dfe67249SOrion Hodson #define SV_PCI_MIDI	0x1c
36dfe67249SOrion Hodson #define SV_PCI_GAMES	0x20
37dfe67249SOrion Hodson #define SV_PCI_DMAA	0x40
38dfe67249SOrion Hodson #define SV_PCI_DMAC	0x48
39dfe67249SOrion Hodson 
40dfe67249SOrion Hodson #define SV_PCI_DMAA_SIZE	0x10
41dfe67249SOrion Hodson #define SV_PCI_DMAA_ALIGN	0x10
42dfe67249SOrion Hodson #define SV_PCI_DMAC_SIZE	0x10
43dfe67249SOrion Hodson #define SV_PCI_DMAC_ALIGN	0x10
44dfe67249SOrion Hodson 
45dfe67249SOrion Hodson #define SV_PCI_ENHANCED_SIZE	0x08
46dfe67249SOrion Hodson 
47dfe67249SOrion Hodson #define SV_PCI_DMA_ENABLE	0x00000001
48dfe67249SOrion Hodson #define SV_PCI_DMA_EXTENDED	0x00000008
49dfe67249SOrion Hodson 
50dfe67249SOrion Hodson /* ------------------------------------------------------------------------- */
51dfe67249SOrion Hodson /* DMA Configuration Registers */
52dfe67249SOrion Hodson 
53dfe67249SOrion Hodson #define SV_DMA_ADDR	0x00
54dfe67249SOrion Hodson #define SV_DMA_COUNT	0x04
55dfe67249SOrion Hodson 
56dfe67249SOrion Hodson #define	SV_DMA_MODE	0x0B
57dfe67249SOrion Hodson #define 	SV_DMA_MODE_AUTO	0x10
58dfe67249SOrion Hodson #define		SV_DMA_MODE_RD		0x04
59dfe67249SOrion Hodson #define		SV_DMA_MODE_WR		0x08
60dfe67249SOrion Hodson 
61dfe67249SOrion Hodson /* ------------------------------------------------------------------------- */
62dfe67249SOrion Hodson /* Enhanced Mode Configuration Registers */
63dfe67249SOrion Hodson 
64dfe67249SOrion Hodson #define SV_CM_CONTROL	0x00
65dfe67249SOrion Hodson #define		SV_CM_CONTROL_ENHANCED	0x01
66dfe67249SOrion Hodson #define		SV_CM_CONTROL_TEST	0x02
67dfe67249SOrion Hodson #define		SV_CM_CONTROL_REVERB	0x04
68dfe67249SOrion Hodson #define		SV_CM_CONTROL_PWS	0x08
69dfe67249SOrion Hodson #define		SV_CM_CONTROL_INTA	0x20
70dfe67249SOrion Hodson #define		SV_CM_CONTROL_RESET	0x80
71dfe67249SOrion Hodson 
72dfe67249SOrion Hodson #define SV_CM_IMR	0x01
73dfe67249SOrion Hodson #define		SV_CM_IMR_AMSK		0x01
74dfe67249SOrion Hodson #define		SV_CM_IMR_CMSK		0x04
75dfe67249SOrion Hodson #define		SV_CM_IMR_SMSK		0x08
76dfe67249SOrion Hodson #define		SV_CM_IMR_UDM		0x40
77dfe67249SOrion Hodson #define		SV_CM_IMR_MIDM		0x80
78dfe67249SOrion Hodson 
79dfe67249SOrion Hodson #define SV_CM_STATUS	0x02
80dfe67249SOrion Hodson #define		SV_CM_STATUS_AINT	0x01
81dfe67249SOrion Hodson #define		SV_CM_STATUS_CINT	0x04
82dfe67249SOrion Hodson #define		SV_CM_STATUS_SINT	0x08
83dfe67249SOrion Hodson #define		SV_CM_STATUS_UDI	0x40
84dfe67249SOrion Hodson #define		SV_CM_STATUS_MI		0x80
85dfe67249SOrion Hodson 
86dfe67249SOrion Hodson #define SV_CM_INDEX	0x04
87dfe67249SOrion Hodson #define		SV_CM_INDEX_MASK	0x3f
88dfe67249SOrion Hodson #define		SV_CM_INDEX_MCE		0x40
89dfe67249SOrion Hodson #define		SV_CM_INDEX_TRD		0x80
90dfe67249SOrion Hodson 
91dfe67249SOrion Hodson #define SV_CM_DATA	0x05
92dfe67249SOrion Hodson 
93dfe67249SOrion Hodson /* ------------------------------------------------------------------------- */
94dfe67249SOrion Hodson /* Indexed Codec/Mixer Registers (left channels were applicable) */
95dfe67249SOrion Hodson 
96dfe67249SOrion Hodson #define SV_REG_ADC_INPUT	0x00
97dfe67249SOrion Hodson #define 	SV_INPUT_GAIN_MASK	0x0f
98dfe67249SOrion Hodson #define		SV_INPUT_MICGAIN	0x10
99dfe67249SOrion Hodson #define		SV_INPUT_CD		0x20
100dfe67249SOrion Hodson #define 	SV_INPUT_DAC		0x40
101dfe67249SOrion Hodson #define 	SV_INPUT_AUX2		0x60
102dfe67249SOrion Hodson #define 	SV_INPUT_LINE		0x80
103dfe67249SOrion Hodson #define 	SV_INPUT_AUX1		0xa0
104dfe67249SOrion Hodson #define 	SV_INPUT_MIC		0xc0
105dfe67249SOrion Hodson #define		SV_INPUT_MIXOUT		0xe0
106dfe67249SOrion Hodson 
107dfe67249SOrion Hodson #define	SV_REG_AUX1		0x02
108dfe67249SOrion Hodson #define	SV_REG_CD		0x04
109dfe67249SOrion Hodson #define	SV_REG_LINE		0x06
110dfe67249SOrion Hodson #define	SV_REG_MIC		0x08
111dfe67249SOrion Hodson #define	SV_REG_SYNTH		0x0a
112dfe67249SOrion Hodson #define	SV_REG_AUX2		0x0c
113dfe67249SOrion Hodson #define	SV_REG_MIX		0x0e
114dfe67249SOrion Hodson #define	SV_REG_PCM		0x10
115dfe67249SOrion Hodson #define		SV_DEFAULT_MAX		0x1f
116dfe67249SOrion Hodson #define		SV_ADC_MAX		0x0f
117dfe67249SOrion Hodson #define		SV_MIC_MAX		0x0f
118dfe67249SOrion Hodson #define 	SV_PCM_MAX		0x3f
119dfe67249SOrion Hodson #define 	SV_MUTE			0x80
120dfe67249SOrion Hodson 
121dfe67249SOrion Hodson #define SV_REG_FORMAT		0x12
122dfe67249SOrion Hodson #define		SV_AFMT_MONO	0x00
123dfe67249SOrion Hodson #define		SV_AFMT_STEREO	0x01
124dfe67249SOrion Hodson #define		SV_AFMT_S16	0x02
125dfe67249SOrion Hodson #define		SV_AFMT_U8	0x00
126dfe67249SOrion Hodson #define		SV_AFMT_DMAA(x)		(x)
127dfe67249SOrion Hodson #define		SV_AFMT_DMAA_MSK	0x03
128dfe67249SOrion Hodson #define		SV_AFMT_DMAC(x)		((x) << 4)
129dfe67249SOrion Hodson #define		SV_AFMT_DMAC_MSK	0x30
130dfe67249SOrion Hodson 
131dfe67249SOrion Hodson #define SV_REG_ENABLE		0x13
132dfe67249SOrion Hodson #define		SV_PLAY_ENABLE		0x01
133dfe67249SOrion Hodson #define		SV_RECORD_ENABLE	0x02
134dfe67249SOrion Hodson #define		SV_PLAYBACK_PAUSE	0x04
135dfe67249SOrion Hodson 
136dfe67249SOrion Hodson #define SV_REG_REVISION	0x15
137dfe67249SOrion Hodson 
138dfe67249SOrion Hodson #define SV_REG_LOOPBACK	0x16
139dfe67249SOrion Hodson #define		SV_LOOPBACK_ENABLE	0x01
140dfe67249SOrion Hodson #define		SV_LOOPBACK_MAX		0x3f
141dfe67249SOrion Hodson #define		SV_LOOPBACK_LEVEL(x)	((x) << 2)
142dfe67249SOrion Hodson 
143dfe67249SOrion Hodson #define	SV_REG_DMAA_COUNT_HI	0x18
144dfe67249SOrion Hodson #define	SV_REG_DMAA_COUNT_LO	0x19
145dfe67249SOrion Hodson #define	SV_REG_DMAC_COUNT_HI	0x1c
146dfe67249SOrion Hodson #define	SV_REG_DMAC_COUNT_LO	0x1d
147dfe67249SOrion Hodson 
148dfe67249SOrion Hodson #define SV_REG_PCM_SAMPLING_LO	0x1e
149dfe67249SOrion Hodson #define SV_REG_PCM_SAMPLING_HI	0x1f
150dfe67249SOrion Hodson 
151dfe67249SOrion Hodson #define SV_REG_SYN_SAMPLING_LO 	0x20
152dfe67249SOrion Hodson #define SV_REG_SYN_SAMPLING_HI 	0x21
153dfe67249SOrion Hodson 
154dfe67249SOrion Hodson #define SV_REG_CLOCK_SOURCE	0x22
155dfe67249SOrion Hodson #define		SV_CLOCK_ALTERNATE	0x10
156dfe67249SOrion Hodson #define SV_REG_ALT_RATE	0x23
157dfe67249SOrion Hodson 
158dfe67249SOrion Hodson #define SV_REG_ADC_PLLM	0x24
159dfe67249SOrion Hodson #define SV_REG_ADC_PLLN	0x25
160dfe67249SOrion Hodson #define 	SV_ADC_PLLN(x)		((x) & 0x1f)
161dfe67249SOrion Hodson #define		SV_ADC_PLLR(x)		((x) << 5)
162dfe67249SOrion Hodson 
163dfe67249SOrion Hodson #define SV_REG_SYNTH_PLLM	0x26
164dfe67249SOrion Hodson #define SV_REG_SYNTH_PLLN	0x27
165dfe67249SOrion Hodson #define 	SV_SYNTH_PLLN(x)	((x) & 0x1f)
166dfe67249SOrion Hodson #define		SV_SYNTH_PLLR(x)	((x) << 5)
167dfe67249SOrion Hodson 
168dfe67249SOrion Hodson #define SV_REG_SRS_SPACE	0x2c
169dfe67249SOrion Hodson #define		SV_SRS_SPACE_100	0x00
170dfe67249SOrion Hodson #define		SV_SRS_SPACE_75		0x01
171dfe67249SOrion Hodson #define		SV_SRS_SPACE_50		0x02
172dfe67249SOrion Hodson #define		SV_SRS_SPACE_25		0x03
173dfe67249SOrion Hodson #define		SV_SRS_SPACE_0		0x04
174dfe67249SOrion Hodson #define		SV_SRS_DISABLED		0x80
175dfe67249SOrion Hodson 
176dfe67249SOrion Hodson #define	SV_REG_SRS_CENTER	0x2d
177dfe67249SOrion Hodson #define		SV_SRS_CENTER_100	0x00
178dfe67249SOrion Hodson #define		SV_SRS_CENTER_75	0x01
179dfe67249SOrion Hodson #define		SV_SRS_CENTER_50	0x02
180dfe67249SOrion Hodson #define		SV_SRS_CENTER_25	0x03
181dfe67249SOrion Hodson #define		SV_SRS_CENTER_0		0x04
182dfe67249SOrion Hodson 
183dfe67249SOrion Hodson #define SV_REG_ANALOG_PWR	0x30
184dfe67249SOrion Hodson #define		SV_ANALOG_OFF_DAC	0x01
185dfe67249SOrion Hodson #define		SV_ANALOG_OFF_ADC	0x08
186dfe67249SOrion Hodson #define		SV_ANALOG_OFF_MIX	0x10
187dfe67249SOrion Hodson #define		SV_ANALOG_OFF_SRS	0x20
188dfe67249SOrion Hodson #define		SV_ANALOG_OFF_SPLL	0x40
189dfe67249SOrion Hodson #define		SV_ANALOG_OFF_APLL	0x80
190dfe67249SOrion Hodson #define		SV_ANALOG_OFF		0xf9
191dfe67249SOrion Hodson 
192dfe67249SOrion Hodson #define	SV_REG_DIGITAL_PWR	0x31
193dfe67249SOrion Hodson #define		SV_DIGITAL_OFF_SYN	0x01
194dfe67249SOrion Hodson #define		SV_DIGITAL_OFF_MU	0x02
195dfe67249SOrion Hodson #define		SV_DIGITAL_OFF_GP	0x04
196dfe67249SOrion Hodson #define		SV_DIGITAL_OFF_BI	0x08
197dfe67249SOrion Hodson #define		SV_DIGITAL_OFF		0x0f
198dfe67249SOrion Hodson 
199dfe67249SOrion Hodson /* ------------------------------------------------------------------------- */
200dfe67249SOrion Hodson /* ADC PLL constants */
201dfe67249SOrion Hodson 
202dfe67249SOrion Hodson #define		SV_F_SCALE		512
203dfe67249SOrion Hodson #define		SV_F_REF		24576000
204