1 /*- 2 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 3 * All rights reserved. 4 * 5 * Derived from the public domain Linux driver 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _NM256_H_ 32 #define _NM256_H_ 33 34 /* The BIOS signature. */ 35 #define NM_SIGNATURE 0x4e4d0000 36 /* Signature mask. */ 37 #define NM_SIG_MASK 0xffff0000 38 39 /* Size of the second memory area. */ 40 #define NM_PORT2_SIZE 4096 41 42 /* The base offset of the mixer in the second memory area. */ 43 #define NM_MIXER_OFFSET 0x600 44 45 /* The base offset for the AC97 test */ 46 #define NM_MIXER_PRESENCE 0xa06 47 #define NM_PRESENCE_MASK 0x050 48 #define NM_PRESENCE_VALUE 0x040 49 50 /* The maximum size of a coefficient entry. */ 51 #define NM_MAX_COEFFICIENT 0x5000 52 53 /* The interrupt register. */ 54 #define NM_INT_REG 0xa04 55 /* And its bits. */ 56 #define NM_PLAYBACK_INT 0x40 57 #define NM_RECORD_INT 0x100 58 #define NM_MISC_INT_1 0x4000 59 #define NM_MISC_INT_2 0x1 60 61 /* The AV's "mixer ready" status bit and location. */ 62 #define NM_MIXER_STATUS_OFFSET 0xa04 63 #define NM_MIXER_READY_MASK 0x0800 64 65 /* 66 * For the ZX. It uses the same interrupt register, but it holds 32 67 * bits instead of 16. 68 */ 69 #define NM2_PLAYBACK_INT 0x10000 70 #define NM2_RECORD_INT 0x80000 71 #define NM2_MISC_INT_1 0x8 72 #define NM2_MISC_INT_2 0x2 73 74 /* The ZX's "mixer ready" status bit and location. */ 75 #define NM2_MIXER_STATUS_OFFSET 0xa06 76 #define NM2_MIXER_READY_MASK 0x0800 77 78 /* The playback registers start from here. */ 79 #define NM_PLAYBACK_REG_OFFSET 0x0 80 /* The record registers start from here. */ 81 #define NM_RECORD_REG_OFFSET 0x200 82 83 /* The rate register is located 2 bytes from the start of the register area. */ 84 #define NM_RATE_REG_OFFSET 2 85 86 /* Mono/stereo flag, number of bits on playback, and rate mask. */ 87 #define NM_RATE_STEREO 1 88 #define NM_RATE_BITS_16 2 89 #define NM_RATE_MASK 0xf0 90 91 /* Playback enable register. */ 92 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1) 93 #define NM_PLAYBACK_ENABLE_FLAG 1 94 #define NM_PLAYBACK_ONESHOT 2 95 #define NM_PLAYBACK_FREERUN 4 96 97 /* Mutes the audio output. */ 98 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18) 99 #define NM_AUDIO_MUTE_LEFT 0x8000 100 #define NM_AUDIO_MUTE_RIGHT 0x0080 101 #define NM_AUDIO_MUTE_BOTH 0x8080 102 103 /* Recording enable register. */ 104 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0) 105 #define NM_RECORD_ENABLE_FLAG 1 106 #define NM_RECORD_FREERUN 2 107 108 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) 109 #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) 110 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) 111 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) 112 113 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) 114 #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) 115 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) 116 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) 117 118 119 #endif 120