1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012-2021 Ruslan Bukin <br@bsdpad.com> 5 * Copyright (c) 2023-2024 Florian Walpen <dev@submerge.ch> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * RME HDSP driver for FreeBSD (pcm-part). 32 * Supported cards: HDSP 9632, HDSP 9652. 33 */ 34 35 #include <sys/libkern.h> 36 37 #include <dev/sound/pcm/sound.h> 38 #include <dev/sound/pci/hdsp.h> 39 40 #include <dev/pci/pcireg.h> 41 #include <dev/pci/pcivar.h> 42 43 #include <mixer_if.h> 44 45 #define HDSP_MATRIX_MAX 8 46 47 struct hdsp_latency { 48 uint32_t n; 49 uint32_t period; 50 float ms; 51 }; 52 53 static struct hdsp_latency latency_map[] = { 54 { 7, 32, 0.7 }, 55 { 0, 64, 1.5 }, 56 { 1, 128, 3 }, 57 { 2, 256, 6 }, 58 { 3, 512, 12 }, 59 { 4, 1024, 23 }, 60 { 5, 2048, 46 }, 61 { 6, 4096, 93 }, 62 63 { 0, 0, 0 }, 64 }; 65 66 struct hdsp_rate { 67 uint32_t speed; 68 uint32_t reg; 69 }; 70 71 static struct hdsp_rate rate_map[] = { 72 { 32000, (HDSP_FREQ_32000) }, 73 { 44100, (HDSP_FREQ_44100) }, 74 { 48000, (HDSP_FREQ_48000) }, 75 { 64000, (HDSP_FREQ_32000 | HDSP_FREQ_DOUBLE) }, 76 { 88200, (HDSP_FREQ_44100 | HDSP_FREQ_DOUBLE) }, 77 { 96000, (HDSP_FREQ_48000 | HDSP_FREQ_DOUBLE) }, 78 { 128000, (HDSP_FREQ_32000 | HDSP_FREQ_QUAD) }, 79 { 176400, (HDSP_FREQ_44100 | HDSP_FREQ_QUAD) }, 80 { 192000, (HDSP_FREQ_48000 | HDSP_FREQ_QUAD) }, 81 82 { 0, 0 }, 83 }; 84 85 static uint32_t 86 hdsp_adat_slot_map(uint32_t speed) 87 { 88 /* ADAT slot bitmap depends on sample rate. */ 89 if (speed <= 48000) 90 return (0x000000ff); /* 8 channels single speed. */ 91 else if (speed <= 96000) 92 return (0x000000aa); /* 4 channels (1,3,5,7) double speed. */ 93 else 94 return (0x00000000); /* ADAT disabled at quad speed. */ 95 } 96 97 static uint32_t 98 hdsp_port_slot_map(uint32_t ports, uint32_t speed) 99 { 100 uint32_t slot_map = 0; 101 102 if (ports & HDSP_CHAN_9632_ALL) { 103 /* Map HDSP 9632 ports to slot bitmap. */ 104 if (ports & HDSP_CHAN_9632_ADAT) 105 slot_map |= (hdsp_adat_slot_map(speed) << 0); 106 if (ports & HDSP_CHAN_9632_SPDIF) 107 slot_map |= (0x03 << 8); /* 2 channels SPDIF. */ 108 if (ports & HDSP_CHAN_9632_LINE) 109 slot_map |= (0x03 << 10); /* 2 channels line. */ 110 if (ports & HDSP_CHAN_9632_EXT) 111 slot_map |= (0x0f << 12); /* 4 channels extension. */ 112 } else if ((ports & HDSP_CHAN_9652_ALL) && (speed <= 96000)) { 113 /* Map HDSP 9652 ports to slot bitmap, no quad speed. */ 114 if (ports & HDSP_CHAN_9652_ADAT1) 115 slot_map |= (hdsp_adat_slot_map(speed) << 0); 116 if (ports & HDSP_CHAN_9652_ADAT2) 117 slot_map |= (hdsp_adat_slot_map(speed) << 8); 118 if (ports & HDSP_CHAN_9652_ADAT3) 119 slot_map |= (hdsp_adat_slot_map(speed) << 16); 120 if (ports & HDSP_CHAN_9652_SPDIF) 121 slot_map |= (0x03 << 24); /* 2 channels SPDIF. */ 122 } 123 124 return (slot_map); 125 } 126 127 static uint32_t 128 hdsp_slot_first(uint32_t slots) 129 { 130 return (slots & (~(slots - 1))); /* Extract first bit set. */ 131 } 132 133 static uint32_t 134 hdsp_slot_first_row(uint32_t slots) 135 { 136 uint32_t ends; 137 138 /* Ends of slot rows are followed by a slot which is not in the set. */ 139 ends = slots & (~(slots >> 1)); 140 /* First row of contiguous slots ends in the first row end. */ 141 return (slots & (ends ^ (ends - 1))); 142 } 143 144 static uint32_t 145 hdsp_slot_first_n(uint32_t slots, unsigned int n) 146 { 147 /* Clear all but the first n slots. */ 148 for (uint32_t slot = 1; slot != 0; slot <<= 1) { 149 if ((slots & slot) && n > 0) 150 --n; 151 else 152 slots &= ~slot; 153 } 154 return (slots); 155 } 156 157 static unsigned int 158 hdsp_slot_count(uint32_t slots) 159 { 160 return (bitcount32(slots)); 161 } 162 163 static unsigned int 164 hdsp_slot_offset(uint32_t slots) 165 { 166 return (hdsp_slot_count(hdsp_slot_first(slots) - 1)); 167 } 168 169 static unsigned int 170 hdsp_slot_channel_offset(uint32_t subset, uint32_t slots) 171 { 172 uint32_t preceding; 173 174 /* Make sure we have a subset of slots. */ 175 subset &= slots; 176 /* Include all slots preceding the first one of the subset. */ 177 preceding = slots & (hdsp_slot_first(subset) - 1); 178 179 return (hdsp_slot_count(preceding)); 180 } 181 182 static uint32_t 183 hdsp_port_first(uint32_t ports) 184 { 185 return (ports & (~(ports - 1))); /* Extract first bit set. */ 186 } 187 188 static unsigned int 189 hdsp_port_slot_count(uint32_t ports, uint32_t speed) 190 { 191 return (hdsp_slot_count(hdsp_port_slot_map(ports, speed))); 192 } 193 194 static unsigned int 195 hdsp_port_slot_count_max(uint32_t ports) 196 { 197 return (hdsp_slot_count(hdsp_port_slot_map(ports, 48000))); 198 } 199 200 static uint32_t 201 hdsp_channel_play_ports(struct hdsp_channel *hc) 202 { 203 return (hc->ports & (HDSP_CHAN_9632_ALL | HDSP_CHAN_9652_ALL)); 204 } 205 206 static uint32_t 207 hdsp_channel_rec_ports(struct hdsp_channel *hc) 208 { 209 return (hc->ports & (HDSP_CHAN_9632_ALL | HDSP_CHAN_9652_ALL)); 210 } 211 212 static int 213 hdsp_hw_mixer(struct sc_chinfo *ch, unsigned int dst, 214 unsigned int src, unsigned short data) 215 { 216 struct sc_pcminfo *scp; 217 struct sc_info *sc; 218 uint32_t value; 219 int offset; 220 221 scp = ch->parent; 222 sc = scp->sc; 223 224 offset = 0; 225 value = (HDSP_MIN_GAIN << 16) | (uint16_t) data; 226 227 if (ch->dir != PCMDIR_PLAY) 228 return (0); 229 230 switch (sc->type) { 231 case HDSP_9632: 232 /* Mixer is 2 rows of sources (inputs, playback) per output. */ 233 offset = dst * (2 * HDSP_MIX_SLOTS_9632); 234 /* Source index in the second row (playback). */ 235 offset += HDSP_MIX_SLOTS_9632 + src; 236 break; 237 case HDSP_9652: 238 /* Mixer is 2 rows of sources (inputs, playback) per output. */ 239 offset = dst * (2 * HDSP_MIX_SLOTS_9652); 240 /* Source index in the second row (playback). */ 241 offset += HDSP_MIX_SLOTS_9652 + src; 242 break; 243 default: 244 return (0); 245 } 246 247 /* 248 * We have to write mixer matrix values in pairs, with the second 249 * (odd) value in the upper 16 bits of the 32 bit value. 250 * Make value offset even and shift value accordingly. 251 * Assume the paired value to be silenced, since we only set gain 252 * on the diagonal where src and dst are the same. 253 */ 254 if (offset % 2) { 255 offset -= 1; 256 value = (value << 16) | HDSP_MIN_GAIN; 257 } 258 259 hdsp_write_4(sc, HDSP_MIXER_BASE + offset * sizeof(uint16_t), value); 260 261 return (0); 262 }; 263 264 static int 265 hdspchan_setgain(struct sc_chinfo *ch) 266 { 267 uint32_t port, ports; 268 uint32_t slot, slots; 269 unsigned int offset; 270 unsigned short volume; 271 272 /* Iterate through all physical ports of the channel. */ 273 ports = ch->ports; 274 port = hdsp_port_first(ports); 275 while (port != 0) { 276 /* 277 * Get slot map from physical port. 278 * Unlike DMA buffers, the hardware mixer's channel mapping 279 * does not change with double or quad speed sample rates. 280 */ 281 slots = hdsp_port_slot_map(port, 48000); 282 slot = hdsp_slot_first(slots); 283 284 /* Treat first slot as left channel. */ 285 volume = ch->lvol * HDSP_MAX_GAIN / 100; 286 while (slot != 0) { 287 offset = hdsp_slot_offset(slot); 288 hdsp_hw_mixer(ch, offset, offset, volume); 289 290 slots &= ~slot; 291 slot = hdsp_slot_first(slots); 292 293 /* Subsequent slots all get the right channel volume. */ 294 volume = ch->rvol * HDSP_MAX_GAIN / 100; 295 } 296 297 ports &= ~port; 298 port = hdsp_port_first(ports); 299 } 300 301 return (0); 302 } 303 304 static int 305 hdspmixer_init(struct snd_mixer *m) 306 { 307 struct sc_pcminfo *scp; 308 struct sc_info *sc; 309 int mask; 310 311 scp = mix_getdevinfo(m); 312 sc = scp->sc; 313 if (sc == NULL) 314 return (-1); 315 316 mask = SOUND_MASK_PCM; 317 318 if (hdsp_channel_play_ports(scp->hc)) 319 mask |= SOUND_MASK_VOLUME; 320 321 if (hdsp_channel_rec_ports(scp->hc)) 322 mask |= SOUND_MASK_RECLEV; 323 324 snd_mtxlock(sc->lock); 325 pcm_setflags(scp->dev, pcm_getflags(scp->dev) | SD_F_SOFTPCMVOL); 326 mix_setdevs(m, mask); 327 snd_mtxunlock(sc->lock); 328 329 return (0); 330 } 331 332 static int 333 hdspmixer_set(struct snd_mixer *m, unsigned dev, 334 unsigned left, unsigned right) 335 { 336 struct sc_pcminfo *scp; 337 struct sc_chinfo *ch; 338 int i; 339 340 scp = mix_getdevinfo(m); 341 342 #if 0 343 device_printf(scp->dev, "hdspmixer_set() %d %d\n", 344 left, right); 345 #endif 346 347 for (i = 0; i < scp->chnum; i++) { 348 ch = &scp->chan[i]; 349 if ((dev == SOUND_MIXER_VOLUME && ch->dir == PCMDIR_PLAY) || 350 (dev == SOUND_MIXER_RECLEV && ch->dir == PCMDIR_REC)) { 351 ch->lvol = left; 352 ch->rvol = right; 353 if (ch->run) 354 hdspchan_setgain(ch); 355 } 356 } 357 358 return (0); 359 } 360 361 static kobj_method_t hdspmixer_methods[] = { 362 KOBJMETHOD(mixer_init, hdspmixer_init), 363 KOBJMETHOD(mixer_set, hdspmixer_set), 364 KOBJMETHOD_END 365 }; 366 MIXER_DECLARE(hdspmixer); 367 368 static void 369 hdspchan_enable(struct sc_chinfo *ch, int value) 370 { 371 struct sc_pcminfo *scp; 372 struct sc_info *sc; 373 uint32_t slot, slots; 374 unsigned int offset; 375 int reg; 376 377 scp = ch->parent; 378 sc = scp->sc; 379 380 if (ch->dir == PCMDIR_PLAY) 381 reg = HDSP_OUT_ENABLE_BASE; 382 else 383 reg = HDSP_IN_ENABLE_BASE; 384 385 ch->run = value; 386 387 /* Iterate through all slots of the channel's physical ports. */ 388 slots = hdsp_port_slot_map(ch->ports, sc->speed); 389 slot = hdsp_slot_first(slots); 390 while (slot != 0) { 391 /* Set register to enable or disable slot. */ 392 offset = hdsp_slot_offset(slot); 393 hdsp_write_1(sc, reg + (4 * offset), value); 394 395 slots &= ~slot; 396 slot = hdsp_slot_first(slots); 397 } 398 } 399 400 static int 401 hdsp_running(struct sc_info *sc) 402 { 403 struct sc_pcminfo *scp; 404 struct sc_chinfo *ch; 405 device_t *devlist; 406 int devcount; 407 int i, j; 408 int running; 409 410 running = 0; 411 412 devlist = NULL; 413 devcount = 0; 414 415 if (device_get_children(sc->dev, &devlist, &devcount) != 0) 416 running = 1; /* On error, avoid channel config changes. */ 417 418 for (i = 0; running == 0 && i < devcount; i++) { 419 scp = device_get_ivars(devlist[i]); 420 for (j = 0; j < scp->chnum; j++) { 421 ch = &scp->chan[j]; 422 if (ch->run) { 423 running = 1; 424 break; 425 } 426 } 427 } 428 429 #if 0 430 if (running == 1) 431 device_printf(sc->dev, "hdsp is running\n"); 432 #endif 433 434 free(devlist, M_TEMP); 435 436 return (running); 437 } 438 439 static void 440 hdsp_start_audio(struct sc_info *sc) 441 { 442 443 sc->ctrl_register |= (HDSP_AUDIO_INT_ENABLE | HDSP_ENABLE); 444 hdsp_write_4(sc, HDSP_CONTROL_REG, sc->ctrl_register); 445 } 446 447 static void 448 hdsp_stop_audio(struct sc_info *sc) 449 { 450 451 if (hdsp_running(sc) == 1) 452 return; 453 454 sc->ctrl_register &= ~(HDSP_AUDIO_INT_ENABLE | HDSP_ENABLE); 455 hdsp_write_4(sc, HDSP_CONTROL_REG, sc->ctrl_register); 456 } 457 458 static void 459 buffer_mux_write(uint32_t *dma, uint32_t *pcm, unsigned int pos, 460 unsigned int pos_end, unsigned int width, unsigned int channels) 461 { 462 unsigned int slot; 463 464 for (; pos < pos_end; ++pos) { 465 for (slot = 0; slot < width; slot++) { 466 dma[slot * HDSP_CHANBUF_SAMPLES + pos] = 467 pcm[pos * channels + slot]; 468 } 469 } 470 } 471 472 static void 473 buffer_mux_port(uint32_t *dma, uint32_t *pcm, uint32_t subset, uint32_t slots, 474 unsigned int pos, unsigned int samples, unsigned int channels) 475 { 476 unsigned int slot_offset, width; 477 unsigned int chan_pos; 478 479 /* Translate DMA slot offset to DMA buffer offset. */ 480 slot_offset = hdsp_slot_offset(subset); 481 dma += slot_offset * HDSP_CHANBUF_SAMPLES; 482 483 /* Channel position of the slot subset. */ 484 chan_pos = hdsp_slot_channel_offset(subset, slots); 485 pcm += chan_pos; 486 487 /* Only copy channels supported by both hardware and pcm format. */ 488 width = hdsp_slot_count(subset); 489 490 /* Let the compiler inline and loop unroll common cases. */ 491 if (width == 1) 492 buffer_mux_write(dma, pcm, pos, pos + samples, 1, channels); 493 else if (width == 2) 494 buffer_mux_write(dma, pcm, pos, pos + samples, 2, channels); 495 else if (width == 4) 496 buffer_mux_write(dma, pcm, pos, pos + samples, 4, channels); 497 else if (width == 8) 498 buffer_mux_write(dma, pcm, pos, pos + samples, 8, channels); 499 else 500 buffer_mux_write(dma, pcm, pos, pos + samples, width, channels); 501 } 502 503 static void 504 buffer_demux_read(uint32_t *dma, uint32_t *pcm, unsigned int pos, 505 unsigned int pos_end, unsigned int width, unsigned int channels) 506 { 507 unsigned int slot; 508 509 for (; pos < pos_end; ++pos) { 510 for (slot = 0; slot < width; slot++) { 511 pcm[pos * channels + slot] = 512 dma[slot * HDSP_CHANBUF_SAMPLES + pos]; 513 } 514 } 515 } 516 517 static void 518 buffer_demux_port(uint32_t *dma, uint32_t *pcm, uint32_t subset, uint32_t slots, 519 unsigned int pos, unsigned int samples, unsigned int channels) 520 { 521 unsigned int slot_offset, width; 522 unsigned int chan_pos; 523 524 /* Translate DMA slot offset to DMA buffer offset. */ 525 slot_offset = hdsp_slot_offset(subset); 526 dma += slot_offset * HDSP_CHANBUF_SAMPLES; 527 528 /* Channel position of the slot subset. */ 529 chan_pos = hdsp_slot_channel_offset(subset, slots); 530 pcm += chan_pos; 531 532 /* Only copy channels supported by both hardware and pcm format. */ 533 width = hdsp_slot_count(subset); 534 535 /* Let the compiler inline and loop unroll common cases. */ 536 if (width == 1) 537 buffer_demux_read(dma, pcm, pos, pos + samples, 1, channels); 538 else if (width == 2) 539 buffer_demux_read(dma, pcm, pos, pos + samples, 2, channels); 540 else if (width == 4) 541 buffer_demux_read(dma, pcm, pos, pos + samples, 4, channels); 542 else if (width == 8) 543 buffer_demux_read(dma, pcm, pos, pos + samples, 8, channels); 544 else 545 buffer_demux_read(dma, pcm, pos, pos + samples, width, channels); 546 } 547 548 549 /* Copy data between DMA and PCM buffers. */ 550 static void 551 buffer_copy(struct sc_chinfo *ch) 552 { 553 struct sc_pcminfo *scp; 554 struct sc_info *sc; 555 uint32_t row, slots; 556 uint32_t dma_pos; 557 unsigned int pos, length, remainder, offset, buffer_size; 558 unsigned int channels; 559 560 scp = ch->parent; 561 sc = scp->sc; 562 563 channels = AFMT_CHANNEL(ch->format); /* Number of PCM channels. */ 564 565 /* HDSP cards read / write a double buffer, twice the latency period. */ 566 buffer_size = 2 * sc->period * sizeof(uint32_t); 567 568 /* Derive buffer position and length to be copied. */ 569 if (ch->dir == PCMDIR_PLAY) { 570 /* Buffer position scaled down to a single channel. */ 571 pos = sndbuf_getreadyptr(ch->buffer) / channels; 572 length = sndbuf_getready(ch->buffer) / channels; 573 /* Copy no more than 2 periods in advance. */ 574 if (length > buffer_size) 575 length = buffer_size; 576 /* Skip what was already copied last time. */ 577 offset = (ch->position + buffer_size) - pos; 578 offset %= buffer_size; 579 if (offset <= length) { 580 pos = (pos + offset) % buffer_size; 581 length -= offset; 582 } 583 } else { 584 /* Buffer position scaled down to a single channel. */ 585 pos = sndbuf_getfreeptr(ch->buffer) / channels; 586 /* Get DMA buffer write position. */ 587 dma_pos = hdsp_read_2(sc, HDSP_STATUS_REG); 588 dma_pos &= HDSP_BUF_POSITION_MASK; 589 dma_pos %= buffer_size; 590 /* Copy what is newly available. */ 591 length = (dma_pos + buffer_size) - pos; 592 length %= buffer_size; 593 } 594 595 /* Position and length in samples (4 bytes). */ 596 pos /= 4; 597 length /= 4; 598 buffer_size /= sizeof(uint32_t); 599 600 /* Split copy length to wrap around at buffer end. */ 601 remainder = 0; 602 if (pos + length > buffer_size) 603 remainder = (pos + length) - buffer_size; 604 605 /* Iterate through rows of contiguous slots. */ 606 slots = hdsp_port_slot_map(ch->ports, sc->speed); 607 slots = hdsp_slot_first_n(slots, channels); 608 row = hdsp_slot_first_row(slots); 609 610 while (row != 0) { 611 if (ch->dir == PCMDIR_PLAY) { 612 buffer_mux_port(sc->pbuf, ch->data, row, slots, pos, 613 length - remainder, channels); 614 buffer_mux_port(sc->pbuf, ch->data, row, slots, 0, 615 remainder, channels); 616 } else { 617 buffer_demux_port(sc->rbuf, ch->data, row, slots, pos, 618 length - remainder, channels); 619 buffer_demux_port(sc->rbuf, ch->data, row, slots, 0, 620 remainder, channels); 621 } 622 623 slots &= ~row; 624 row = hdsp_slot_first_row(slots); 625 } 626 627 ch->position = ((pos + length) * 4) % buffer_size; 628 } 629 630 static int 631 clean(struct sc_chinfo *ch) 632 { 633 struct sc_pcminfo *scp; 634 struct sc_info *sc; 635 uint32_t *buf; 636 uint32_t slot, slots; 637 unsigned int offset; 638 639 scp = ch->parent; 640 sc = scp->sc; 641 buf = sc->rbuf; 642 643 if (ch->dir == PCMDIR_PLAY) 644 buf = sc->pbuf; 645 646 /* Iterate through all of the channel's slots. */ 647 slots = hdsp_port_slot_map(ch->ports, sc->speed); 648 slot = hdsp_slot_first(slots); 649 while (slot != 0) { 650 /* Clear the slot's buffer. */ 651 offset = hdsp_slot_offset(slot); 652 bzero(buf + offset * HDSP_CHANBUF_SAMPLES, HDSP_CHANBUF_SIZE); 653 654 slots &= ~slot; 655 slot = hdsp_slot_first(slots); 656 } 657 658 ch->position = 0; 659 660 return (0); 661 } 662 663 /* Channel interface. */ 664 static int 665 hdspchan_free(kobj_t obj, void *data) 666 { 667 struct sc_pcminfo *scp; 668 struct sc_chinfo *ch; 669 struct sc_info *sc; 670 671 ch = data; 672 scp = ch->parent; 673 sc = scp->sc; 674 675 #if 0 676 device_printf(scp->dev, "hdspchan_free()\n"); 677 #endif 678 679 snd_mtxlock(sc->lock); 680 if (ch->data != NULL) { 681 free(ch->data, M_HDSP); 682 ch->data = NULL; 683 } 684 if (ch->caps != NULL) { 685 free(ch->caps, M_HDSP); 686 ch->caps = NULL; 687 } 688 snd_mtxunlock(sc->lock); 689 690 return (0); 691 } 692 693 static void * 694 hdspchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 695 struct pcm_channel *c, int dir) 696 { 697 struct sc_pcminfo *scp; 698 struct sc_chinfo *ch; 699 struct sc_info *sc; 700 int num; 701 702 scp = devinfo; 703 sc = scp->sc; 704 705 snd_mtxlock(sc->lock); 706 num = scp->chnum; 707 708 ch = &scp->chan[num]; 709 710 if (dir == PCMDIR_PLAY) 711 ch->ports = hdsp_channel_play_ports(scp->hc); 712 else 713 ch->ports = hdsp_channel_rec_ports(scp->hc); 714 715 ch->run = 0; 716 ch->lvol = 0; 717 ch->rvol = 0; 718 719 /* Support all possible ADAT widths as channel formats. */ 720 ch->cap_fmts[0] = 721 SND_FORMAT(AFMT_S32_LE, hdsp_port_slot_count(ch->ports, 48000), 0); 722 ch->cap_fmts[1] = 723 SND_FORMAT(AFMT_S32_LE, hdsp_port_slot_count(ch->ports, 96000), 0); 724 ch->cap_fmts[2] = 725 SND_FORMAT(AFMT_S32_LE, hdsp_port_slot_count(ch->ports, 192000), 0); 726 ch->cap_fmts[3] = 0; 727 728 ch->caps = malloc(sizeof(struct pcmchan_caps), M_HDSP, M_NOWAIT); 729 *(ch->caps) = (struct pcmchan_caps) {32000, 192000, ch->cap_fmts, 0}; 730 731 /* HDSP 9652 does not support quad speed sample rates. */ 732 if (sc->type == HDSP_9652) { 733 ch->cap_fmts[2] = SND_FORMAT(AFMT_S32_LE, 2, 0); 734 ch->caps->maxspeed = 96000; 735 } 736 737 /* Allocate maximum buffer size. */ 738 ch->size = HDSP_CHANBUF_SIZE * hdsp_port_slot_count_max(ch->ports); 739 ch->data = malloc(ch->size, M_HDSP, M_NOWAIT); 740 ch->position = 0; 741 742 ch->buffer = b; 743 ch->channel = c; 744 ch->parent = scp; 745 746 ch->dir = dir; 747 748 snd_mtxunlock(sc->lock); 749 750 if (sndbuf_setup(ch->buffer, ch->data, ch->size) != 0) { 751 device_printf(scp->dev, "Can't setup sndbuf.\n"); 752 hdspchan_free(obj, ch); 753 return (NULL); 754 } 755 756 return (ch); 757 } 758 759 static int 760 hdspchan_trigger(kobj_t obj, void *data, int go) 761 { 762 struct sc_pcminfo *scp; 763 struct sc_chinfo *ch; 764 struct sc_info *sc; 765 766 ch = data; 767 scp = ch->parent; 768 sc = scp->sc; 769 770 snd_mtxlock(sc->lock); 771 switch (go) { 772 case PCMTRIG_START: 773 #if 0 774 device_printf(scp->dev, "hdspchan_trigger(): start\n"); 775 #endif 776 hdspchan_enable(ch, 1); 777 hdspchan_setgain(ch); 778 hdsp_start_audio(sc); 779 break; 780 781 case PCMTRIG_STOP: 782 case PCMTRIG_ABORT: 783 #if 0 784 device_printf(scp->dev, "hdspchan_trigger(): stop or abort\n"); 785 #endif 786 clean(ch); 787 hdspchan_enable(ch, 0); 788 hdsp_stop_audio(sc); 789 break; 790 791 case PCMTRIG_EMLDMAWR: 792 case PCMTRIG_EMLDMARD: 793 if(ch->run) 794 buffer_copy(ch); 795 break; 796 } 797 798 snd_mtxunlock(sc->lock); 799 800 return (0); 801 } 802 803 static uint32_t 804 hdspchan_getptr(kobj_t obj, void *data) 805 { 806 struct sc_pcminfo *scp; 807 struct sc_chinfo *ch; 808 struct sc_info *sc; 809 uint32_t ret, pos; 810 811 ch = data; 812 scp = ch->parent; 813 sc = scp->sc; 814 815 snd_mtxlock(sc->lock); 816 ret = hdsp_read_2(sc, HDSP_STATUS_REG); 817 snd_mtxunlock(sc->lock); 818 819 pos = ret & HDSP_BUF_POSITION_MASK; 820 pos %= (2 * sc->period * sizeof(uint32_t)); /* Double buffer. */ 821 pos *= AFMT_CHANNEL(ch->format); /* Hardbuf with multiple channels. */ 822 823 return (pos); 824 } 825 826 static int 827 hdspchan_setformat(kobj_t obj, void *data, uint32_t format) 828 { 829 struct sc_chinfo *ch; 830 831 ch = data; 832 833 #if 0 834 struct sc_pcminfo *scp = ch->parent; 835 device_printf(scp->dev, "hdspchan_setformat(%d)\n", format); 836 #endif 837 838 ch->format = format; 839 840 return (0); 841 } 842 843 static uint32_t 844 hdspchan_setspeed(kobj_t obj, void *data, uint32_t speed) 845 { 846 struct sc_pcminfo *scp; 847 struct hdsp_rate *hr; 848 struct sc_chinfo *ch; 849 struct sc_info *sc; 850 int threshold; 851 int i; 852 853 ch = data; 854 scp = ch->parent; 855 sc = scp->sc; 856 hr = NULL; 857 858 #if 0 859 device_printf(scp->dev, "hdspchan_setspeed(%d)\n", speed); 860 #endif 861 862 if (hdsp_running(sc) == 1) 863 goto end; 864 865 /* HDSP 9652 only supports sample rates up to 96kHz. */ 866 if (sc->type == HDSP_9652 && speed > 96000) 867 speed = 96000; 868 869 if (sc->force_speed > 0) 870 speed = sc->force_speed; 871 872 /* First look for equal frequency. */ 873 for (i = 0; rate_map[i].speed != 0; i++) { 874 if (rate_map[i].speed == speed) 875 hr = &rate_map[i]; 876 } 877 878 /* If no match, just find nearest. */ 879 if (hr == NULL) { 880 for (i = 0; rate_map[i].speed != 0; i++) { 881 hr = &rate_map[i]; 882 threshold = hr->speed + ((rate_map[i + 1].speed != 0) ? 883 ((rate_map[i + 1].speed - hr->speed) >> 1) : 0); 884 if (speed < threshold) 885 break; 886 } 887 } 888 889 /* Write frequency on the device. */ 890 sc->ctrl_register &= ~HDSP_FREQ_MASK; 891 sc->ctrl_register |= hr->reg; 892 hdsp_write_4(sc, HDSP_CONTROL_REG, sc->ctrl_register); 893 894 if (sc->type == HDSP_9632) { 895 /* Set DDS value. */ 896 hdsp_write_4(sc, HDSP_FREQ_REG, hdsp_freq_reg_value(hr->speed)); 897 } 898 899 sc->speed = hr->speed; 900 end: 901 902 return (sc->speed); 903 } 904 905 static uint32_t 906 hdspchan_setblocksize(kobj_t obj, void *data, uint32_t blocksize) 907 { 908 struct hdsp_latency *hl; 909 struct sc_pcminfo *scp; 910 struct sc_chinfo *ch; 911 struct sc_info *sc; 912 int threshold; 913 int i; 914 915 ch = data; 916 scp = ch->parent; 917 sc = scp->sc; 918 hl = NULL; 919 920 #if 0 921 device_printf(scp->dev, "hdspchan_setblocksize(%d)\n", blocksize); 922 #endif 923 924 if (hdsp_running(sc) == 1) 925 goto end; 926 927 if (blocksize > HDSP_LAT_BYTES_MAX) 928 blocksize = HDSP_LAT_BYTES_MAX; 929 else if (blocksize < HDSP_LAT_BYTES_MIN) 930 blocksize = HDSP_LAT_BYTES_MIN; 931 932 blocksize /= 4 /* samples */; 933 934 if (sc->force_period > 0) 935 blocksize = sc->force_period; 936 937 /* First look for equal latency. */ 938 for (i = 0; latency_map[i].period != 0; i++) { 939 if (latency_map[i].period == blocksize) 940 hl = &latency_map[i]; 941 } 942 943 /* If no match, just find nearest. */ 944 if (hl == NULL) { 945 for (i = 0; latency_map[i].period != 0; i++) { 946 hl = &latency_map[i]; 947 threshold = hl->period + ((latency_map[i + 1].period != 0) ? 948 ((latency_map[i + 1].period - hl->period) >> 1) : 0); 949 if (blocksize < threshold) 950 break; 951 } 952 } 953 954 snd_mtxlock(sc->lock); 955 sc->ctrl_register &= ~HDSP_LAT_MASK; 956 sc->ctrl_register |= hdsp_encode_latency(hl->n); 957 hdsp_write_4(sc, HDSP_CONTROL_REG, sc->ctrl_register); 958 sc->period = hl->period; 959 snd_mtxunlock(sc->lock); 960 961 #if 0 962 device_printf(scp->dev, "New period=%d\n", sc->period); 963 #endif 964 965 sndbuf_resize(ch->buffer, 2, 966 (sc->period * AFMT_CHANNEL(ch->format) * sizeof(uint32_t))); 967 968 /* Reset pointer, rewrite frequency (same register) for 9632. */ 969 hdsp_write_4(sc, HDSP_RESET_POINTER, 0); 970 if (sc->type == HDSP_9632) 971 hdsp_write_4(sc, HDSP_FREQ_REG, hdsp_freq_reg_value(sc->speed)); 972 end: 973 974 return (sndbuf_getblksz(ch->buffer)); 975 } 976 977 static uint32_t hdsp_bkp_fmt[] = { 978 SND_FORMAT(AFMT_S32_LE, 2, 0), 979 0 980 }; 981 982 /* Capabilities fallback, no quad speed for HDSP 9652 compatibility. */ 983 static struct pcmchan_caps hdsp_bkp_caps = {32000, 96000, hdsp_bkp_fmt, 0}; 984 985 static struct pcmchan_caps * 986 hdspchan_getcaps(kobj_t obj, void *data) 987 { 988 struct sc_chinfo *ch; 989 990 ch = data; 991 992 #if 0 993 device_printf(ch->parent->dev, "hdspchan_getcaps()\n"); 994 #endif 995 996 if (ch->caps != NULL) 997 return (ch->caps); 998 999 return (&hdsp_bkp_caps); 1000 } 1001 1002 static kobj_method_t hdspchan_methods[] = { 1003 KOBJMETHOD(channel_init, hdspchan_init), 1004 KOBJMETHOD(channel_free, hdspchan_free), 1005 KOBJMETHOD(channel_setformat, hdspchan_setformat), 1006 KOBJMETHOD(channel_setspeed, hdspchan_setspeed), 1007 KOBJMETHOD(channel_setblocksize, hdspchan_setblocksize), 1008 KOBJMETHOD(channel_trigger, hdspchan_trigger), 1009 KOBJMETHOD(channel_getptr, hdspchan_getptr), 1010 KOBJMETHOD(channel_getcaps, hdspchan_getcaps), 1011 KOBJMETHOD_END 1012 }; 1013 CHANNEL_DECLARE(hdspchan); 1014 1015 static int 1016 hdsp_pcm_probe(device_t dev) 1017 { 1018 1019 #if 0 1020 device_printf(dev,"hdsp_pcm_probe()\n"); 1021 #endif 1022 1023 return (0); 1024 } 1025 1026 static uint32_t 1027 hdsp_pcm_intr(struct sc_pcminfo *scp) 1028 { 1029 struct sc_chinfo *ch; 1030 struct sc_info *sc; 1031 int i; 1032 1033 sc = scp->sc; 1034 1035 for (i = 0; i < scp->chnum; i++) { 1036 ch = &scp->chan[i]; 1037 snd_mtxunlock(sc->lock); 1038 chn_intr(ch->channel); 1039 snd_mtxlock(sc->lock); 1040 } 1041 1042 return (0); 1043 } 1044 1045 static int 1046 hdsp_pcm_attach(device_t dev) 1047 { 1048 char status[SND_STATUSLEN]; 1049 struct sc_pcminfo *scp; 1050 const char *buf; 1051 uint32_t pcm_flags; 1052 int err; 1053 int play, rec; 1054 1055 scp = device_get_ivars(dev); 1056 scp->ih = &hdsp_pcm_intr; 1057 1058 if (scp->hc->ports & HDSP_CHAN_9632_ALL) 1059 buf = "9632"; 1060 else if (scp->hc->ports & HDSP_CHAN_9652_ALL) 1061 buf = "9652"; 1062 else 1063 buf = "?"; 1064 device_set_descf(dev, "HDSP %s [%s]", buf, scp->hc->descr); 1065 1066 /* 1067 * We don't register interrupt handler with snd_setup_intr 1068 * in pcm device. Mark pcm device as MPSAFE manually. 1069 */ 1070 pcm_flags = pcm_getflags(dev) | SD_F_MPSAFE; 1071 if (hdsp_port_slot_count_max(scp->hc->ports) > HDSP_MATRIX_MAX) 1072 /* Disable vchan conversion, too many channels. */ 1073 pcm_flags |= SD_F_BITPERFECT; 1074 pcm_setflags(dev, pcm_flags); 1075 1076 play = (hdsp_channel_play_ports(scp->hc)) ? 1 : 0; 1077 rec = (hdsp_channel_rec_ports(scp->hc)) ? 1 : 0; 1078 err = pcm_register(dev, scp, play, rec); 1079 if (err) { 1080 device_printf(dev, "Can't register pcm.\n"); 1081 return (ENXIO); 1082 } 1083 1084 scp->chnum = 0; 1085 if (play) { 1086 pcm_addchan(dev, PCMDIR_PLAY, &hdspchan_class, scp); 1087 scp->chnum++; 1088 } 1089 1090 if (rec) { 1091 pcm_addchan(dev, PCMDIR_REC, &hdspchan_class, scp); 1092 scp->chnum++; 1093 } 1094 1095 snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", 1096 rman_get_start(scp->sc->cs), 1097 rman_get_start(scp->sc->irq), 1098 device_get_nameunit(device_get_parent(dev))); 1099 pcm_setstatus(dev, status); 1100 1101 mixer_init(dev, &hdspmixer_class, scp); 1102 1103 return (0); 1104 } 1105 1106 static int 1107 hdsp_pcm_detach(device_t dev) 1108 { 1109 int err; 1110 1111 err = pcm_unregister(dev); 1112 if (err) { 1113 device_printf(dev, "Can't unregister device.\n"); 1114 return (err); 1115 } 1116 1117 return (0); 1118 } 1119 1120 static device_method_t hdsp_pcm_methods[] = { 1121 DEVMETHOD(device_probe, hdsp_pcm_probe), 1122 DEVMETHOD(device_attach, hdsp_pcm_attach), 1123 DEVMETHOD(device_detach, hdsp_pcm_detach), 1124 { 0, 0 } 1125 }; 1126 1127 static driver_t hdsp_pcm_driver = { 1128 "pcm", 1129 hdsp_pcm_methods, 1130 PCM_SOFTC_SIZE, 1131 }; 1132 1133 DRIVER_MODULE(snd_hdsp_pcm, hdsp, hdsp_pcm_driver, 0, 0); 1134 MODULE_DEPEND(snd_hdsp, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1135 MODULE_VERSION(snd_hdsp, 1); 1136