1 /*- 2 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca> 3 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org> 4 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Intel High Definition Audio (CODEC) driver for FreeBSD. 31 */ 32 33 #ifdef HAVE_KERNEL_OPTION_HEADERS 34 #include "opt_snd.h" 35 #endif 36 37 #include <dev/sound/pcm/sound.h> 38 39 #include <sys/ctype.h> 40 41 #include <dev/sound/pci/hda/hda_reg.h> 42 #include <dev/sound/pci/hda/hdac.h> 43 44 SND_DECLARE_FILE("$FreeBSD$"); 45 46 struct hdacc_fg { 47 device_t dev; 48 nid_t nid; 49 uint8_t type; 50 uint32_t subsystem_id; 51 }; 52 53 struct hdacc_softc { 54 device_t dev; 55 struct mtx *lock; 56 nid_t cad; 57 device_t streams[2][16]; 58 device_t tags[64]; 59 int fgcnt; 60 struct hdacc_fg *fgs; 61 }; 62 63 #define hdacc_lock(codec) snd_mtxlock((codec)->lock) 64 #define hdacc_unlock(codec) snd_mtxunlock((codec)->lock) 65 #define hdacc_lockassert(codec) snd_mtxassert((codec)->lock) 66 #define hdacc_lockowned(codec) mtx_owned((codec)->lock) 67 68 MALLOC_DEFINE(M_HDACC, "hdacc", "HDA CODEC"); 69 70 /* CODECs */ 71 static const struct { 72 uint32_t id; 73 uint16_t revid; 74 const char *name; 75 } hdacc_codecs[] = { 76 { HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" }, 77 { HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" }, 78 { HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" }, 79 { HDA_CODEC_ALC221, 0, "Realtek ALC221" }, 80 { HDA_CODEC_ALC260, 0, "Realtek ALC260" }, 81 { HDA_CODEC_ALC262, 0, "Realtek ALC262" }, 82 { HDA_CODEC_ALC267, 0, "Realtek ALC267" }, 83 { HDA_CODEC_ALC268, 0, "Realtek ALC268" }, 84 { HDA_CODEC_ALC269, 0, "Realtek ALC269" }, 85 { HDA_CODEC_ALC270, 0, "Realtek ALC270" }, 86 { HDA_CODEC_ALC272, 0, "Realtek ALC272" }, 87 { HDA_CODEC_ALC273, 0, "Realtek ALC273" }, 88 { HDA_CODEC_ALC275, 0, "Realtek ALC275" }, 89 { HDA_CODEC_ALC276, 0, "Realtek ALC276" }, 90 { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, 91 { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" }, 92 { HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" }, 93 { HDA_CODEC_ALC662, 0, "Realtek ALC662" }, 94 { HDA_CODEC_ALC663, 0, "Realtek ALC663" }, 95 { HDA_CODEC_ALC665, 0, "Realtek ALC665" }, 96 { HDA_CODEC_ALC670, 0, "Realtek ALC670" }, 97 { HDA_CODEC_ALC680, 0, "Realtek ALC680" }, 98 { HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" }, 99 { HDA_CODEC_ALC861, 0, "Realtek ALC861" }, 100 { HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" }, 101 { HDA_CODEC_ALC880, 0, "Realtek ALC880" }, 102 { HDA_CODEC_ALC882, 0, "Realtek ALC882" }, 103 { HDA_CODEC_ALC883, 0, "Realtek ALC883" }, 104 { HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" }, 105 { HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" }, 106 { HDA_CODEC_ALC885, 0, "Realtek ALC885" }, 107 { HDA_CODEC_ALC887, 0, "Realtek ALC887" }, 108 { HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" }, 109 { HDA_CODEC_ALC888, 0, "Realtek ALC888" }, 110 { HDA_CODEC_ALC889, 0, "Realtek ALC889" }, 111 { HDA_CODEC_ALC892, 0, "Realtek ALC892" }, 112 { HDA_CODEC_ALC899, 0, "Realtek ALC899" }, 113 { HDA_CODEC_AD1882, 0, "Analog Devices AD1882" }, 114 { HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" }, 115 { HDA_CODEC_AD1883, 0, "Analog Devices AD1883" }, 116 { HDA_CODEC_AD1884, 0, "Analog Devices AD1884" }, 117 { HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" }, 118 { HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" }, 119 { HDA_CODEC_AD1983, 0, "Analog Devices AD1983" }, 120 { HDA_CODEC_AD1984, 0, "Analog Devices AD1984" }, 121 { HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" }, 122 { HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" }, 123 { HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" }, 124 { HDA_CODEC_AD1987, 0, "Analog Devices AD1987" }, 125 { HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" }, 126 { HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" }, 127 { HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" }, 128 { HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" }, 129 { HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" }, 130 { HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" }, 131 { HDA_CODEC_CA0132, 0, "Creative CA0132" }, 132 { HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" }, 133 { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" }, 134 { HDA_CODEC_CMI98802, 0, "CMedia CMI9880" }, 135 { HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" }, 136 { HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" }, 137 { HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" }, 138 { HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" }, 139 { HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" }, 140 { HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" }, 141 { HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" }, 142 { HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" }, 143 { HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" }, 144 { HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" }, 145 { HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" }, 146 { HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" }, 147 { HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" }, 148 { HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" }, 149 { HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" }, 150 { HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" }, 151 { HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" }, 152 { HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" }, 153 { HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" }, 154 { HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" }, 155 { HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" }, 156 { HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" }, 157 { HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" }, 158 { HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" }, 159 { HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" }, 160 { HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" }, 161 { HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" }, 162 { HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" }, 163 { HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" }, 164 { HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" }, 165 { HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" }, 166 { HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" }, 167 { HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" }, 168 { HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" }, 169 { HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" }, 170 { HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" }, 171 { HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" }, 172 { HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" }, 173 { HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" }, 174 { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" }, 175 { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" }, 176 { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" }, 177 { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" }, 178 { HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" }, 179 { HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" }, 180 { HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" }, 181 { HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" }, 182 { HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" }, 183 { HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" }, 184 { HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" }, 185 { HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" }, 186 { HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" }, 187 { HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" }, 188 { HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" }, 189 { HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" }, 190 { HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" }, 191 { HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" }, 192 { HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" }, 193 { HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" }, 194 { HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" }, 195 { HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" }, 196 { HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" }, 197 { HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" }, 198 { HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" }, 199 { HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" }, 200 { HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" }, 201 { HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" }, 202 { HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" }, 203 { HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" }, 204 { HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" }, 205 { HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" }, 206 { HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" }, 207 { HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" }, 208 { HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" }, 209 { HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" }, 210 { HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" }, 211 { HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" }, 212 { HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" }, 213 { HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" }, 214 { HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" }, 215 { HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" }, 216 { HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" }, 217 { HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" }, 218 { HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" }, 219 { HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" }, 220 { HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" }, 221 { HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" }, 222 { HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" }, 223 { HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" }, 224 { HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" }, 225 { HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" }, 226 { HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" }, 227 { HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" }, 228 { HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" }, 229 { HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" }, 230 { HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" }, 231 { HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" }, 232 { HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" }, 233 { HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" }, 234 { HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" }, 235 { HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" }, 236 { HDA_CODEC_CX20584, 0, "Conexant CX20584" }, 237 { HDA_CODEC_CX20585, 0, "Conexant CX20585" }, 238 { HDA_CODEC_CX20588, 0, "Conexant CX20588" }, 239 { HDA_CODEC_CX20590, 0, "Conexant CX20590" }, 240 { HDA_CODEC_CX20631, 0, "Conexant CX20631" }, 241 { HDA_CODEC_CX20632, 0, "Conexant CX20632" }, 242 { HDA_CODEC_CX20641, 0, "Conexant CX20641" }, 243 { HDA_CODEC_CX20642, 0, "Conexant CX20642" }, 244 { HDA_CODEC_CX20651, 0, "Conexant CX20651" }, 245 { HDA_CODEC_CX20652, 0, "Conexant CX20652" }, 246 { HDA_CODEC_CX20664, 0, "Conexant CX20664" }, 247 { HDA_CODEC_CX20665, 0, "Conexant CX20665" }, 248 { HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" }, 249 { HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" }, 250 { HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" }, 251 { HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" }, 252 { HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" }, 253 { HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" }, 254 { HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" }, 255 { HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" }, 256 { HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" }, 257 { HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" }, 258 { HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" }, 259 { HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" }, 260 { HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" }, 261 { HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" }, 262 { HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" }, 263 { HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" }, 264 { HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" }, 265 { HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" }, 266 { HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" }, 267 { HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" }, 268 { HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" }, 269 { HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" }, 270 { HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" }, 271 { HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" }, 272 { HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" }, 273 { HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" }, 274 { HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" }, 275 { HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" }, 276 { HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" }, 277 { HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" }, 278 { HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" }, 279 { HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" }, 280 { HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" }, 281 { HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" }, 282 { HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" }, 283 { HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" }, 284 { HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" }, 285 { HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" }, 286 { HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" }, 287 { HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" }, 288 { HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" }, 289 { HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" }, 290 { HDA_CODEC_VT1812, 0, "VIA VT1812" }, 291 { HDA_CODEC_VT1818S, 0, "VIA VT1818S" }, 292 { HDA_CODEC_VT1828S, 0, "VIA VT1828S" }, 293 { HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" }, 294 { HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" }, 295 { HDA_CODEC_VT2020, 0, "VIA VT2020" }, 296 { HDA_CODEC_ATIRS600_1, 0, "ATI RS600" }, 297 { HDA_CODEC_ATIRS600_2, 0, "ATI RS600" }, 298 { HDA_CODEC_ATIRS690, 0, "ATI RS690/780" }, 299 { HDA_CODEC_ATIR6XX, 0, "ATI R6xx" }, 300 { HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" }, 301 { HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" }, 302 { HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" }, 303 { HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" }, 304 { HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" }, 305 { HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" }, 306 { HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" }, 307 { HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" }, 308 { HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" }, 309 { HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" }, 310 { HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" }, 311 { HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" }, 312 { HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" }, 313 { HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" }, 314 { HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" }, 315 { HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" }, 316 { HDA_CODEC_INTELBL, 0, "Intel Bearlake" }, 317 { HDA_CODEC_INTELCA, 0, "Intel Cantiga" }, 318 { HDA_CODEC_INTELEL, 0, "Intel Eaglelake" }, 319 { HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" }, 320 { HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" }, 321 { HDA_CODEC_INTELPPT, 0, "Intel Panther Point" }, 322 { HDA_CODEC_INTELHSW, 0, "Intel Haswell" }, 323 { HDA_CODEC_INTELBDW, 0, "Intel Broadwell" }, 324 { HDA_CODEC_INTELCL, 0, "Intel Crestline" }, 325 { HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" }, 326 { HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" }, 327 /* Unknown CODECs */ 328 { HDA_CODEC_ADXXXX, 0, "Analog Devices" }, 329 { HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" }, 330 { HDA_CODEC_ALCXXXX, 0, "Realtek" }, 331 { HDA_CODEC_ATIXXXX, 0, "ATI" }, 332 { HDA_CODEC_CAXXXX, 0, "Creative" }, 333 { HDA_CODEC_CMIXXXX, 0, "CMedia" }, 334 { HDA_CODEC_CMIXXXX2, 0, "CMedia" }, 335 { HDA_CODEC_CSXXXX, 0, "Cirrus Logic" }, 336 { HDA_CODEC_CXXXXX, 0, "Conexant" }, 337 { HDA_CODEC_CHXXXX, 0, "Chrontel" }, 338 { HDA_CODEC_IDTXXXX, 0, "IDT" }, 339 { HDA_CODEC_INTELXXXX, 0, "Intel" }, 340 { HDA_CODEC_MOTOXXXX, 0, "Motorola" }, 341 { HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" }, 342 { HDA_CODEC_SIIXXXX, 0, "Silicon Image" }, 343 { HDA_CODEC_STACXXXX, 0, "Sigmatel" }, 344 { HDA_CODEC_VTXXXX, 0, "VIA" }, 345 }; 346 347 static int 348 hdacc_suspend(device_t dev) 349 { 350 351 HDA_BOOTHVERBOSE( 352 device_printf(dev, "Suspend...\n"); 353 ); 354 bus_generic_suspend(dev); 355 HDA_BOOTHVERBOSE( 356 device_printf(dev, "Suspend done\n"); 357 ); 358 return (0); 359 } 360 361 static int 362 hdacc_resume(device_t dev) 363 { 364 365 HDA_BOOTHVERBOSE( 366 device_printf(dev, "Resume...\n"); 367 ); 368 bus_generic_resume(dev); 369 HDA_BOOTHVERBOSE( 370 device_printf(dev, "Resume done\n"); 371 ); 372 return (0); 373 } 374 375 static int 376 hdacc_probe(device_t dev) 377 { 378 uint32_t id, revid; 379 char buf[128]; 380 int i; 381 382 id = ((uint32_t)hda_get_vendor_id(dev) << 16) + hda_get_device_id(dev); 383 revid = ((uint32_t)hda_get_revision_id(dev) << 8) + hda_get_stepping_id(dev); 384 385 for (i = 0; i < nitems(hdacc_codecs); i++) { 386 if (!HDA_DEV_MATCH(hdacc_codecs[i].id, id)) 387 continue; 388 if (hdacc_codecs[i].revid != 0 && 389 hdacc_codecs[i].revid != revid) 390 continue; 391 break; 392 } 393 if (i < nitems(hdacc_codecs)) { 394 if ((hdacc_codecs[i].id & 0xffff) != 0xffff) 395 strlcpy(buf, hdacc_codecs[i].name, sizeof(buf)); 396 else 397 snprintf(buf, sizeof(buf), "%s (0x%04x)", 398 hdacc_codecs[i].name, hda_get_device_id(dev)); 399 } else 400 snprintf(buf, sizeof(buf), "Generic (0x%04x)", id); 401 strlcat(buf, " HDA CODEC", sizeof(buf)); 402 device_set_desc_copy(dev, buf); 403 return (BUS_PROBE_DEFAULT); 404 } 405 406 static int 407 hdacc_attach(device_t dev) 408 { 409 struct hdacc_softc *codec = device_get_softc(dev); 410 device_t child; 411 int cad = (intptr_t)device_get_ivars(dev); 412 uint32_t subnode; 413 int startnode; 414 int endnode; 415 int i, n; 416 417 codec->lock = HDAC_GET_MTX(device_get_parent(dev), dev); 418 codec->dev = dev; 419 codec->cad = cad; 420 421 hdacc_lock(codec); 422 subnode = hda_command(dev, 423 HDA_CMD_GET_PARAMETER(0, 0x0, HDA_PARAM_SUB_NODE_COUNT)); 424 hdacc_unlock(codec); 425 if (subnode == HDA_INVALID) 426 return (EIO); 427 codec->fgcnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode); 428 startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode); 429 endnode = startnode + codec->fgcnt; 430 431 HDA_BOOTHVERBOSE( 432 device_printf(dev, 433 "Root Node at nid=0: %d subnodes %d-%d\n", 434 HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode), 435 startnode, endnode - 1); 436 ); 437 438 codec->fgs = malloc(sizeof(struct hdacc_fg) * codec->fgcnt, 439 M_HDACC, M_ZERO | M_WAITOK); 440 for (i = startnode, n = 0; i < endnode; i++, n++) { 441 codec->fgs[n].nid = i; 442 hdacc_lock(codec); 443 codec->fgs[n].type = 444 HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hda_command(dev, 445 HDA_CMD_GET_PARAMETER(0, i, HDA_PARAM_FCT_GRP_TYPE))); 446 codec->fgs[n].subsystem_id = hda_command(dev, 447 HDA_CMD_GET_SUBSYSTEM_ID(0, i)); 448 hdacc_unlock(codec); 449 codec->fgs[n].dev = child = device_add_child(dev, NULL, -1); 450 if (child == NULL) { 451 device_printf(dev, "Failed to add function device\n"); 452 continue; 453 } 454 device_set_ivars(child, &codec->fgs[n]); 455 } 456 457 bus_generic_attach(dev); 458 459 return (0); 460 } 461 462 static int 463 hdacc_detach(device_t dev) 464 { 465 struct hdacc_softc *codec = device_get_softc(dev); 466 int error; 467 468 error = device_delete_children(dev); 469 free(codec->fgs, M_HDACC); 470 return (error); 471 } 472 473 static int 474 hdacc_child_location_str(device_t dev, device_t child, char *buf, 475 size_t buflen) 476 { 477 struct hdacc_fg *fg = device_get_ivars(child); 478 479 snprintf(buf, buflen, "nid=%d", fg->nid); 480 return (0); 481 } 482 483 static int 484 hdacc_child_pnpinfo_str_method(device_t dev, device_t child, char *buf, 485 size_t buflen) 486 { 487 struct hdacc_fg *fg = device_get_ivars(child); 488 489 snprintf(buf, buflen, "type=0x%02x subsystem=0x%08x", 490 fg->type, fg->subsystem_id); 491 return (0); 492 } 493 494 static int 495 hdacc_print_child(device_t dev, device_t child) 496 { 497 struct hdacc_fg *fg = device_get_ivars(child); 498 int retval; 499 500 retval = bus_print_child_header(dev, child); 501 retval += printf(" at nid %d", fg->nid); 502 retval += bus_print_child_footer(dev, child); 503 504 return (retval); 505 } 506 507 static void 508 hdacc_probe_nomatch(device_t dev, device_t child) 509 { 510 struct hdacc_softc *codec = device_get_softc(dev); 511 struct hdacc_fg *fg = device_get_ivars(child); 512 513 device_printf(child, "<%s %s Function Group> at nid %d on %s " 514 "(no driver attached)\n", 515 device_get_desc(dev), 516 fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ? "Audio" : 517 (fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM ? "Modem" : 518 "Unknown"), fg->nid, device_get_nameunit(dev)); 519 HDA_BOOTVERBOSE( 520 device_printf(dev, "Subsystem ID: 0x%08x\n", 521 hda_get_subsystem_id(dev)); 522 ); 523 HDA_BOOTHVERBOSE( 524 device_printf(dev, "Power down FG nid=%d to the D3 state...\n", 525 fg->nid); 526 ); 527 hdacc_lock(codec); 528 hda_command(dev, HDA_CMD_SET_POWER_STATE(0, 529 fg->nid, HDA_CMD_POWER_STATE_D3)); 530 hdacc_unlock(codec); 531 } 532 533 static int 534 hdacc_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 535 { 536 struct hdacc_fg *fg = device_get_ivars(child); 537 538 switch (which) { 539 case HDA_IVAR_NODE_ID: 540 *result = fg->nid; 541 break; 542 case HDA_IVAR_NODE_TYPE: 543 *result = fg->type; 544 break; 545 case HDA_IVAR_SUBSYSTEM_ID: 546 *result = fg->subsystem_id; 547 break; 548 default: 549 return(BUS_READ_IVAR(device_get_parent(dev), dev, 550 which, result)); 551 } 552 return (0); 553 } 554 555 static struct mtx * 556 hdacc_get_mtx(device_t dev, device_t child) 557 { 558 struct hdacc_softc *codec = device_get_softc(dev); 559 560 return (codec->lock); 561 } 562 563 static uint32_t 564 hdacc_codec_command(device_t dev, device_t child, uint32_t verb) 565 { 566 567 return (HDAC_CODEC_COMMAND(device_get_parent(dev), dev, verb)); 568 } 569 570 static int 571 hdacc_stream_alloc(device_t dev, device_t child, int dir, int format, 572 int stripe, uint32_t **dmapos) 573 { 574 struct hdacc_softc *codec = device_get_softc(dev); 575 int stream; 576 577 stream = HDAC_STREAM_ALLOC(device_get_parent(dev), dev, 578 dir, format, stripe, dmapos); 579 if (stream > 0) 580 codec->streams[dir][stream] = child; 581 return (stream); 582 } 583 584 static void 585 hdacc_stream_free(device_t dev, device_t child, int dir, int stream) 586 { 587 struct hdacc_softc *codec = device_get_softc(dev); 588 589 codec->streams[dir][stream] = NULL; 590 HDAC_STREAM_FREE(device_get_parent(dev), dev, dir, stream); 591 } 592 593 static int 594 hdacc_stream_start(device_t dev, device_t child, 595 int dir, int stream, bus_addr_t buf, int blksz, int blkcnt) 596 { 597 598 return (HDAC_STREAM_START(device_get_parent(dev), dev, 599 dir, stream, buf, blksz, blkcnt)); 600 } 601 602 static void 603 hdacc_stream_stop(device_t dev, device_t child, int dir, int stream) 604 { 605 606 HDAC_STREAM_STOP(device_get_parent(dev), dev, dir, stream); 607 } 608 609 static void 610 hdacc_stream_reset(device_t dev, device_t child, int dir, int stream) 611 { 612 613 HDAC_STREAM_RESET(device_get_parent(dev), dev, dir, stream); 614 } 615 616 static uint32_t 617 hdacc_stream_getptr(device_t dev, device_t child, int dir, int stream) 618 { 619 620 return (HDAC_STREAM_GETPTR(device_get_parent(dev), dev, dir, stream)); 621 } 622 623 static void 624 hdacc_stream_intr(device_t dev, int dir, int stream) 625 { 626 struct hdacc_softc *codec = device_get_softc(dev); 627 device_t child; 628 629 if ((child = codec->streams[dir][stream]) != NULL) 630 HDAC_STREAM_INTR(child, dir, stream); 631 } 632 633 static int 634 hdacc_unsol_alloc(device_t dev, device_t child, int wanted) 635 { 636 struct hdacc_softc *codec = device_get_softc(dev); 637 int tag; 638 639 wanted &= 0x3f; 640 tag = wanted; 641 do { 642 if (codec->tags[tag] == NULL) { 643 codec->tags[tag] = child; 644 HDAC_UNSOL_ALLOC(device_get_parent(dev), dev, tag); 645 return (tag); 646 } 647 tag++; 648 tag &= 0x3f; 649 } while (tag != wanted); 650 return (-1); 651 } 652 653 static void 654 hdacc_unsol_free(device_t dev, device_t child, int tag) 655 { 656 struct hdacc_softc *codec = device_get_softc(dev); 657 658 KASSERT(tag >= 0 && tag <= 0x3f, ("Wrong tag value %d\n", tag)); 659 codec->tags[tag] = NULL; 660 HDAC_UNSOL_FREE(device_get_parent(dev), dev, tag); 661 } 662 663 static void 664 hdacc_unsol_intr(device_t dev, uint32_t resp) 665 { 666 struct hdacc_softc *codec = device_get_softc(dev); 667 device_t child; 668 int tag; 669 670 tag = resp >> 26; 671 if ((child = codec->tags[tag]) != NULL) 672 HDAC_UNSOL_INTR(child, resp); 673 else 674 device_printf(codec->dev, "Unexpected unsolicited " 675 "response with tag %d: %08x\n", tag, resp); 676 } 677 678 static void 679 hdacc_pindump(device_t dev) 680 { 681 device_t *devlist; 682 int devcount, i; 683 684 if (device_get_children(dev, &devlist, &devcount) != 0) 685 return; 686 for (i = 0; i < devcount; i++) 687 HDAC_PINDUMP(devlist[i]); 688 free(devlist, M_TEMP); 689 } 690 691 static device_method_t hdacc_methods[] = { 692 /* device interface */ 693 DEVMETHOD(device_probe, hdacc_probe), 694 DEVMETHOD(device_attach, hdacc_attach), 695 DEVMETHOD(device_detach, hdacc_detach), 696 DEVMETHOD(device_suspend, hdacc_suspend), 697 DEVMETHOD(device_resume, hdacc_resume), 698 /* Bus interface */ 699 DEVMETHOD(bus_child_location_str, hdacc_child_location_str), 700 DEVMETHOD(bus_child_pnpinfo_str, hdacc_child_pnpinfo_str_method), 701 DEVMETHOD(bus_print_child, hdacc_print_child), 702 DEVMETHOD(bus_probe_nomatch, hdacc_probe_nomatch), 703 DEVMETHOD(bus_read_ivar, hdacc_read_ivar), 704 DEVMETHOD(hdac_get_mtx, hdacc_get_mtx), 705 DEVMETHOD(hdac_codec_command, hdacc_codec_command), 706 DEVMETHOD(hdac_stream_alloc, hdacc_stream_alloc), 707 DEVMETHOD(hdac_stream_free, hdacc_stream_free), 708 DEVMETHOD(hdac_stream_start, hdacc_stream_start), 709 DEVMETHOD(hdac_stream_stop, hdacc_stream_stop), 710 DEVMETHOD(hdac_stream_reset, hdacc_stream_reset), 711 DEVMETHOD(hdac_stream_getptr, hdacc_stream_getptr), 712 DEVMETHOD(hdac_stream_intr, hdacc_stream_intr), 713 DEVMETHOD(hdac_unsol_alloc, hdacc_unsol_alloc), 714 DEVMETHOD(hdac_unsol_free, hdacc_unsol_free), 715 DEVMETHOD(hdac_unsol_intr, hdacc_unsol_intr), 716 DEVMETHOD(hdac_pindump, hdacc_pindump), 717 DEVMETHOD_END 718 }; 719 720 static driver_t hdacc_driver = { 721 "hdacc", 722 hdacc_methods, 723 sizeof(struct hdacc_softc), 724 }; 725 726 static devclass_t hdacc_devclass; 727 728 DRIVER_MODULE(snd_hda, hdac, hdacc_driver, hdacc_devclass, NULL, NULL); 729