1 /*- 2 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca> 3 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org> 4 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Intel High Definition Audio (CODEC) driver for FreeBSD. 31 */ 32 33 #ifdef HAVE_KERNEL_OPTION_HEADERS 34 #include "opt_snd.h" 35 #endif 36 37 #include <dev/sound/pcm/sound.h> 38 39 #include <sys/ctype.h> 40 41 #include <dev/sound/pci/hda/hda_reg.h> 42 #include <dev/sound/pci/hda/hdac.h> 43 44 SND_DECLARE_FILE("$FreeBSD$"); 45 46 struct hdacc_fg { 47 device_t dev; 48 nid_t nid; 49 uint8_t type; 50 uint32_t subsystem_id; 51 }; 52 53 struct hdacc_softc { 54 device_t dev; 55 struct mtx *lock; 56 nid_t cad; 57 device_t streams[2][16]; 58 device_t tags[64]; 59 int fgcnt; 60 struct hdacc_fg *fgs; 61 }; 62 63 #define hdacc_lock(codec) snd_mtxlock((codec)->lock) 64 #define hdacc_unlock(codec) snd_mtxunlock((codec)->lock) 65 #define hdacc_lockassert(codec) snd_mtxassert((codec)->lock) 66 #define hdacc_lockowned(codec) mtx_owned((codec)->lock) 67 68 MALLOC_DEFINE(M_HDACC, "hdacc", "HDA CODEC"); 69 70 /* CODECs */ 71 static const struct { 72 uint32_t id; 73 uint16_t revid; 74 char *name; 75 } hdacc_codecs[] = { 76 { HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" }, 77 { HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" }, 78 { HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" }, 79 { HDA_CODEC_ALC221, 0, "Realtek ALC221" }, 80 { HDA_CODEC_ALC260, 0, "Realtek ALC260" }, 81 { HDA_CODEC_ALC262, 0, "Realtek ALC262" }, 82 { HDA_CODEC_ALC267, 0, "Realtek ALC267" }, 83 { HDA_CODEC_ALC268, 0, "Realtek ALC268" }, 84 { HDA_CODEC_ALC269, 0, "Realtek ALC269" }, 85 { HDA_CODEC_ALC270, 0, "Realtek ALC270" }, 86 { HDA_CODEC_ALC272, 0, "Realtek ALC272" }, 87 { HDA_CODEC_ALC273, 0, "Realtek ALC273" }, 88 { HDA_CODEC_ALC275, 0, "Realtek ALC275" }, 89 { HDA_CODEC_ALC276, 0, "Realtek ALC276" }, 90 { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" }, 91 { HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" }, 92 { HDA_CODEC_ALC662, 0, "Realtek ALC662" }, 93 { HDA_CODEC_ALC663, 0, "Realtek ALC663" }, 94 { HDA_CODEC_ALC665, 0, "Realtek ALC665" }, 95 { HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" }, 96 { HDA_CODEC_ALC861, 0, "Realtek ALC861" }, 97 { HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" }, 98 { HDA_CODEC_ALC880, 0, "Realtek ALC880" }, 99 { HDA_CODEC_ALC882, 0, "Realtek ALC882" }, 100 { HDA_CODEC_ALC883, 0, "Realtek ALC883" }, 101 { HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" }, 102 { HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" }, 103 { HDA_CODEC_ALC885, 0, "Realtek ALC885" }, 104 { HDA_CODEC_ALC887, 0, "Realtek ALC887" }, 105 { HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" }, 106 { HDA_CODEC_ALC888, 0, "Realtek ALC888" }, 107 { HDA_CODEC_ALC889, 0, "Realtek ALC889" }, 108 { HDA_CODEC_ALC892, 0, "Realtek ALC892" }, 109 { HDA_CODEC_ALC899, 0, "Realtek ALC899" }, 110 { HDA_CODEC_AD1882, 0, "Analog Devices AD1882" }, 111 { HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" }, 112 { HDA_CODEC_AD1883, 0, "Analog Devices AD1883" }, 113 { HDA_CODEC_AD1884, 0, "Analog Devices AD1884" }, 114 { HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" }, 115 { HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" }, 116 { HDA_CODEC_AD1983, 0, "Analog Devices AD1983" }, 117 { HDA_CODEC_AD1984, 0, "Analog Devices AD1984" }, 118 { HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" }, 119 { HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" }, 120 { HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" }, 121 { HDA_CODEC_AD1987, 0, "Analog Devices AD1987" }, 122 { HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" }, 123 { HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" }, 124 { HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" }, 125 { HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" }, 126 { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" }, 127 { HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" }, 128 { HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" }, 129 { HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" }, 130 { HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" }, 131 { HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" }, 132 { HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" }, 133 { HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" }, 134 { HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" }, 135 { HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" }, 136 { HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" }, 137 { HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" }, 138 { HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" }, 139 { HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" }, 140 { HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" }, 141 { HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" }, 142 { HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" }, 143 { HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" }, 144 { HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" }, 145 { HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" }, 146 { HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" }, 147 { HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" }, 148 { HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" }, 149 { HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" }, 150 { HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" }, 151 { HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" }, 152 { HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" }, 153 { HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" }, 154 { HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" }, 155 { HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" }, 156 { HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" }, 157 { HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" }, 158 { HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" }, 159 { HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" }, 160 { HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" }, 161 { HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" }, 162 { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" }, 163 { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" }, 164 { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" }, 165 { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" }, 166 { HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" }, 167 { HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" }, 168 { HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" }, 169 { HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" }, 170 { HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" }, 171 { HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" }, 172 { HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" }, 173 { HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" }, 174 { HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" }, 175 { HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" }, 176 { HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" }, 177 { HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" }, 178 { HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" }, 179 { HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" }, 180 { HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" }, 181 { HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" }, 182 { HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" }, 183 { HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" }, 184 { HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" }, 185 { HDA_CODEC_CX20584, 0, "Conexant CX20584" }, 186 { HDA_CODEC_CX20585, 0, "Conexant CX20585" }, 187 { HDA_CODEC_CX20588, 0, "Conexant CX20588" }, 188 { HDA_CODEC_CX20590, 0, "Conexant CX20590" }, 189 { HDA_CODEC_CX20631, 0, "Conexant CX20631" }, 190 { HDA_CODEC_CX20632, 0, "Conexant CX20632" }, 191 { HDA_CODEC_CX20641, 0, "Conexant CX20641" }, 192 { HDA_CODEC_CX20642, 0, "Conexant CX20642" }, 193 { HDA_CODEC_CX20651, 0, "Conexant CX20651" }, 194 { HDA_CODEC_CX20652, 0, "Conexant CX20652" }, 195 { HDA_CODEC_CX20664, 0, "Conexant CX20664" }, 196 { HDA_CODEC_CX20665, 0, "Conexant CX20665" }, 197 { HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" }, 198 { HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" }, 199 { HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" }, 200 { HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" }, 201 { HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" }, 202 { HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" }, 203 { HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" }, 204 { HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" }, 205 { HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" }, 206 { HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" }, 207 { HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" }, 208 { HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" }, 209 { HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" }, 210 { HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" }, 211 { HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" }, 212 { HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" }, 213 { HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" }, 214 { HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" }, 215 { HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" }, 216 { HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" }, 217 { HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" }, 218 { HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" }, 219 { HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" }, 220 { HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" }, 221 { HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" }, 222 { HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" }, 223 { HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" }, 224 { HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" }, 225 { HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" }, 226 { HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" }, 227 { HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" }, 228 { HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" }, 229 { HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" }, 230 { HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" }, 231 { HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" }, 232 { HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" }, 233 { HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" }, 234 { HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" }, 235 { HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" }, 236 { HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" }, 237 { HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" }, 238 { HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" }, 239 { HDA_CODEC_VT1812, 0, "VIA VT1812" }, 240 { HDA_CODEC_VT1818S, 0, "VIA VT1818S" }, 241 { HDA_CODEC_VT1828S, 0, "VIA VT1828S" }, 242 { HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" }, 243 { HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" }, 244 { HDA_CODEC_VT2020, 0, "VIA VT2020" }, 245 { HDA_CODEC_ATIRS600_1, 0, "ATI RS600" }, 246 { HDA_CODEC_ATIRS600_2, 0, "ATI RS600" }, 247 { HDA_CODEC_ATIRS690, 0, "ATI RS690/780" }, 248 { HDA_CODEC_ATIR6XX, 0, "ATI R6xx" }, 249 { HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" }, 250 { HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" }, 251 { HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" }, 252 { HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" }, 253 { HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" }, 254 { HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" }, 255 { HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" }, 256 { HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" }, 257 { HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" }, 258 { HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" }, 259 { HDA_CODEC_INTELBL, 0, "Intel Bearlake" }, 260 { HDA_CODEC_INTELCA, 0, "Intel Cantiga" }, 261 { HDA_CODEC_INTELEL, 0, "Intel Eaglelake" }, 262 { HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" }, 263 { HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" }, 264 { HDA_CODEC_INTELPPT, 0, "Intel Panther Point" }, 265 { HDA_CODEC_INTELCL, 0, "Intel Crestline" }, 266 { HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" }, 267 { HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" }, 268 /* Unknown CODECs */ 269 { HDA_CODEC_ALCXXXX, 0, "Realtek (Unknown)" }, 270 { HDA_CODEC_ADXXXX, 0, "Analog Devices (Unknown)" }, 271 { HDA_CODEC_CSXXXX, 0, "Cirrus Logic (Unknown)" }, 272 { HDA_CODEC_CMIXXXX, 0, "CMedia (Unknown)" }, 273 { HDA_CODEC_STACXXXX, 0, "Sigmatel (Unknown)" }, 274 { HDA_CODEC_SIIXXXX, 0, "Silicon Image (Unknown)" }, 275 { HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems (Unknown)" }, 276 { HDA_CODEC_CXXXXX, 0, "Conexant (Unknown)" }, 277 { HDA_CODEC_VTXXXX, 0, "VIA (Unknown)" }, 278 { HDA_CODEC_ATIXXXX, 0, "ATI (Unknown)" }, 279 { HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA (Unknown)" }, 280 { HDA_CODEC_INTELXXXX, 0, "Intel (Unknown)" }, 281 { HDA_CODEC_IDTXXXX, 0, "IDT (Unknown)" }, 282 }; 283 #define HDACC_CODECS_LEN (sizeof(hdacc_codecs) / sizeof(hdacc_codecs[0])) 284 285 286 /**************************************************************************** 287 * Function prototypes 288 ****************************************************************************/ 289 290 static char * 291 hdacc_codec_name(uint32_t id, uint16_t revid) 292 { 293 int i; 294 295 for (i = 0; i < HDACC_CODECS_LEN; i++) { 296 if (!HDA_DEV_MATCH(hdacc_codecs[i].id, id)) 297 continue; 298 if (hdacc_codecs[i].revid != 0 && 299 hdacc_codecs[i].revid != revid) 300 continue; 301 return (hdacc_codecs[i].name); 302 } 303 304 return ((id == 0x00000000) ? "NULL CODEC" : "Unknown CODEC"); 305 } 306 307 static int 308 hdacc_suspend(device_t dev) 309 { 310 311 HDA_BOOTHVERBOSE( 312 device_printf(dev, "Suspend...\n"); 313 ); 314 bus_generic_suspend(dev); 315 HDA_BOOTHVERBOSE( 316 device_printf(dev, "Suspend done\n"); 317 ); 318 return (0); 319 } 320 321 static int 322 hdacc_resume(device_t dev) 323 { 324 325 HDA_BOOTHVERBOSE( 326 device_printf(dev, "Resume...\n"); 327 ); 328 bus_generic_resume(dev); 329 HDA_BOOTHVERBOSE( 330 device_printf(dev, "Resume done\n"); 331 ); 332 return (0); 333 } 334 335 static int 336 hdacc_probe(device_t dev) 337 { 338 uint32_t id, revid; 339 char buf[128]; 340 341 id = ((uint32_t)hda_get_vendor_id(dev) << 16) + hda_get_device_id(dev); 342 revid = ((uint32_t)hda_get_revision_id(dev) << 8) + hda_get_stepping_id(dev); 343 snprintf(buf, sizeof(buf), "%s HDA CODEC", hdacc_codec_name(id, revid)); 344 device_set_desc_copy(dev, buf); 345 return (BUS_PROBE_DEFAULT); 346 } 347 348 static int 349 hdacc_attach(device_t dev) 350 { 351 struct hdacc_softc *codec = device_get_softc(dev); 352 device_t child; 353 int cad = (intptr_t)device_get_ivars(dev); 354 uint32_t subnode; 355 int startnode; 356 int endnode; 357 int i, n; 358 359 codec->lock = HDAC_GET_MTX(device_get_parent(dev), dev); 360 codec->dev = dev; 361 codec->cad = cad; 362 363 hdacc_lock(codec); 364 subnode = hda_command(dev, 365 HDA_CMD_GET_PARAMETER(0, 0x0, HDA_PARAM_SUB_NODE_COUNT)); 366 hdacc_unlock(codec); 367 if (subnode == HDA_INVALID) 368 return (EIO); 369 codec->fgcnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode); 370 startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode); 371 endnode = startnode + codec->fgcnt; 372 373 HDA_BOOTVERBOSE( 374 device_printf(dev, 375 "Root Node at nid=0: %d subnodes %d-%d\n", 376 HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode), 377 startnode, endnode - 1); 378 ); 379 380 codec->fgs = malloc(sizeof(struct hdacc_fg) * codec->fgcnt, 381 M_HDACC, M_ZERO | M_WAITOK); 382 for (i = startnode, n = 0; i < endnode; i++, n++) { 383 codec->fgs[n].nid = i; 384 hdacc_lock(codec); 385 codec->fgs[n].type = 386 HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hda_command(dev, 387 HDA_CMD_GET_PARAMETER(0, i, HDA_PARAM_FCT_GRP_TYPE))); 388 codec->fgs[n].subsystem_id = hda_command(dev, 389 HDA_CMD_GET_SUBSYSTEM_ID(0, i)); 390 hdacc_unlock(codec); 391 codec->fgs[n].dev = child = device_add_child(dev, NULL, -1); 392 if (child == NULL) { 393 device_printf(dev, "Failed to add function device\n"); 394 continue; 395 } 396 device_set_ivars(child, &codec->fgs[n]); 397 } 398 399 bus_generic_attach(dev); 400 401 return (0); 402 } 403 404 static int 405 hdacc_detach(device_t dev) 406 { 407 408 return (device_delete_children(dev)); 409 } 410 411 static int 412 hdacc_child_location_str(device_t dev, device_t child, char *buf, 413 size_t buflen) 414 { 415 struct hdacc_fg *fg = device_get_ivars(child); 416 417 snprintf(buf, buflen, "nid=%d", fg->nid); 418 return (0); 419 } 420 421 static int 422 hdacc_child_pnpinfo_str_method(device_t dev, device_t child, char *buf, 423 size_t buflen) 424 { 425 struct hdacc_fg *fg = device_get_ivars(child); 426 427 snprintf(buf, buflen, "type=0x%02x subsystem=0x%08x", 428 fg->type, fg->subsystem_id); 429 return (0); 430 } 431 432 static int 433 hdacc_print_child(device_t dev, device_t child) 434 { 435 struct hdacc_fg *fg = device_get_ivars(child); 436 int retval; 437 438 retval = bus_print_child_header(dev, child); 439 retval += printf(" at nid %d", fg->nid); 440 retval += bus_print_child_footer(dev, child); 441 442 return (retval); 443 } 444 445 static void 446 hdacc_probe_nomatch(device_t dev, device_t child) 447 { 448 struct hdacc_softc *codec = device_get_softc(dev); 449 struct hdacc_fg *fg = device_get_ivars(child); 450 451 device_printf(child, "<%s %s Function Group> at nid %d on %s " 452 "(no driver attached)\n", 453 device_get_desc(dev), 454 fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ? "Audio" : 455 (fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM ? "Modem" : 456 "Unknown"), fg->nid, device_get_nameunit(dev)); 457 HDA_BOOTHVERBOSE( 458 device_printf(dev, "Power down FG nid=%d to the D3 state...\n", 459 fg->nid); 460 ); 461 hdacc_lock(codec); 462 hda_command(dev, HDA_CMD_SET_POWER_STATE(0, 463 fg->nid, HDA_CMD_POWER_STATE_D3)); 464 hdacc_unlock(codec); 465 } 466 467 static int 468 hdacc_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 469 { 470 struct hdacc_fg *fg = device_get_ivars(child); 471 472 switch (which) { 473 case HDA_IVAR_NODE_ID: 474 *result = fg->nid; 475 break; 476 case HDA_IVAR_NODE_TYPE: 477 *result = fg->type; 478 break; 479 case HDA_IVAR_SUBSYSTEM_ID: 480 *result = fg->subsystem_id; 481 break; 482 default: 483 return(BUS_READ_IVAR(device_get_parent(dev), dev, 484 which, result)); 485 } 486 return (0); 487 } 488 489 static struct mtx * 490 hdacc_get_mtx(device_t dev, device_t child) 491 { 492 struct hdacc_softc *codec = device_get_softc(dev); 493 494 return (codec->lock); 495 } 496 497 static uint32_t 498 hdacc_codec_command(device_t dev, device_t child, uint32_t verb) 499 { 500 501 return (HDAC_CODEC_COMMAND(device_get_parent(dev), dev, verb)); 502 } 503 504 static int 505 hdacc_stream_alloc(device_t dev, device_t child, int dir, int format, 506 uint32_t **dmapos) 507 { 508 struct hdacc_softc *codec = device_get_softc(dev); 509 int stream; 510 511 stream = HDAC_STREAM_ALLOC(device_get_parent(dev), dev, 512 dir, format, dmapos); 513 if (stream > 0) 514 codec->streams[dir][stream] = child; 515 return (stream); 516 } 517 518 static void 519 hdacc_stream_free(device_t dev, device_t child, int dir, int stream) 520 { 521 struct hdacc_softc *codec = device_get_softc(dev); 522 523 codec->streams[dir][stream] = NULL; 524 HDAC_STREAM_FREE(device_get_parent(dev), dev, dir, stream); 525 } 526 527 static int 528 hdacc_stream_start(device_t dev, device_t child, 529 int dir, int stream, bus_addr_t buf, int blksz, int blkcnt) 530 { 531 532 return (HDAC_STREAM_START(device_get_parent(dev), dev, 533 dir, stream, buf, blksz, blkcnt)); 534 } 535 536 static void 537 hdacc_stream_stop(device_t dev, device_t child, int dir, int stream) 538 { 539 540 HDAC_STREAM_STOP(device_get_parent(dev), dev, dir, stream); 541 } 542 543 static void 544 hdacc_stream_reset(device_t dev, device_t child, int dir, int stream) 545 { 546 547 HDAC_STREAM_RESET(device_get_parent(dev), dev, dir, stream); 548 } 549 550 static uint32_t 551 hdacc_stream_getptr(device_t dev, device_t child, int dir, int stream) 552 { 553 554 return (HDAC_STREAM_GETPTR(device_get_parent(dev), dev, dir, stream)); 555 } 556 557 static void 558 hdacc_stream_intr(device_t dev, int dir, int stream) 559 { 560 struct hdacc_softc *codec = device_get_softc(dev); 561 device_t child; 562 563 if ((child = codec->streams[dir][stream]) != NULL); 564 HDAC_STREAM_INTR(child, dir, stream); 565 } 566 567 static int 568 hdacc_unsol_alloc(device_t dev, device_t child, int wanted) 569 { 570 struct hdacc_softc *codec = device_get_softc(dev); 571 int tag; 572 573 wanted &= 0x3f; 574 tag = wanted; 575 do { 576 if (codec->tags[tag] == NULL) { 577 codec->tags[tag] = child; 578 HDAC_UNSOL_ALLOC(device_get_parent(dev), dev, tag); 579 return (tag); 580 } 581 tag++; 582 tag &= 0x3f; 583 } while (tag != wanted); 584 return (-1); 585 } 586 587 static void 588 hdacc_unsol_free(device_t dev, device_t child, int tag) 589 { 590 struct hdacc_softc *codec = device_get_softc(dev); 591 592 KASSERT(tag >= 0 && tag <= 0x3f, ("Wrong tag value %d\n", tag)); 593 codec->tags[tag] = NULL; 594 HDAC_UNSOL_FREE(device_get_parent(dev), dev, tag); 595 } 596 597 static void 598 hdacc_unsol_intr(device_t dev, uint32_t resp) 599 { 600 struct hdacc_softc *codec = device_get_softc(dev); 601 device_t child; 602 int tag; 603 604 tag = resp >> 26; 605 if ((child = codec->tags[tag]) != NULL) 606 HDAC_UNSOL_INTR(child, resp); 607 else 608 device_printf(codec->dev, "Unexpected unsolicited " 609 "response with tag %d: %08x\n", tag, resp); 610 } 611 612 static void 613 hdacc_pindump(device_t dev) 614 { 615 device_t *devlist; 616 int devcount, i; 617 618 if (device_get_children(dev, &devlist, &devcount) != 0) 619 return; 620 for (i = 0; i < devcount; i++) 621 HDAC_PINDUMP(devlist[i]); 622 free(devlist, M_TEMP); 623 } 624 625 static device_method_t hdacc_methods[] = { 626 /* device interface */ 627 DEVMETHOD(device_probe, hdacc_probe), 628 DEVMETHOD(device_attach, hdacc_attach), 629 DEVMETHOD(device_detach, hdacc_detach), 630 DEVMETHOD(device_suspend, hdacc_suspend), 631 DEVMETHOD(device_resume, hdacc_resume), 632 /* Bus interface */ 633 DEVMETHOD(bus_child_location_str, hdacc_child_location_str), 634 DEVMETHOD(bus_child_pnpinfo_str, hdacc_child_pnpinfo_str_method), 635 DEVMETHOD(bus_print_child, hdacc_print_child), 636 DEVMETHOD(bus_probe_nomatch, hdacc_probe_nomatch), 637 DEVMETHOD(bus_read_ivar, hdacc_read_ivar), 638 DEVMETHOD(hdac_get_mtx, hdacc_get_mtx), 639 DEVMETHOD(hdac_codec_command, hdacc_codec_command), 640 DEVMETHOD(hdac_stream_alloc, hdacc_stream_alloc), 641 DEVMETHOD(hdac_stream_free, hdacc_stream_free), 642 DEVMETHOD(hdac_stream_start, hdacc_stream_start), 643 DEVMETHOD(hdac_stream_stop, hdacc_stream_stop), 644 DEVMETHOD(hdac_stream_reset, hdacc_stream_reset), 645 DEVMETHOD(hdac_stream_getptr, hdacc_stream_getptr), 646 DEVMETHOD(hdac_stream_intr, hdacc_stream_intr), 647 DEVMETHOD(hdac_unsol_alloc, hdacc_unsol_alloc), 648 DEVMETHOD(hdac_unsol_free, hdacc_unsol_free), 649 DEVMETHOD(hdac_unsol_intr, hdacc_unsol_intr), 650 DEVMETHOD(hdac_pindump, hdacc_pindump), 651 { 0, 0 } 652 }; 653 654 static driver_t hdacc_driver = { 655 "hdacc", 656 hdacc_methods, 657 sizeof(struct hdacc_softc), 658 }; 659 660 static devclass_t hdacc_devclass; 661 662 DRIVER_MODULE(snd_hda, hdac, hdacc_driver, hdacc_devclass, 0, 0); 663