1 /*- 2 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca> 3 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef _HDAC_PRIVATE_H_ 31 #define _HDAC_PRIVATE_H_ 32 33 /**************************************************************************** 34 * Miscellaneous defines 35 ****************************************************************************/ 36 #define HDAC_CODEC_MAX 16 37 38 /**************************************************************************** 39 * Helper Macros 40 ****************************************************************************/ 41 #define HDAC_READ_1(mem, offset) \ 42 bus_space_read_1((mem)->mem_tag, (mem)->mem_handle, (offset)) 43 #define HDAC_READ_2(mem, offset) \ 44 bus_space_read_2((mem)->mem_tag, (mem)->mem_handle, (offset)) 45 #define HDAC_READ_4(mem, offset) \ 46 bus_space_read_4((mem)->mem_tag, (mem)->mem_handle, (offset)) 47 #define HDAC_WRITE_1(mem, offset, value) \ 48 bus_space_write_1((mem)->mem_tag, (mem)->mem_handle, (offset), (value)) 49 #define HDAC_WRITE_2(mem, offset, value) \ 50 bus_space_write_2((mem)->mem_tag, (mem)->mem_handle, (offset), (value)) 51 #define HDAC_WRITE_4(mem, offset, value) \ 52 bus_space_write_4((mem)->mem_tag, (mem)->mem_handle, (offset), (value)) 53 54 #define HDAC_ISDCTL(sc, n) (_HDAC_ISDCTL((n), (sc)->num_iss, (sc)->num_oss)) 55 #define HDAC_ISDSTS(sc, n) (_HDAC_ISDSTS((n), (sc)->num_iss, (sc)->num_oss)) 56 #define HDAC_ISDPICB(sc, n) (_HDAC_ISDPICB((n), (sc)->num_iss, (sc)->num_oss)) 57 #define HDAC_ISDCBL(sc, n) (_HDAC_ISDCBL((n), (sc)->num_iss, (sc)->num_oss)) 58 #define HDAC_ISDLVI(sc, n) (_HDAC_ISDLVI((n), (sc)->num_iss, (sc)->num_oss)) 59 #define HDAC_ISDFIFOD(sc, n) (_HDAC_ISDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) 60 #define HDAC_ISDFMT(sc, n) (_HDAC_ISDFMT((n), (sc)->num_iss, (sc)->num_oss)) 61 #define HDAC_ISDBDPL(sc, n) (_HDAC_ISDBDPL((n), (sc)->num_iss, (sc)->num_oss)) 62 #define HDAC_ISDBDPU(sc, n) (_HDAC_ISDBDPU((n), (sc)->num_iss, (sc)->num_oss)) 63 64 #define HDAC_OSDCTL(sc, n) (_HDAC_OSDCTL((n), (sc)->num_iss, (sc)->num_oss)) 65 #define HDAC_OSDSTS(sc, n) (_HDAC_OSDSTS((n), (sc)->num_iss, (sc)->num_oss)) 66 #define HDAC_OSDPICB(sc, n) (_HDAC_OSDPICB((n), (sc)->num_iss, (sc)->num_oss)) 67 #define HDAC_OSDCBL(sc, n) (_HDAC_OSDCBL((n), (sc)->num_iss, (sc)->num_oss)) 68 #define HDAC_OSDLVI(sc, n) (_HDAC_OSDLVI((n), (sc)->num_iss, (sc)->num_oss)) 69 #define HDAC_OSDFIFOD(sc, n) (_HDAC_OSDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) 70 #define HDAC_OSDBDPL(sc, n) (_HDAC_OSDBDPL((n), (sc)->num_iss, (sc)->num_oss)) 71 #define HDAC_OSDBDPU(sc, n) (_HDAC_OSDBDPU((n), (sc)->num_iss, (sc)->num_oss)) 72 73 #define HDAC_BSDCTL(sc, n) (_HDAC_BSDCTL((n), (sc)->num_iss, (sc)->num_oss)) 74 #define HDAC_BSDSTS(sc, n) (_HDAC_BSDSTS((n), (sc)->num_iss, (sc)->num_oss)) 75 #define HDAC_BSDPICB(sc, n) (_HDAC_BSDPICB((n), (sc)->num_iss, (sc)->num_oss)) 76 #define HDAC_BSDCBL(sc, n) (_HDAC_BSDCBL((n), (sc)->num_iss, (sc)->num_oss)) 77 #define HDAC_BSDLVI(sc, n) (_HDAC_BSDLVI((n), (sc)->num_iss, (sc)->num_oss)) 78 #define HDAC_BSDFIFOD(sc, n) (_HDAC_BSDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) 79 #define HDAC_BSDBDPL(sc, n) (_HDAC_BSDBDPL((n), (sc)->num_iss, (sc)->num_oss)) 80 #define HDAC_BSDBDPU(sc, n) (_HDAC_BSDBDPU((n), (sc)->num_iss, (sc)->num_oss)) 81 82 /**************************************************************************** 83 * Custom hdac malloc type 84 ****************************************************************************/ 85 MALLOC_DECLARE(M_HDAC); 86 87 /**************************************************************************** 88 * struct hdac_mem 89 * 90 * Holds the resources necessary to describe the physical memory associated 91 * with the device. 92 ****************************************************************************/ 93 struct hdac_mem { 94 struct resource *mem_res; 95 int mem_rid; 96 bus_space_tag_t mem_tag; 97 bus_space_handle_t mem_handle; 98 }; 99 100 /**************************************************************************** 101 * struct hdac_irq 102 * 103 * Holds the resources necessary to describe the irq associated with the 104 * device. 105 ****************************************************************************/ 106 struct hdac_irq { 107 struct resource *irq_res; 108 int irq_rid; 109 void *irq_handle; 110 }; 111 112 /**************************************************************************** 113 * struct hdac_dma 114 * 115 * This structure is used to hold all the information to manage the dma 116 * states. 117 ****************************************************************************/ 118 struct hdac_dma { 119 bus_dma_tag_t dma_tag; 120 bus_dmamap_t dma_map; 121 bus_addr_t dma_paddr; 122 bus_size_t dma_size; 123 caddr_t dma_vaddr; 124 }; 125 126 /**************************************************************************** 127 * struct hdac_rirb 128 * 129 * Hold a response from a verb sent to a codec received via the rirb. 130 ****************************************************************************/ 131 struct hdac_rirb { 132 uint32_t response; 133 uint32_t response_ex; 134 }; 135 136 #define HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK 0x0000000f 137 #define HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET 0 138 #define HDAC_RIRB_RESPONSE_EX_UNSOLICITED 0x00000010 139 140 #define HDAC_RIRB_RESPONSE_EX_SDATA_IN(response_ex) \ 141 (((response_ex) & HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK) >> \ 142 HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET) 143 144 struct hdac_bdle { 145 volatile uint32_t addrl; 146 volatile uint32_t addrh; 147 volatile uint32_t len; 148 volatile uint32_t ioc; 149 } __packed; 150 151 struct hdac_stream { 152 device_t dev; 153 struct hdac_dma bdl; 154 int dir; 155 int stream; 156 int blksz; 157 int running; 158 int bw; 159 int stripe; 160 uint16_t format; 161 }; 162 163 struct hdac_softc { 164 device_t dev; 165 struct mtx *lock; 166 167 struct intr_config_hook intrhook; 168 169 struct hdac_mem mem; 170 struct hdac_irq irq; 171 172 uint32_t quirks_on; 173 uint32_t quirks_off; 174 uint32_t flags; 175 #define HDAC_F_DMA_NOCACHE 0x00000001 176 177 int num_iss; 178 int num_oss; 179 int num_bss; 180 int num_ss; 181 int num_sdo; 182 int support_64bit; 183 184 int corb_size; 185 struct hdac_dma corb_dma; 186 int corb_wp; 187 188 int rirb_size; 189 struct hdac_dma rirb_dma; 190 int rirb_rp; 191 192 struct hdac_dma pos_dma; 193 194 bus_dma_tag_t chan_dmat; 195 196 /* Polling */ 197 int polling; 198 int poll_ival; 199 struct callout poll_callout; 200 201 int unsol_registered; 202 struct task unsolq_task; 203 #define HDAC_UNSOLQ_MAX 64 204 #define HDAC_UNSOLQ_READY 0 205 #define HDAC_UNSOLQ_BUSY 1 206 int unsolq_rp; 207 int unsolq_wp; 208 int unsolq_st; 209 uint32_t unsolq[HDAC_UNSOLQ_MAX]; 210 211 int sdo_bw_used; 212 213 struct hdac_stream *streams; 214 215 struct { 216 device_t dev; 217 uint16_t vendor_id; 218 uint16_t device_id; 219 uint8_t revision_id; 220 uint8_t stepping_id; 221 int pending; 222 uint32_t response; 223 int sdi_bw_used; 224 } codecs[HDAC_CODEC_MAX]; 225 }; 226 227 #endif 228