1 /*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49 */ 50 51 #include <dev/sound/pcm/sound.h> 52 #include <dev/sound/pcm/ac97.h> 53 #include <dev/sound/pci/es137x.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 58 #include <sys/sysctl.h> 59 60 #include "mixer_if.h" 61 62 SND_DECLARE_FILE("$FreeBSD$"); 63 64 static int debug = 0; 65 SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 66 67 #define MEM_MAP_REG 0x14 68 69 /* PCI IDs of supported chips */ 70 #define ES1370_PCI_ID 0x50001274 71 #define ES1371_PCI_ID 0x13711274 72 #define ES1371_PCI_ID2 0x13713274 73 #define CT5880_PCI_ID 0x58801274 74 #define CT4730_PCI_ID 0x89381102 75 76 #define ES1371REV_ES1371_A 0x02 77 #define ES1371REV_ES1371_B 0x09 78 79 #define ES1371REV_ES1373_8 0x08 80 #define ES1371REV_ES1373_A 0x04 81 #define ES1371REV_ES1373_B 0x06 82 83 #define ES1371REV_CT5880_A 0x07 84 85 #define CT5880REV_CT5880_C 0x02 86 #define CT5880REV_CT5880_D 0x03 87 #define CT5880REV_CT5880_E 0x04 88 89 #define CT4730REV_CT4730_A 0x00 90 91 #define ES_DEFAULT_BUFSZ 4096 92 93 /* device private data */ 94 struct es_info; 95 96 struct es_chinfo { 97 struct es_info *parent; 98 struct pcm_channel *channel; 99 struct snd_dbuf *buffer; 100 int dir, num; 101 u_int32_t fmt, blksz, bufsz; 102 }; 103 104 struct es_info { 105 bus_space_tag_t st; 106 bus_space_handle_t sh; 107 bus_dma_tag_t parent_dmat; 108 109 struct resource *reg, *irq; 110 int regtype, regid, irqid; 111 void *ih; 112 113 device_t dev; 114 int num; 115 unsigned int bufsz; 116 117 /* Contents of board's registers */ 118 u_long ctrl; 119 u_long sctrl; 120 struct es_chinfo pch, rch; 121 }; 122 123 /* -------------------------------------------------------------------- */ 124 125 /* prototypes */ 126 static void es_intr(void *); 127 128 static u_int es1371_wait_src_ready(struct es_info *); 129 static void es1371_src_write(struct es_info *, u_short, unsigned short); 130 static u_int es1371_adc_rate(struct es_info *, u_int, int); 131 static u_int es1371_dac_rate(struct es_info *, u_int, int); 132 static int es1371_init(struct es_info *, device_t); 133 static int es1370_init(struct es_info *); 134 static int es1370_wrcodec(struct es_info *, u_char, u_char); 135 136 static u_int32_t es_playfmt[] = { 137 AFMT_U8, 138 AFMT_STEREO | AFMT_U8, 139 AFMT_S16_LE, 140 AFMT_STEREO | AFMT_S16_LE, 141 0 142 }; 143 static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 144 145 static u_int32_t es_recfmt[] = { 146 AFMT_U8, 147 AFMT_STEREO | AFMT_U8, 148 AFMT_S16_LE, 149 AFMT_STEREO | AFMT_S16_LE, 150 0 151 }; 152 static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 153 154 static const struct { 155 unsigned volidx:4; 156 unsigned left:4; 157 unsigned right:4; 158 unsigned stereo:1; 159 unsigned recmask:13; 160 unsigned avail:1; 161 } mixtable[SOUND_MIXER_NRDEVICES] = { 162 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 163 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 164 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 165 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 166 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 167 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 168 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 169 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 170 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 171 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 172 }; 173 174 /* -------------------------------------------------------------------- */ 175 /* The es1370 mixer interface */ 176 177 static int 178 es1370_mixinit(struct snd_mixer *m) 179 { 180 int i; 181 u_int32_t v; 182 183 v = 0; 184 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 185 if (mixtable[i].avail) v |= (1 << i); 186 mix_setdevs(m, v); 187 v = 0; 188 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 189 if (mixtable[i].recmask) v |= (1 << i); 190 mix_setrecdevs(m, v); 191 return 0; 192 } 193 194 static int 195 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 196 { 197 int l, r, rl, rr; 198 199 if (!mixtable[dev].avail) return -1; 200 l = left; 201 r = mixtable[dev].stereo? right : l; 202 if (mixtable[dev].left == 0xf) { 203 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 204 } else { 205 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 206 } 207 if (mixtable[dev].stereo) { 208 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 209 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 210 } 211 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 212 return l | (r << 8); 213 } 214 215 static int 216 es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 217 { 218 int i, j = 0; 219 220 if (src == 0) src = 1 << SOUND_MIXER_MIC; 221 src &= mix_getrecdevs(m); 222 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 223 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 224 225 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 226 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 227 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 228 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 229 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 230 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 231 return src; 232 } 233 234 static kobj_method_t es1370_mixer_methods[] = { 235 KOBJMETHOD(mixer_init, es1370_mixinit), 236 KOBJMETHOD(mixer_set, es1370_mixset), 237 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 238 { 0, 0 } 239 }; 240 MIXER_DECLARE(es1370_mixer); 241 242 /* -------------------------------------------------------------------- */ 243 244 static int 245 es1370_wrcodec(struct es_info *es, u_char i, u_char data) 246 { 247 int wait = 100; /* 100 msec timeout */ 248 249 do { 250 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 251 STAT_CSTAT) == 0) { 252 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 253 ((u_short)i << CODEC_INDEX_SHIFT) | data); 254 return 0; 255 } 256 DELAY(1000); 257 } while (--wait); 258 printf("pcm: es1370_wrcodec timed out\n"); 259 return -1; 260 } 261 262 /* -------------------------------------------------------------------- */ 263 264 /* channel interface */ 265 static void * 266 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 267 { 268 struct es_info *es = devinfo; 269 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 270 271 ch->parent = es; 272 ch->channel = c; 273 ch->buffer = b; 274 ch->bufsz = es->bufsz; 275 ch->blksz = ch->bufsz / 2; 276 ch->num = ch->parent->num++; 277 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) != 0) 278 return NULL; 279 return ch; 280 } 281 282 static int 283 eschan_setdir(kobj_t obj, void *data, int dir) 284 { 285 struct es_chinfo *ch = data; 286 struct es_info *es = ch->parent; 287 288 if (dir == PCMDIR_PLAY) { 289 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8); 290 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer)); 291 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 292 } else { 293 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8); 294 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer)); 295 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 296 } 297 ch->dir = dir; 298 return 0; 299 } 300 301 static int 302 eschan_setformat(kobj_t obj, void *data, u_int32_t format) 303 { 304 struct es_chinfo *ch = data; 305 struct es_info *es = ch->parent; 306 307 if (ch->dir == PCMDIR_PLAY) { 308 es->sctrl &= ~SCTRL_P2FMT; 309 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 310 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 311 } else { 312 es->sctrl &= ~SCTRL_R1FMT; 313 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 314 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 315 } 316 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 317 ch->fmt = format; 318 return 0; 319 } 320 321 static int 322 eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 323 { 324 struct es_chinfo *ch = data; 325 struct es_info *es = ch->parent; 326 327 es->ctrl &= ~CTRL_PCLKDIV; 328 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 329 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 330 /* rec/play speeds locked together - should indicate in flags */ 331 return speed; /* XXX calc real speed */ 332 } 333 334 static int 335 eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 336 { 337 struct es_chinfo *ch = data; 338 struct es_info *es = ch->parent; 339 340 if (ch->dir == PCMDIR_PLAY) { 341 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 342 } else { 343 return es1371_adc_rate(es, speed, 1); /* record */ 344 } 345 } 346 347 static int 348 eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 349 { 350 struct es_chinfo *ch = data; 351 352 ch->blksz = blocksize; 353 ch->bufsz = ch->blksz * 2; 354 sndbuf_resize(ch->buffer, 2, ch->blksz); 355 356 return ch->blksz; 357 } 358 359 static int 360 eschan_trigger(kobj_t obj, void *data, int go) 361 { 362 struct es_chinfo *ch = data; 363 struct es_info *es = ch->parent; 364 unsigned cnt; 365 366 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 367 return 0; 368 369 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 370 371 if (ch->dir == PCMDIR_PLAY) { 372 if (go == PCMTRIG_START) { 373 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 374 es->ctrl |= CTRL_DAC2_EN; 375 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 376 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 377 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_SCOUNT, cnt); 378 /* start at beginning of buffer */ 379 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8); 380 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 381 } else es->ctrl &= ~CTRL_DAC2_EN; 382 } else { 383 if (go == PCMTRIG_START) { 384 es->ctrl |= CTRL_ADC_EN; 385 es->sctrl &= ~SCTRL_R1LOOPSEL; 386 es->sctrl |= SCTRL_R1INTEN; 387 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_SCOUNT, cnt); 388 /* start at beginning of buffer */ 389 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8); 390 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 391 } else es->ctrl &= ~CTRL_ADC_EN; 392 } 393 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 394 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 395 return 0; 396 } 397 398 static int 399 eschan_getptr(kobj_t obj, void *data) 400 { 401 struct es_chinfo *ch = data; 402 struct es_info *es = ch->parent; 403 u_int32_t reg, cnt; 404 405 if (ch->dir == PCMDIR_PLAY) 406 reg = ES1370_REG_DAC2_FRAMECNT; 407 else 408 reg = ES1370_REG_ADC_FRAMECNT; 409 410 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 411 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 412 /* cnt is longwords */ 413 return cnt << 2; 414 } 415 416 static struct pcmchan_caps * 417 eschan_getcaps(kobj_t obj, void *data) 418 { 419 struct es_chinfo *ch = data; 420 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 421 } 422 423 static kobj_method_t eschan1370_methods[] = { 424 KOBJMETHOD(channel_init, eschan_init), 425 KOBJMETHOD(channel_setdir, eschan_setdir), 426 KOBJMETHOD(channel_setformat, eschan_setformat), 427 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 428 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 429 KOBJMETHOD(channel_trigger, eschan_trigger), 430 KOBJMETHOD(channel_getptr, eschan_getptr), 431 KOBJMETHOD(channel_getcaps, eschan_getcaps), 432 { 0, 0 } 433 }; 434 CHANNEL_DECLARE(eschan1370); 435 436 static kobj_method_t eschan1371_methods[] = { 437 KOBJMETHOD(channel_init, eschan_init), 438 KOBJMETHOD(channel_setdir, eschan_setdir), 439 KOBJMETHOD(channel_setformat, eschan_setformat), 440 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 441 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 442 KOBJMETHOD(channel_trigger, eschan_trigger), 443 KOBJMETHOD(channel_getptr, eschan_getptr), 444 KOBJMETHOD(channel_getcaps, eschan_getcaps), 445 { 0, 0 } 446 }; 447 CHANNEL_DECLARE(eschan1371); 448 449 /* -------------------------------------------------------------------- */ 450 /* The interrupt handler */ 451 static void 452 es_intr(void *p) 453 { 454 struct es_info *es = p; 455 unsigned intsrc, sctrl; 456 457 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 458 if ((intsrc & STAT_INTR) == 0) return; 459 460 sctrl = es->sctrl; 461 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 462 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 463 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 464 465 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 466 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 467 468 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 469 if (intsrc & STAT_DAC1); 470 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 471 } 472 473 /* ES1370 specific */ 474 static int 475 es1370_init(struct es_info *es) 476 { 477 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 478 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 479 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 480 481 es->sctrl = 0; 482 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 483 484 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 485 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 486 * {LR,B}CLK2 and run off the LRCLK2 487 * PLL; program DAC_SYNC=0! */ 488 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 489 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 490 491 return 0; 492 } 493 494 /* ES1371 specific */ 495 int 496 es1371_init(struct es_info *es, device_t dev) 497 { 498 int idx; 499 int devid = pci_get_devid(dev); 500 int revid = pci_get_revid(dev); 501 502 if (debug > 0) printf("es_init\n"); 503 504 es->num = 0; 505 es->ctrl = 0; 506 es->sctrl = 0; 507 /* initialize the chips */ 508 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 509 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 510 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 511 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 512 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E) || 513 (devid == CT4730_PCI_ID)) { 514 bus_space_write_4(es->st, es->sh, ES1370_REG_STATUS, 0x20000000); 515 DELAY(20000); 516 if (debug > 0) device_printf(dev, "ac97 2.1 enabled\n"); 517 } else { /* pre ac97 2.1 card */ 518 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 519 if (debug > 0) device_printf(dev, "ac97 pre-2.1 enabled\n"); 520 } 521 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 522 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 523 /* AC'97 warm reset to start the bitclk */ 524 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 525 DELAY(2000); 526 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 527 /* Init the sample rate converter */ 528 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 529 for (idx = 0; idx < 0x80; idx++) 530 es1371_src_write(es, idx, 0); 531 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 532 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 533 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 534 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 535 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 536 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 537 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 538 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 539 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 540 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 541 es1371_adc_rate (es, 22050, 1); 542 es1371_dac_rate (es, 22050, 1); 543 es1371_dac_rate (es, 22050, 2); 544 /* WARNING: 545 * enabling the sample rate converter without properly programming 546 * its parameters causes the chip to lock up (the SRC busy bit will 547 * be stuck high, and I've found no way to rectify this other than 548 * power cycle) 549 */ 550 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 551 552 return (0); 553 } 554 555 /* -------------------------------------------------------------------- */ 556 557 static int 558 es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 559 { 560 int sl; 561 unsigned t, x; 562 struct es_info *es = (struct es_info*)s; 563 564 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 565 566 for (t = 0; t < 0x1000; t++) 567 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 568 break; 569 sl = spltty(); 570 /* save the current state for later */ 571 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 572 /* enable SRC state data in SRC mux */ 573 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 574 (es1371_wait_src_ready(s) & 575 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 576 /* wait for a SAFE time to write addr/data and then do it, dammit */ 577 for (t = 0; t < 0x1000; t++) 578 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 579 break; 580 581 if (debug > 2) 582 printf("one b_s_w: 0x%lx 0x%x 0x%x\n", 583 rman_get_start(es->reg), ES1371_REG_CODEC, 584 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 585 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 586 587 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 588 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 589 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 590 /* restore SRC reg */ 591 es1371_wait_src_ready(s); 592 if (debug > 2) 593 printf("two b_s_w: 0x%lx 0x%x 0x%x\n", 594 rman_get_start(es->reg), ES1371_REG_SMPRATE, x); 595 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 596 splx(sl); 597 598 return 0; 599 } 600 601 static int 602 es1371_rdcd(kobj_t obj, void *s, int addr) 603 { 604 int sl; 605 unsigned t, x = 0; 606 struct es_info *es = (struct es_info *)s; 607 608 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 609 610 for (t = 0; t < 0x1000; t++) 611 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 612 break; 613 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 614 615 sl = spltty(); 616 617 /* save the current state for later */ 618 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 619 /* enable SRC state data in SRC mux */ 620 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 621 (es1371_wait_src_ready(s) & 622 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 623 /* wait for a SAFE time to write addr/data and then do it, dammit */ 624 for (t = 0; t < 0x5000; t++) 625 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 626 break; 627 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 628 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 629 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 630 631 /* restore SRC reg */ 632 es1371_wait_src_ready(s); 633 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 634 635 splx(sl); 636 637 /* now wait for the stinkin' data (RDY) */ 638 for (t = 0; t < 0x1000; t++) 639 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 640 break; 641 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 642 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 643 } 644 645 static kobj_method_t es1371_ac97_methods[] = { 646 KOBJMETHOD(ac97_read, es1371_rdcd), 647 KOBJMETHOD(ac97_write, es1371_wrcd), 648 { 0, 0 } 649 }; 650 AC97_DECLARE(es1371_ac97); 651 652 /* -------------------------------------------------------------------- */ 653 654 static u_int 655 es1371_src_read(struct es_info *es, u_short reg) 656 { 657 unsigned int r; 658 659 r = es1371_wait_src_ready(es) & 660 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 661 r |= ES1371_SRC_RAM_ADDRO(reg); 662 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 663 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 664 } 665 666 static void 667 es1371_src_write(struct es_info *es, u_short reg, u_short data){ 668 u_int r; 669 670 r = es1371_wait_src_ready(es) & 671 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 672 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 673 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 674 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 675 } 676 677 static u_int 678 es1371_adc_rate(struct es_info *es, u_int rate, int set) 679 { 680 u_int n, truncm, freq, result; 681 682 if (rate > 48000) rate = 48000; 683 if (rate < 4000) rate = 4000; 684 n = rate / 3000; 685 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 686 n--; 687 truncm = (21 * n - 1) | 1; 688 freq = ((48000UL << 15) / rate) * n; 689 result = (48000UL << 15) / (freq / n); 690 if (set) { 691 if (rate >= 24000) { 692 if (truncm > 239) truncm = 239; 693 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 694 (((239 - truncm) >> 1) << 9) | (n << 4)); 695 } else { 696 if (truncm > 119) truncm = 119; 697 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 698 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 699 } 700 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 701 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 702 0x00ff) | ((freq >> 5) & 0xfc00)); 703 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 704 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 705 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 706 } 707 return result; 708 } 709 710 static u_int 711 es1371_dac_rate(struct es_info *es, u_int rate, int set) 712 { 713 u_int freq, r, result, dac, dis; 714 715 if (rate > 48000) rate = 48000; 716 if (rate < 4000) rate = 4000; 717 freq = (rate << 15) / 3000; 718 result = (freq * 3000) >> 15; 719 if (set) { 720 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 721 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 722 723 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 724 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 725 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 726 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 727 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 728 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 729 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 730 } 731 return result; 732 } 733 734 static u_int 735 es1371_wait_src_ready(struct es_info *es) 736 { 737 u_int t, r; 738 739 for (t = 0; t < 500; t++) { 740 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 741 return r; 742 DELAY(1000); 743 } 744 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 745 return 0; 746 } 747 748 /* -------------------------------------------------------------------- */ 749 750 /* 751 * Probe and attach the card 752 */ 753 754 static int 755 es_pci_probe(device_t dev) 756 { 757 switch(pci_get_devid(dev)) { 758 case ES1370_PCI_ID: 759 device_set_desc(dev, "AudioPCI ES1370"); 760 return 0; 761 762 case ES1371_PCI_ID: 763 switch(pci_get_revid(dev)) { 764 case ES1371REV_ES1371_A: 765 device_set_desc(dev, "AudioPCI ES1371-A"); 766 return 0; 767 768 case ES1371REV_ES1371_B: 769 device_set_desc(dev, "AudioPCI ES1371-B"); 770 return 0; 771 772 case ES1371REV_ES1373_A: 773 device_set_desc(dev, "AudioPCI ES1373-A"); 774 return 0; 775 776 case ES1371REV_ES1373_B: 777 device_set_desc(dev, "AudioPCI ES1373-B"); 778 return 0; 779 780 case ES1371REV_ES1373_8: 781 device_set_desc(dev, "AudioPCI ES1373-8"); 782 return 0; 783 784 case ES1371REV_CT5880_A: 785 device_set_desc(dev, "Creative CT5880-A"); 786 return 0; 787 788 default: 789 device_set_desc(dev, "AudioPCI ES1371-?"); 790 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 791 return 0; 792 } 793 794 case ES1371_PCI_ID2: 795 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 796 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 797 return 0; 798 799 case CT4730_PCI_ID: 800 switch(pci_get_revid(dev)) { 801 case CT4730REV_CT4730_A: 802 device_set_desc(dev, "Creative SB AudioPCI CT4730"); 803 return 0; 804 default: 805 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 806 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 807 return 0; 808 } 809 810 case CT5880_PCI_ID: 811 switch(pci_get_revid(dev)) { 812 case CT5880REV_CT5880_C: 813 device_set_desc(dev, "Creative CT5880-C"); 814 return 0; 815 816 case CT5880REV_CT5880_D: 817 device_set_desc(dev, "Creative CT5880-D"); 818 return 0; 819 820 case CT5880REV_CT5880_E: 821 device_set_desc(dev, "Creative CT5880-E"); 822 return 0; 823 824 default: 825 device_set_desc(dev, "Creative CT5880-?"); 826 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 827 return 0; 828 } 829 830 default: 831 return ENXIO; 832 } 833 } 834 835 static int 836 es_pci_attach(device_t dev) 837 { 838 u_int32_t data; 839 struct es_info *es = 0; 840 int mapped; 841 char status[SND_STATUSLEN]; 842 struct ac97_info *codec = 0; 843 kobj_class_t ct = NULL; 844 845 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 846 device_printf(dev, "cannot allocate softc\n"); 847 return ENXIO; 848 } 849 850 es->dev = dev; 851 mapped = 0; 852 data = pci_read_config(dev, PCIR_COMMAND, 2); 853 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 854 pci_write_config(dev, PCIR_COMMAND, data, 2); 855 data = pci_read_config(dev, PCIR_COMMAND, 2); 856 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 857 es->regid = MEM_MAP_REG; 858 es->regtype = SYS_RES_MEMORY; 859 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 860 RF_ACTIVE); 861 if (es->reg) { 862 es->st = rman_get_bustag(es->reg); 863 es->sh = rman_get_bushandle(es->reg); 864 mapped++; 865 } 866 } 867 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 868 es->regid = PCIR_BAR(0); 869 es->regtype = SYS_RES_IOPORT; 870 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 871 RF_ACTIVE); 872 if (es->reg) { 873 es->st = rman_get_bustag(es->reg); 874 es->sh = rman_get_bushandle(es->reg); 875 mapped++; 876 } 877 } 878 if (mapped == 0) { 879 device_printf(dev, "unable to map register space\n"); 880 goto bad; 881 } 882 883 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 884 885 if (pci_get_devid(dev) == ES1371_PCI_ID || 886 pci_get_devid(dev) == ES1371_PCI_ID2 || 887 pci_get_devid(dev) == CT5880_PCI_ID || 888 pci_get_devid(dev) == CT4730_PCI_ID) { 889 if(-1 == es1371_init(es, dev)) { 890 device_printf(dev, "unable to initialize the card\n"); 891 goto bad; 892 } 893 codec = AC97_CREATE(dev, es, es1371_ac97); 894 if (codec == NULL) goto bad; 895 /* our init routine does everything for us */ 896 /* set to NULL; flag mixer_init not to run the ac97_init */ 897 /* ac97_mixer.init = NULL; */ 898 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad; 899 ct = &eschan1371_class; 900 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 901 if (-1 == es1370_init(es)) { 902 device_printf(dev, "unable to initialize the card\n"); 903 goto bad; 904 } 905 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad; 906 ct = &eschan1370_class; 907 } else goto bad; 908 909 es->irqid = 0; 910 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 911 RF_ACTIVE | RF_SHAREABLE); 912 if (!es->irq || snd_setup_intr(dev, es->irq, 0, es_intr, es, &es->ih)) { 913 device_printf(dev, "unable to map interrupt\n"); 914 goto bad; 915 } 916 917 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 918 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 919 /*highaddr*/BUS_SPACE_MAXADDR, 920 /*filter*/NULL, /*filterarg*/NULL, 921 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 922 /*flags*/0, /*lockfunc*/busdma_lock_mutex, 923 /*lockarg*/&Giant, &es->parent_dmat) != 0) { 924 device_printf(dev, "unable to create dma tag\n"); 925 goto bad; 926 } 927 928 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 929 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 930 rman_get_start(es->reg), rman_get_start(es->irq),PCM_KLDSTRING(snd_es137x)); 931 932 if (pcm_register(dev, es, 1, 1)) goto bad; 933 pcm_addchan(dev, PCMDIR_REC, ct, es); 934 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 935 pcm_setstatus(dev, status); 936 937 return 0; 938 939 bad: 940 if (codec) ac97_destroy(codec); 941 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 942 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 943 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 944 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 945 if (es) free(es, M_DEVBUF); 946 return ENXIO; 947 } 948 949 static int 950 es_pci_detach(device_t dev) 951 { 952 int r; 953 struct es_info *es; 954 955 r = pcm_unregister(dev); 956 if (r) 957 return r; 958 959 es = pcm_getdevinfo(dev); 960 bus_release_resource(dev, es->regtype, es->regid, es->reg); 961 bus_teardown_intr(dev, es->irq, es->ih); 962 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 963 bus_dma_tag_destroy(es->parent_dmat); 964 free(es, M_DEVBUF); 965 966 return 0; 967 } 968 969 static device_method_t es_methods[] = { 970 /* Device interface */ 971 DEVMETHOD(device_probe, es_pci_probe), 972 DEVMETHOD(device_attach, es_pci_attach), 973 DEVMETHOD(device_detach, es_pci_detach), 974 975 { 0, 0 } 976 }; 977 978 static driver_t es_driver = { 979 "pcm", 980 es_methods, 981 PCM_SOFTC_SIZE, 982 }; 983 984 DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 985 MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 986 MODULE_VERSION(snd_es137x, 1); 987