1 /* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * $FreeBSD$ 42 */ 43 44 /* 45 * Part of this code was heavily inspired by the linux driver from 46 * Thomas Sailer (sailer@ife.ee.ethz.ch) 47 * Just about everything has been touched and reworked in some way but 48 * the all the underlying sequences/timing/register values are from 49 * Thomas' code. 50 * 51 */ 52 53 #include "pci.h" 54 #include "pcm.h" 55 56 #include <dev/sound/pcm/sound.h> 57 #include <dev/sound/pcm/ac97.h> 58 #include <dev/sound/pci/es137x.h> 59 60 #include <pci/pcireg.h> 61 #include <pci/pcivar.h> 62 63 #include <sys/sysctl.h> 64 65 static int debug = 0; 66 SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 67 68 #define MEM_MAP_REG 0x14 69 70 /* PCI IDs of supported chips */ 71 #define ES1370_PCI_ID 0x50001274 72 #define ES1371_PCI_ID 0x13711274 73 74 /* device private data */ 75 struct es_info; 76 77 typedef struct es_chinfo { 78 struct es_info *parent; 79 pcm_channel *channel; 80 snd_dbuf *buffer; 81 int dir, num; 82 u_int32_t fmt; 83 } es_chinfo_t; 84 85 typedef struct es_info { 86 bus_space_tag_t st; 87 bus_space_handle_t sh; 88 bus_dma_tag_t parent_dmat; 89 90 int num; 91 /* Contents of board's registers */ 92 u_long ctrl; 93 u_long sctrl; 94 struct es_chinfo pch, rch; 95 } es_info_t; 96 97 /* -------------------------------------------------------------------- */ 98 99 /* prototypes */ 100 static void es_intr(void *); 101 102 static void es1371_wrcodec(void *, int, u_int32_t); 103 static u_int32_t es1371_rdcodec(void *, int); 104 static u_int es1371_wait_src_ready(es_info_t *); 105 static void es1371_src_write(es_info_t *, u_short, unsigned short); 106 static u_int es1371_adc_rate(es_info_t *, u_int, int); 107 static u_int es1371_dac_rate(es_info_t *, u_int, int); 108 static int es1371_init(es_info_t *es); 109 static int eschan1371_setspeed(void *data, u_int32_t speed); 110 111 static int es1370_init(struct es_info *); 112 static int es1370_wrcodec(struct es_info *, u_char, u_char); 113 114 /* channel interface */ 115 static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 116 static int eschan_setdir(void *data, int dir); 117 static int eschan_setformat(void *data, u_int32_t format); 118 static int eschan1370_setspeed(void *data, u_int32_t speed); 119 static int eschan_setblocksize(void *data, u_int32_t blocksize); 120 static int eschan_trigger(void *data, int go); 121 static int eschan_getptr(void *data); 122 static pcmchan_caps *eschan_getcaps(void *data); 123 124 static pcmchan_caps es_playcaps = { 125 4000, 48000, 126 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 127 AFMT_STEREO | AFMT_S16_LE 128 }; 129 130 static pcmchan_caps es_reccaps = { 131 4000, 48000, 132 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 133 AFMT_STEREO | AFMT_S16_LE 134 }; 135 136 static pcm_channel es1370_chantemplate = { 137 eschan_init, 138 eschan_setdir, 139 eschan_setformat, 140 eschan1370_setspeed, 141 eschan_setblocksize, 142 eschan_trigger, 143 eschan_getptr, 144 eschan_getcaps, 145 }; 146 147 static pcm_channel es1371_chantemplate = { 148 eschan_init, 149 eschan_setdir, 150 eschan_setformat, 151 eschan1371_setspeed, 152 eschan_setblocksize, 153 eschan_trigger, 154 eschan_getptr, 155 eschan_getcaps, 156 }; 157 158 /* -------------------------------------------------------------------- */ 159 160 /* The es1370 mixer interface */ 161 162 static int es1370_mixinit(snd_mixer *m); 163 static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 164 static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 165 166 static snd_mixer es1370_mixer = { 167 "AudioPCI 1370 mixer", 168 es1370_mixinit, 169 es1370_mixset, 170 es1370_mixsetrecsrc, 171 }; 172 173 static const struct { 174 unsigned volidx:4; 175 unsigned left:4; 176 unsigned right:4; 177 unsigned stereo:1; 178 unsigned recmask:13; 179 unsigned avail:1; 180 } mixtable[SOUND_MIXER_NRDEVICES] = { 181 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 182 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 183 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 184 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 185 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 186 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 187 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 188 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 189 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 190 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 191 }; 192 193 static int 194 es1370_mixinit(snd_mixer *m) 195 { 196 int i; 197 u_int32_t v; 198 199 v = 0; 200 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 201 if (mixtable[i].avail) v |= (1 << i); 202 mix_setdevs(m, v); 203 v = 0; 204 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 205 if (mixtable[i].recmask) v |= (1 << i); 206 mix_setrecdevs(m, v); 207 return 0; 208 } 209 210 static int 211 es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 212 { 213 int l, r, rl, rr; 214 215 if (!mixtable[dev].avail) return -1; 216 l = left; 217 r = mixtable[dev].stereo? right : l; 218 if (mixtable[dev].left == 0xf) { 219 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 220 } else { 221 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 222 } 223 if (mixtable[dev].stereo) { 224 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 225 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 226 } 227 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 228 return l | (r << 8); 229 } 230 231 static int 232 es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 233 { 234 int i, j = 0; 235 236 if (src == 0) src = 1 << SOUND_MIXER_MIC; 237 src &= mix_getrecdevs(m); 238 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 239 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 240 241 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 242 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 243 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 244 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 245 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 246 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 247 return src; 248 } 249 250 static int 251 es1370_wrcodec(struct es_info *es, u_char i, u_char data) 252 { 253 int wait = 100; /* 100 msec timeout */ 254 255 do { 256 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 257 STAT_CSTAT) == 0) { 258 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 259 ((u_short)i << CODEC_INDEX_SHIFT) | data); 260 return 0; 261 } 262 DELAY(1000); 263 } while (--wait); 264 printf("pcm: es1370_wrcodec timed out\n"); 265 return -1; 266 } 267 268 /* -------------------------------------------------------------------- */ 269 270 /* channel interface */ 271 static void * 272 eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 273 { 274 struct es_info *es = devinfo; 275 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 276 277 ch->parent = es; 278 ch->channel = c; 279 ch->buffer = b; 280 ch->buffer->bufsize = ES_BUFFSIZE; 281 ch->num = ch->parent->num++; 282 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 283 return ch; 284 } 285 286 static int 287 eschan_setdir(void *data, int dir) 288 { 289 struct es_chinfo *ch = data; 290 struct es_info *es = ch->parent; 291 292 if (dir == PCMDIR_PLAY) { 293 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 294 ES1370_REG_DAC2_FRAMEADR >> 8); 295 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 296 vtophys(ch->buffer->buf)); 297 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 298 (ch->buffer->bufsize >> 2) - 1); 299 } else { 300 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 301 ES1370_REG_ADC_FRAMEADR >> 8); 302 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 303 vtophys(ch->buffer->buf)); 304 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 305 (ch->buffer->bufsize >> 2) - 1); 306 } 307 ch->dir = dir; 308 return 0; 309 } 310 311 static int 312 eschan_setformat(void *data, u_int32_t format) 313 { 314 struct es_chinfo *ch = data; 315 struct es_info *es = ch->parent; 316 317 if (ch->dir == PCMDIR_PLAY) { 318 es->sctrl &= ~SCTRL_P2FMT; 319 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 320 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 321 } else { 322 es->sctrl &= ~SCTRL_R1FMT; 323 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 324 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 325 } 326 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 327 ch->fmt = format; 328 return 0; 329 } 330 331 static int 332 eschan1370_setspeed(void *data, u_int32_t speed) 333 { 334 struct es_chinfo *ch = data; 335 struct es_info *es = ch->parent; 336 337 es->ctrl &= ~CTRL_PCLKDIV; 338 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 339 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 340 /* rec/play speeds locked together - should indicate in flags */ 341 return speed; /* XXX calc real speed */ 342 } 343 344 int 345 eschan1371_setspeed(void *data, u_int32_t speed) 346 { 347 struct es_chinfo *ch = data; 348 struct es_info *es = ch->parent; 349 350 if (ch->dir == PCMDIR_PLAY) { 351 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 352 } else { 353 return es1371_adc_rate(es, speed, 1); /* record */ 354 } 355 } 356 357 static int 358 eschan_setblocksize(void *data, u_int32_t blocksize) 359 { 360 return blocksize; 361 } 362 363 static int 364 eschan_trigger(void *data, int go) 365 { 366 struct es_chinfo *ch = data; 367 struct es_info *es = ch->parent; 368 unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 369 370 if (ch->dir == PCMDIR_PLAY) { 371 if (go == PCMTRIG_START) { 372 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 373 es->ctrl |= CTRL_DAC2_EN; 374 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 375 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 376 SCTRL_P2DACSEN); 377 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 378 bus_space_write_4(es->st, es->sh, 379 ES1370_REG_DAC2_SCOUNT, cnt); 380 } else es->ctrl &= ~CTRL_DAC2_EN; 381 } else { 382 if (go == PCMTRIG_START) { 383 es->ctrl |= CTRL_ADC_EN; 384 es->sctrl &= ~SCTRL_R1LOOPSEL; 385 es->sctrl |= SCTRL_R1INTEN; 386 bus_space_write_4(es->st, es->sh, 387 ES1370_REG_ADC_SCOUNT, cnt); 388 } else es->ctrl &= ~CTRL_ADC_EN; 389 } 390 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 391 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 392 return 0; 393 } 394 395 static int 396 eschan_getptr(void *data) 397 { 398 struct es_chinfo *ch = data; 399 struct es_info *es = ch->parent; 400 if (ch->dir == PCMDIR_PLAY) { 401 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 402 ES1370_REG_DAC2_FRAMECNT >> 8); 403 return (bus_space_read_4(es->st, es->sh, 404 ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 405 } else { 406 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 407 ES1370_REG_ADC_FRAMECNT >> 8); 408 return (bus_space_read_4(es->st, es->sh, 409 ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 410 } 411 } 412 413 static pcmchan_caps * 414 eschan_getcaps(void *data) 415 { 416 struct es_chinfo *ch = data; 417 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 418 } 419 420 /* The interrupt handler */ 421 static void 422 es_intr(void *p) 423 { 424 struct es_info *es = p; 425 unsigned intsrc, sctrl; 426 427 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 428 if ((intsrc & STAT_INTR) == 0) return; 429 430 sctrl = es->sctrl; 431 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 432 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 433 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 434 435 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 436 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 437 438 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 439 if (intsrc & STAT_DAC1); 440 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 441 } 442 443 /* ES1370 specific */ 444 static int 445 es1370_init(struct es_info *es) 446 { 447 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 448 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 449 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 450 451 es->sctrl = 0; 452 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 453 454 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 455 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 456 * {LR,B}CLK2 and run off the LRCLK2 457 * PLL; program DAC_SYNC=0! */ 458 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 459 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 460 461 return 0; 462 } 463 464 /* ES1371 specific */ 465 int 466 es1371_init(struct es_info *es) 467 { 468 int idx; 469 470 if (debug > 0) printf("es_init\n"); 471 472 es->num = 0; 473 es->ctrl = 0; 474 es->sctrl = 0; 475 /* initialize the chips */ 476 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 477 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 478 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 479 /* AC'97 warm reset to start the bitclk */ 480 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 481 DELAY(2000); 482 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL,es->ctrl); 483 /* Init the sample rate converter */ 484 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 485 for (idx = 0; idx < 0x80; idx++) 486 es1371_src_write(es, idx, 0); 487 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 488 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 489 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 490 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 491 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 492 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 493 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 494 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 495 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 496 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 497 es1371_adc_rate (es, 22050, 1); 498 es1371_dac_rate (es, 22050, 1); 499 es1371_dac_rate (es, 22050, 2); 500 /* WARNING: 501 * enabling the sample rate converter without properly programming 502 * its parameters causes the chip to lock up (the SRC busy bit will 503 * be stuck high, and I've found no way to rectify this other than 504 * power cycle) 505 */ 506 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 507 508 return (0); 509 } 510 511 static void 512 es1371_wrcodec(void *s, int addr, u_int32_t data) 513 { 514 int sl; 515 unsigned t, x; 516 struct es_info *es = (struct es_info*)s; 517 518 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 519 520 for (t = 0; t < 0x1000; t++) 521 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 522 break; 523 sl = spltty(); 524 /* save the current state for later */ 525 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 526 /* enable SRC state data in SRC mux */ 527 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 528 (es1371_wait_src_ready(s) & 529 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 530 /* wait for a SAFE time to write addr/data and then do it, dammit */ 531 for (t = 0; t < 0x1000; t++) 532 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 533 break; 534 535 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 536 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 537 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 538 539 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 540 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 541 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 542 /* restore SRC reg */ 543 es1371_wait_src_ready(s); 544 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 545 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 546 splx(sl); 547 } 548 549 static u_int32_t 550 es1371_rdcodec(void *s, int addr) 551 { 552 int sl; 553 unsigned t, x; 554 struct es_info *es = (struct es_info *)s; 555 556 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 557 558 for (t = 0; t < 0x1000; t++) 559 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 560 break; 561 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 562 563 sl = spltty(); 564 565 /* save the current state for later */ 566 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 567 /* enable SRC state data in SRC mux */ 568 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 569 (es1371_wait_src_ready(s) & 570 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 571 /* wait for a SAFE time to write addr/data and then do it, dammit */ 572 for (t = 0; t < 0x5000; t++) 573 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 574 break; 575 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 576 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 577 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 578 579 /* restore SRC reg */ 580 es1371_wait_src_ready(s); 581 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 582 583 splx(sl); 584 585 /* now wait for the stinkin' data (RDY) */ 586 for (t = 0; t < 0x1000; t++) 587 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 588 break; 589 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 590 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 591 } 592 593 static u_int 594 es1371_src_read(es_info_t *es, u_short reg) 595 { 596 unsigned int r; 597 598 r = es1371_wait_src_ready(es) & 599 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 600 r |= ES1371_SRC_RAM_ADDRO(reg); 601 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 602 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 603 } 604 605 static void 606 es1371_src_write(es_info_t *es, u_short reg, u_short data){ 607 u_int r; 608 609 r = es1371_wait_src_ready(es) & 610 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 611 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 612 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 613 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 614 } 615 616 static u_int 617 es1371_adc_rate(es_info_t *es, u_int rate, int set) 618 { 619 u_int n, truncm, freq, result; 620 621 if (rate > 48000) rate = 48000; 622 if (rate < 4000) rate = 4000; 623 n = rate / 3000; 624 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 625 n--; 626 truncm = (21 * n - 1) | 1; 627 freq = ((48000UL << 15) / rate) * n; 628 result = (48000UL << 15) / (freq / n); 629 if (set) { 630 if (rate >= 24000) { 631 if (truncm > 239) truncm = 239; 632 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 633 (((239 - truncm) >> 1) << 9) | (n << 4)); 634 } else { 635 if (truncm > 119) truncm = 119; 636 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 637 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 638 } 639 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 640 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 641 0x00ff) | ((freq >> 5) & 0xfc00)); 642 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 643 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 644 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 645 } 646 return result; 647 } 648 649 static u_int 650 es1371_dac_rate(es_info_t *es, u_int rate, int set) 651 { 652 u_int freq, r, result, dac, dis; 653 654 if (rate > 48000) rate = 48000; 655 if (rate < 4000) rate = 4000; 656 freq = (rate << 15) / 3000; 657 result = (freq * 3000) >> 15; 658 if (set) { 659 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 660 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 661 662 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 663 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 664 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 665 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 666 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 667 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 668 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 669 } 670 return result; 671 } 672 673 static u_int 674 es1371_wait_src_ready(es_info_t *es) 675 { 676 u_int t, r; 677 678 for (t = 0; t < 500; t++) { 679 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 680 return r; 681 DELAY(1000); 682 } 683 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 684 return 0; 685 } 686 687 /* -------------------------------------------------------------------- */ 688 689 /* 690 * Probe and attach the card 691 */ 692 693 static int 694 es_pci_probe(device_t dev) 695 { 696 if (pci_get_devid(dev) == ES1370_PCI_ID) { 697 device_set_desc(dev, "AudioPCI ES1370"); 698 return 0; 699 } else if (pci_get_devid(dev) == ES1371_PCI_ID) { 700 device_set_desc(dev, "AudioPCI ES1371"); 701 return 0; 702 } 703 return ENXIO; 704 } 705 706 static int 707 es_pci_attach(device_t dev) 708 { 709 snddev_info *d; 710 u_int32_t data; 711 struct es_info *es = 0; 712 int type = 0; 713 int regid; 714 struct resource *reg = 0; 715 int mapped; 716 int irqid; 717 struct resource *irq = 0; 718 void *ih = 0; 719 char status[SND_STATUSLEN]; 720 struct ac97_info *codec; 721 pcm_channel *ct = NULL; 722 723 d = device_get_softc(dev); 724 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 725 device_printf(dev, "cannot allocate softc\n"); 726 return ENXIO; 727 } 728 bzero(es, sizeof *es); 729 730 mapped = 0; 731 data = pci_read_config(dev, PCIR_COMMAND, 2); 732 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 733 regid = MEM_MAP_REG; 734 type = SYS_RES_MEMORY; 735 reg = bus_alloc_resource(dev, type, ®id, 736 0, ~0, 1, RF_ACTIVE); 737 if (reg) { 738 es->st = rman_get_bustag(reg); 739 es->sh = rman_get_bushandle(reg); 740 mapped++; 741 } 742 } 743 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 744 regid = PCI_MAP_REG_START; 745 type = SYS_RES_IOPORT; 746 reg = bus_alloc_resource(dev, type, ®id, 747 0, ~0, 1, RF_ACTIVE); 748 if (reg) { 749 es->st = rman_get_bustag(reg); 750 es->sh = rman_get_bushandle(reg); 751 mapped++; 752 } 753 } 754 if (mapped == 0) { 755 device_printf(dev, "unable to map register space\n"); 756 goto bad; 757 } 758 759 if (pci_get_devid(dev) == ES1371_PCI_ID) { 760 if(-1 == es1371_init(es)) { 761 device_printf(dev, "unable to initialize the card\n"); 762 goto bad; 763 } 764 codec = ac97_create(es, es1371_rdcodec, es1371_wrcodec); 765 if (codec == NULL) goto bad; 766 /* our init routine does everything for us */ 767 /* set to NULL; flag mixer_init not to run the ac97_init */ 768 /* ac97_mixer.init = NULL; */ 769 mixer_init(d, &ac97_mixer, codec); 770 ct = &es1371_chantemplate; 771 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 772 if (-1 == es1370_init(es)) { 773 device_printf(dev, "unable to initialize the card\n"); 774 goto bad; 775 } 776 mixer_init(d, &es1370_mixer, es); 777 ct = &es1370_chantemplate; 778 } else goto bad; 779 780 irqid = 0; 781 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 782 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 783 if (!irq 784 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 785 device_printf(dev, "unable to map interrupt\n"); 786 goto bad; 787 } 788 789 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 790 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 791 /*highaddr*/BUS_SPACE_MAXADDR, 792 /*filter*/NULL, /*filterarg*/NULL, 793 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 794 /*flags*/0, &es->parent_dmat) != 0) { 795 device_printf(dev, "unable to create dma tag\n"); 796 goto bad; 797 } 798 799 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 800 (type == SYS_RES_IOPORT)? "io" : "memory", 801 rman_get_start(reg), rman_get_start(irq)); 802 803 if (pcm_register(dev, es, 1, 1)) goto bad; 804 pcm_addchan(dev, PCMDIR_REC, ct, es); 805 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 806 pcm_setstatus(dev, status); 807 808 return 0; 809 810 bad: 811 if (es) free(es, M_DEVBUF); 812 if (reg) bus_release_resource(dev, type, regid, reg); 813 if (ih) bus_teardown_intr(dev, irq, ih); 814 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 815 return ENXIO; 816 } 817 818 static device_method_t es_methods[] = { 819 /* Device interface */ 820 DEVMETHOD(device_probe, es_pci_probe), 821 DEVMETHOD(device_attach, es_pci_attach), 822 823 { 0, 0 } 824 }; 825 826 static driver_t es_driver = { 827 "pcm", 828 es_methods, 829 sizeof(snddev_info), 830 }; 831 832 static devclass_t pcm_devclass; 833 834 DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0); 835