1 /* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49 */ 50 51 #include <dev/sound/pcm/sound.h> 52 #include <dev/sound/pcm/ac97.h> 53 #include <dev/sound/pci/es137x.h> 54 55 #include <pci/pcireg.h> 56 #include <pci/pcivar.h> 57 58 #include <sys/sysctl.h> 59 60 #include "mixer_if.h" 61 62 SND_DECLARE_FILE("$FreeBSD$"); 63 64 static int debug = 0; 65 SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 66 67 #define MEM_MAP_REG 0x14 68 69 /* PCI IDs of supported chips */ 70 #define ES1370_PCI_ID 0x50001274 71 #define ES1371_PCI_ID 0x13711274 72 #define ES1371_PCI_ID2 0x13713274 73 #define CT5880_PCI_ID 0x58801274 74 75 #define ES1371REV_ES1371_A 0x02 76 #define ES1371REV_ES1371_B 0x09 77 78 #define ES1371REV_ES1373_8 0x08 79 #define ES1371REV_ES1373_A 0x04 80 #define ES1371REV_ES1373_B 0x06 81 82 #define ES1371REV_CT5880_A 0x07 83 84 #define CT5880REV_CT5880_C 0x02 85 #define CT5880REV_CT5880_D 0x03 86 #define CT5880REV_CT5880_E 0x04 87 88 #define ES_DEFAULT_BUFSZ 4096 89 90 /* device private data */ 91 struct es_info; 92 93 struct es_chinfo { 94 struct es_info *parent; 95 struct pcm_channel *channel; 96 struct snd_dbuf *buffer; 97 int dir, num; 98 u_int32_t fmt, blksz, bufsz; 99 }; 100 101 struct es_info { 102 bus_space_tag_t st; 103 bus_space_handle_t sh; 104 bus_dma_tag_t parent_dmat; 105 106 struct resource *reg, *irq; 107 int regtype, regid, irqid; 108 void *ih; 109 110 device_t dev; 111 int num; 112 unsigned int bufsz; 113 114 /* Contents of board's registers */ 115 u_long ctrl; 116 u_long sctrl; 117 struct es_chinfo pch, rch; 118 }; 119 120 /* -------------------------------------------------------------------- */ 121 122 /* prototypes */ 123 static void es_intr(void *); 124 125 static u_int es1371_wait_src_ready(struct es_info *); 126 static void es1371_src_write(struct es_info *, u_short, unsigned short); 127 static u_int es1371_adc_rate(struct es_info *, u_int, int); 128 static u_int es1371_dac_rate(struct es_info *, u_int, int); 129 static int es1371_init(struct es_info *, device_t); 130 static int es1370_init(struct es_info *); 131 static int es1370_wrcodec(struct es_info *, u_char, u_char); 132 133 static u_int32_t es_playfmt[] = { 134 AFMT_U8, 135 AFMT_STEREO | AFMT_U8, 136 AFMT_S16_LE, 137 AFMT_STEREO | AFMT_S16_LE, 138 0 139 }; 140 static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 141 142 static u_int32_t es_recfmt[] = { 143 AFMT_U8, 144 AFMT_STEREO | AFMT_U8, 145 AFMT_S16_LE, 146 AFMT_STEREO | AFMT_S16_LE, 147 0 148 }; 149 static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 150 151 static const struct { 152 unsigned volidx:4; 153 unsigned left:4; 154 unsigned right:4; 155 unsigned stereo:1; 156 unsigned recmask:13; 157 unsigned avail:1; 158 } mixtable[SOUND_MIXER_NRDEVICES] = { 159 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 160 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 161 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 162 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 163 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 164 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 165 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 166 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 167 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 168 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 169 }; 170 171 /* -------------------------------------------------------------------- */ 172 /* The es1370 mixer interface */ 173 174 static int 175 es1370_mixinit(struct snd_mixer *m) 176 { 177 int i; 178 u_int32_t v; 179 180 v = 0; 181 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 182 if (mixtable[i].avail) v |= (1 << i); 183 mix_setdevs(m, v); 184 v = 0; 185 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 186 if (mixtable[i].recmask) v |= (1 << i); 187 mix_setrecdevs(m, v); 188 return 0; 189 } 190 191 static int 192 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 193 { 194 int l, r, rl, rr; 195 196 if (!mixtable[dev].avail) return -1; 197 l = left; 198 r = mixtable[dev].stereo? right : l; 199 if (mixtable[dev].left == 0xf) { 200 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 201 } else { 202 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 203 } 204 if (mixtable[dev].stereo) { 205 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 206 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 207 } 208 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 209 return l | (r << 8); 210 } 211 212 static int 213 es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 214 { 215 int i, j = 0; 216 217 if (src == 0) src = 1 << SOUND_MIXER_MIC; 218 src &= mix_getrecdevs(m); 219 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 220 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 221 222 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 223 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 224 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 225 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 226 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 227 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 228 return src; 229 } 230 231 static kobj_method_t es1370_mixer_methods[] = { 232 KOBJMETHOD(mixer_init, es1370_mixinit), 233 KOBJMETHOD(mixer_set, es1370_mixset), 234 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 235 { 0, 0 } 236 }; 237 MIXER_DECLARE(es1370_mixer); 238 239 /* -------------------------------------------------------------------- */ 240 241 static int 242 es1370_wrcodec(struct es_info *es, u_char i, u_char data) 243 { 244 int wait = 100; /* 100 msec timeout */ 245 246 do { 247 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 248 STAT_CSTAT) == 0) { 249 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 250 ((u_short)i << CODEC_INDEX_SHIFT) | data); 251 return 0; 252 } 253 DELAY(1000); 254 } while (--wait); 255 printf("pcm: es1370_wrcodec timed out\n"); 256 return -1; 257 } 258 259 /* -------------------------------------------------------------------- */ 260 261 /* channel interface */ 262 static void * 263 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 264 { 265 struct es_info *es = devinfo; 266 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 267 268 ch->parent = es; 269 ch->channel = c; 270 ch->buffer = b; 271 ch->bufsz = es->bufsz; 272 ch->blksz = ch->bufsz / 2; 273 ch->num = ch->parent->num++; 274 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) == -1) return NULL; 275 return ch; 276 } 277 278 static int 279 eschan_setdir(kobj_t obj, void *data, int dir) 280 { 281 struct es_chinfo *ch = data; 282 struct es_info *es = ch->parent; 283 284 if (dir == PCMDIR_PLAY) { 285 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8); 286 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, vtophys(sndbuf_getbuf(ch->buffer))); 287 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 288 } else { 289 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8); 290 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, vtophys(sndbuf_getbuf(ch->buffer))); 291 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 292 } 293 ch->dir = dir; 294 return 0; 295 } 296 297 static int 298 eschan_setformat(kobj_t obj, void *data, u_int32_t format) 299 { 300 struct es_chinfo *ch = data; 301 struct es_info *es = ch->parent; 302 303 if (ch->dir == PCMDIR_PLAY) { 304 es->sctrl &= ~SCTRL_P2FMT; 305 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 306 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 307 } else { 308 es->sctrl &= ~SCTRL_R1FMT; 309 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 310 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 311 } 312 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 313 ch->fmt = format; 314 return 0; 315 } 316 317 static int 318 eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 319 { 320 struct es_chinfo *ch = data; 321 struct es_info *es = ch->parent; 322 323 es->ctrl &= ~CTRL_PCLKDIV; 324 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 325 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 326 /* rec/play speeds locked together - should indicate in flags */ 327 return speed; /* XXX calc real speed */ 328 } 329 330 static int 331 eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 332 { 333 struct es_chinfo *ch = data; 334 struct es_info *es = ch->parent; 335 336 if (ch->dir == PCMDIR_PLAY) { 337 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 338 } else { 339 return es1371_adc_rate(es, speed, 1); /* record */ 340 } 341 } 342 343 static int 344 eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 345 { 346 struct es_chinfo *ch = data; 347 348 ch->blksz = blocksize; 349 ch->bufsz = ch->blksz * 2; 350 sndbuf_resize(ch->buffer, 2, ch->blksz); 351 352 return ch->blksz; 353 } 354 355 static int 356 eschan_trigger(kobj_t obj, void *data, int go) 357 { 358 struct es_chinfo *ch = data; 359 struct es_info *es = ch->parent; 360 unsigned cnt; 361 362 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 363 return 0; 364 365 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 366 367 if (ch->dir == PCMDIR_PLAY) { 368 if (go == PCMTRIG_START) { 369 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 370 es->ctrl |= CTRL_DAC2_EN; 371 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 372 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 373 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_SCOUNT, cnt); 374 /* start at beginning of buffer */ 375 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8); 376 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 377 } else es->ctrl &= ~CTRL_DAC2_EN; 378 } else { 379 if (go == PCMTRIG_START) { 380 es->ctrl |= CTRL_ADC_EN; 381 es->sctrl &= ~SCTRL_R1LOOPSEL; 382 es->sctrl |= SCTRL_R1INTEN; 383 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_SCOUNT, cnt); 384 /* start at beginning of buffer */ 385 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8); 386 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 387 } else es->ctrl &= ~CTRL_ADC_EN; 388 } 389 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 390 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 391 return 0; 392 } 393 394 static int 395 eschan_getptr(kobj_t obj, void *data) 396 { 397 struct es_chinfo *ch = data; 398 struct es_info *es = ch->parent; 399 u_int32_t reg, cnt; 400 401 if (ch->dir == PCMDIR_PLAY) 402 reg = ES1370_REG_DAC2_FRAMECNT; 403 else 404 reg = ES1370_REG_ADC_FRAMECNT; 405 406 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 407 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 408 /* cnt is longwords */ 409 return cnt << 2; 410 } 411 412 static struct pcmchan_caps * 413 eschan_getcaps(kobj_t obj, void *data) 414 { 415 struct es_chinfo *ch = data; 416 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 417 } 418 419 static kobj_method_t eschan1370_methods[] = { 420 KOBJMETHOD(channel_init, eschan_init), 421 KOBJMETHOD(channel_setdir, eschan_setdir), 422 KOBJMETHOD(channel_setformat, eschan_setformat), 423 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 424 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 425 KOBJMETHOD(channel_trigger, eschan_trigger), 426 KOBJMETHOD(channel_getptr, eschan_getptr), 427 KOBJMETHOD(channel_getcaps, eschan_getcaps), 428 { 0, 0 } 429 }; 430 CHANNEL_DECLARE(eschan1370); 431 432 static kobj_method_t eschan1371_methods[] = { 433 KOBJMETHOD(channel_init, eschan_init), 434 KOBJMETHOD(channel_setdir, eschan_setdir), 435 KOBJMETHOD(channel_setformat, eschan_setformat), 436 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 437 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 438 KOBJMETHOD(channel_trigger, eschan_trigger), 439 KOBJMETHOD(channel_getptr, eschan_getptr), 440 KOBJMETHOD(channel_getcaps, eschan_getcaps), 441 { 0, 0 } 442 }; 443 CHANNEL_DECLARE(eschan1371); 444 445 /* -------------------------------------------------------------------- */ 446 /* The interrupt handler */ 447 static void 448 es_intr(void *p) 449 { 450 struct es_info *es = p; 451 unsigned intsrc, sctrl; 452 453 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 454 if ((intsrc & STAT_INTR) == 0) return; 455 456 sctrl = es->sctrl; 457 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 458 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 459 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 460 461 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 462 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 463 464 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 465 if (intsrc & STAT_DAC1); 466 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 467 } 468 469 /* ES1370 specific */ 470 static int 471 es1370_init(struct es_info *es) 472 { 473 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 474 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 475 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 476 477 es->sctrl = 0; 478 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 479 480 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 481 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 482 * {LR,B}CLK2 and run off the LRCLK2 483 * PLL; program DAC_SYNC=0! */ 484 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 485 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 486 487 return 0; 488 } 489 490 /* ES1371 specific */ 491 int 492 es1371_init(struct es_info *es, device_t dev) 493 { 494 int idx; 495 int devid = pci_get_devid(dev); 496 int revid = pci_get_revid(dev); 497 498 if (debug > 0) printf("es_init\n"); 499 500 es->num = 0; 501 es->ctrl = 0; 502 es->sctrl = 0; 503 /* initialize the chips */ 504 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 505 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 506 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 507 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 508 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 509 bus_space_write_4(es->st, es->sh, ES1370_REG_STATUS, 0x20000000); 510 DELAY(20000); 511 if (debug > 0) device_printf(dev, "ac97 2.1 enabled\n"); 512 } else { /* pre ac97 2.1 card */ 513 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 514 if (debug > 0) device_printf(dev, "ac97 pre-2.1 enabled\n"); 515 } 516 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 517 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 518 /* AC'97 warm reset to start the bitclk */ 519 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 520 DELAY(2000); 521 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 522 /* Init the sample rate converter */ 523 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 524 for (idx = 0; idx < 0x80; idx++) 525 es1371_src_write(es, idx, 0); 526 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 527 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 528 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 529 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 530 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 531 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 532 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 533 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 534 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 535 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 536 es1371_adc_rate (es, 22050, 1); 537 es1371_dac_rate (es, 22050, 1); 538 es1371_dac_rate (es, 22050, 2); 539 /* WARNING: 540 * enabling the sample rate converter without properly programming 541 * its parameters causes the chip to lock up (the SRC busy bit will 542 * be stuck high, and I've found no way to rectify this other than 543 * power cycle) 544 */ 545 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 546 547 return (0); 548 } 549 550 /* -------------------------------------------------------------------- */ 551 552 static int 553 es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 554 { 555 int sl; 556 unsigned t, x; 557 struct es_info *es = (struct es_info*)s; 558 559 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 560 561 for (t = 0; t < 0x1000; t++) 562 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 563 break; 564 sl = spltty(); 565 /* save the current state for later */ 566 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 567 /* enable SRC state data in SRC mux */ 568 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 569 (es1371_wait_src_ready(s) & 570 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 571 /* wait for a SAFE time to write addr/data and then do it, dammit */ 572 for (t = 0; t < 0x1000; t++) 573 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 574 break; 575 576 if (debug > 2) 577 printf("one b_s_w: 0x%lx 0x%x 0x%x\n", 578 rman_get_start(es->reg), ES1371_REG_CODEC, 579 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 580 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 581 582 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 583 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 584 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 585 /* restore SRC reg */ 586 es1371_wait_src_ready(s); 587 if (debug > 2) 588 printf("two b_s_w: 0x%lx 0x%x 0x%x\n", 589 rman_get_start(es->reg), ES1371_REG_SMPRATE, x); 590 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 591 splx(sl); 592 593 return 0; 594 } 595 596 static int 597 es1371_rdcd(kobj_t obj, void *s, int addr) 598 { 599 int sl; 600 unsigned t, x = 0; 601 struct es_info *es = (struct es_info *)s; 602 603 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 604 605 for (t = 0; t < 0x1000; t++) 606 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 607 break; 608 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 609 610 sl = spltty(); 611 612 /* save the current state for later */ 613 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 614 /* enable SRC state data in SRC mux */ 615 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 616 (es1371_wait_src_ready(s) & 617 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 618 /* wait for a SAFE time to write addr/data and then do it, dammit */ 619 for (t = 0; t < 0x5000; t++) 620 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 621 break; 622 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 623 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 624 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 625 626 /* restore SRC reg */ 627 es1371_wait_src_ready(s); 628 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 629 630 splx(sl); 631 632 /* now wait for the stinkin' data (RDY) */ 633 for (t = 0; t < 0x1000; t++) 634 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 635 break; 636 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 637 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 638 } 639 640 static kobj_method_t es1371_ac97_methods[] = { 641 KOBJMETHOD(ac97_read, es1371_rdcd), 642 KOBJMETHOD(ac97_write, es1371_wrcd), 643 { 0, 0 } 644 }; 645 AC97_DECLARE(es1371_ac97); 646 647 /* -------------------------------------------------------------------- */ 648 649 static u_int 650 es1371_src_read(struct es_info *es, u_short reg) 651 { 652 unsigned int r; 653 654 r = es1371_wait_src_ready(es) & 655 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 656 r |= ES1371_SRC_RAM_ADDRO(reg); 657 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 658 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 659 } 660 661 static void 662 es1371_src_write(struct es_info *es, u_short reg, u_short data){ 663 u_int r; 664 665 r = es1371_wait_src_ready(es) & 666 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 667 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 668 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 669 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 670 } 671 672 static u_int 673 es1371_adc_rate(struct es_info *es, u_int rate, int set) 674 { 675 u_int n, truncm, freq, result; 676 677 if (rate > 48000) rate = 48000; 678 if (rate < 4000) rate = 4000; 679 n = rate / 3000; 680 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 681 n--; 682 truncm = (21 * n - 1) | 1; 683 freq = ((48000UL << 15) / rate) * n; 684 result = (48000UL << 15) / (freq / n); 685 if (set) { 686 if (rate >= 24000) { 687 if (truncm > 239) truncm = 239; 688 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 689 (((239 - truncm) >> 1) << 9) | (n << 4)); 690 } else { 691 if (truncm > 119) truncm = 119; 692 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 693 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 694 } 695 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 696 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 697 0x00ff) | ((freq >> 5) & 0xfc00)); 698 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 699 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 700 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 701 } 702 return result; 703 } 704 705 static u_int 706 es1371_dac_rate(struct es_info *es, u_int rate, int set) 707 { 708 u_int freq, r, result, dac, dis; 709 710 if (rate > 48000) rate = 48000; 711 if (rate < 4000) rate = 4000; 712 freq = (rate << 15) / 3000; 713 result = (freq * 3000) >> 15; 714 if (set) { 715 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 716 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 717 718 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 719 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 720 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 721 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 722 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 723 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 724 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 725 } 726 return result; 727 } 728 729 static u_int 730 es1371_wait_src_ready(struct es_info *es) 731 { 732 u_int t, r; 733 734 for (t = 0; t < 500; t++) { 735 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 736 return r; 737 DELAY(1000); 738 } 739 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 740 return 0; 741 } 742 743 /* -------------------------------------------------------------------- */ 744 745 /* 746 * Probe and attach the card 747 */ 748 749 static int 750 es_pci_probe(device_t dev) 751 { 752 switch(pci_get_devid(dev)) { 753 case ES1370_PCI_ID: 754 device_set_desc(dev, "AudioPCI ES1370"); 755 return 0; 756 757 case ES1371_PCI_ID: 758 switch(pci_get_revid(dev)) { 759 case ES1371REV_ES1371_A: 760 device_set_desc(dev, "AudioPCI ES1371-A"); 761 return 0; 762 763 case ES1371REV_ES1371_B: 764 device_set_desc(dev, "AudioPCI ES1371-B"); 765 return 0; 766 767 case ES1371REV_ES1373_A: 768 device_set_desc(dev, "AudioPCI ES1373-A"); 769 return 0; 770 771 case ES1371REV_ES1373_B: 772 device_set_desc(dev, "AudioPCI ES1373-B"); 773 return 0; 774 775 case ES1371REV_ES1373_8: 776 device_set_desc(dev, "AudioPCI ES1373-8"); 777 return 0; 778 779 case ES1371REV_CT5880_A: 780 device_set_desc(dev, "Creative CT5880-A"); 781 return 0; 782 783 default: 784 device_set_desc(dev, "AudioPCI ES1371-?"); 785 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 786 return 0; 787 } 788 789 case ES1371_PCI_ID2: 790 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 791 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 792 return 0; 793 794 case CT5880_PCI_ID: 795 switch(pci_get_revid(dev)) { 796 case CT5880REV_CT5880_C: 797 device_set_desc(dev, "Creative CT5880-C"); 798 return 0; 799 800 case CT5880REV_CT5880_D: 801 device_set_desc(dev, "Creative CT5880-D"); 802 return 0; 803 804 case CT5880REV_CT5880_E: 805 device_set_desc(dev, "Creative CT5880-E"); 806 return 0; 807 808 default: 809 device_set_desc(dev, "Creative CT5880-?"); 810 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 811 return 0; 812 } 813 814 default: 815 return ENXIO; 816 } 817 } 818 819 static int 820 es_pci_attach(device_t dev) 821 { 822 u_int32_t data; 823 struct es_info *es = 0; 824 int mapped; 825 char status[SND_STATUSLEN]; 826 struct ac97_info *codec = 0; 827 kobj_class_t ct = NULL; 828 829 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 830 device_printf(dev, "cannot allocate softc\n"); 831 return ENXIO; 832 } 833 834 es->dev = dev; 835 mapped = 0; 836 data = pci_read_config(dev, PCIR_COMMAND, 2); 837 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 838 pci_write_config(dev, PCIR_COMMAND, data, 2); 839 data = pci_read_config(dev, PCIR_COMMAND, 2); 840 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 841 es->regid = MEM_MAP_REG; 842 es->regtype = SYS_RES_MEMORY; 843 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 844 0, ~0, 1, RF_ACTIVE); 845 if (es->reg) { 846 es->st = rman_get_bustag(es->reg); 847 es->sh = rman_get_bushandle(es->reg); 848 mapped++; 849 } 850 } 851 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 852 es->regid = PCIR_MAPS; 853 es->regtype = SYS_RES_IOPORT; 854 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 855 0, ~0, 1, RF_ACTIVE); 856 if (es->reg) { 857 es->st = rman_get_bustag(es->reg); 858 es->sh = rman_get_bushandle(es->reg); 859 mapped++; 860 } 861 } 862 if (mapped == 0) { 863 device_printf(dev, "unable to map register space\n"); 864 goto bad; 865 } 866 867 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 868 869 if (pci_get_devid(dev) == ES1371_PCI_ID || 870 pci_get_devid(dev) == ES1371_PCI_ID2 || 871 pci_get_devid(dev) == CT5880_PCI_ID) { 872 if(-1 == es1371_init(es, dev)) { 873 device_printf(dev, "unable to initialize the card\n"); 874 goto bad; 875 } 876 codec = AC97_CREATE(dev, es, es1371_ac97); 877 if (codec == NULL) goto bad; 878 /* our init routine does everything for us */ 879 /* set to NULL; flag mixer_init not to run the ac97_init */ 880 /* ac97_mixer.init = NULL; */ 881 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad; 882 ct = &eschan1371_class; 883 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 884 if (-1 == es1370_init(es)) { 885 device_printf(dev, "unable to initialize the card\n"); 886 goto bad; 887 } 888 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad; 889 ct = &eschan1370_class; 890 } else goto bad; 891 892 es->irqid = 0; 893 es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid, 894 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 895 if (!es->irq || snd_setup_intr(dev, es->irq, 0, es_intr, es, &es->ih)) { 896 device_printf(dev, "unable to map interrupt\n"); 897 goto bad; 898 } 899 900 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 901 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 902 /*highaddr*/BUS_SPACE_MAXADDR, 903 /*filter*/NULL, /*filterarg*/NULL, 904 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 905 /*flags*/0, &es->parent_dmat) != 0) { 906 device_printf(dev, "unable to create dma tag\n"); 907 goto bad; 908 } 909 910 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 911 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 912 rman_get_start(es->reg), rman_get_start(es->irq)); 913 914 if (pcm_register(dev, es, 1, 1)) goto bad; 915 pcm_addchan(dev, PCMDIR_REC, ct, es); 916 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 917 pcm_setstatus(dev, status); 918 919 return 0; 920 921 bad: 922 if (codec) ac97_destroy(codec); 923 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 924 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 925 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 926 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 927 if (es) free(es, M_DEVBUF); 928 return ENXIO; 929 } 930 931 static int 932 es_pci_detach(device_t dev) 933 { 934 int r; 935 struct es_info *es; 936 937 r = pcm_unregister(dev); 938 if (r) 939 return r; 940 941 es = pcm_getdevinfo(dev); 942 bus_release_resource(dev, es->regtype, es->regid, es->reg); 943 bus_teardown_intr(dev, es->irq, es->ih); 944 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 945 bus_dma_tag_destroy(es->parent_dmat); 946 free(es, M_DEVBUF); 947 948 return 0; 949 } 950 951 static device_method_t es_methods[] = { 952 /* Device interface */ 953 DEVMETHOD(device_probe, es_pci_probe), 954 DEVMETHOD(device_attach, es_pci_attach), 955 DEVMETHOD(device_detach, es_pci_detach), 956 957 { 0, 0 } 958 }; 959 960 static driver_t es_driver = { 961 "pcm", 962 es_methods, 963 PCM_SOFTC_SIZE, 964 }; 965 966 DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 967 MODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 968 MODULE_VERSION(snd_es137x, 1); 969