1 /*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49 */ 50 51 #include <dev/sound/pcm/sound.h> 52 #include <dev/sound/pcm/ac97.h> 53 #include <dev/sound/pci/es137x.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 58 #include <sys/sysctl.h> 59 60 #include "mixer_if.h" 61 62 SND_DECLARE_FILE("$FreeBSD$"); 63 64 #define MEM_MAP_REG 0x14 65 66 /* PCI IDs of supported chips */ 67 #define ES1370_PCI_ID 0x50001274 68 #define ES1371_PCI_ID 0x13711274 69 #define ES1371_PCI_ID2 0x13713274 70 #define CT5880_PCI_ID 0x58801274 71 #define CT4730_PCI_ID 0x89381102 72 73 #define ES1371REV_ES1371_A 0x02 74 #define ES1371REV_ES1371_B 0x09 75 76 #define ES1371REV_ES1373_8 0x08 77 #define ES1371REV_ES1373_A 0x04 78 #define ES1371REV_ES1373_B 0x06 79 80 #define ES1371REV_CT5880_A 0x07 81 82 #define CT5880REV_CT5880_C 0x02 83 #define CT5880REV_CT5880_D 0x03 84 #define CT5880REV_CT5880_E 0x04 85 86 #define CT4730REV_CT4730_A 0x00 87 88 #define ES_DEFAULT_BUFSZ 4096 89 90 /* 2 DAC for playback, 1 ADC for record */ 91 #define ES_DAC1 0 92 #define ES_DAC2 1 93 #define ES_ADC 2 94 #define ES_NCHANS 3 95 96 #define ES_DMA_SEGS_MIN 2 97 #define ES_DMA_SEGS_MAX 256 98 #define ES_BLK_MIN 64 99 #define ES_BLK_ALIGN (~(ES_BLK_MIN - 1)) 100 101 #define ES1370_DAC1_MINSPEED 5512 102 #define ES1370_DAC1_MAXSPEED 44100 103 104 /* device private data */ 105 struct es_info; 106 107 struct es_chinfo { 108 struct es_info *parent; 109 struct pcm_channel *channel; 110 struct snd_dbuf *buffer; 111 struct pcmchan_caps caps; 112 int dir, num, index; 113 uint32_t fmt, blksz, blkcnt, bufsz; 114 uint32_t ptr, prevptr; 115 int active; 116 }; 117 118 /* 119 * 32bit Ensoniq Configuration (es->escfg). 120 * ---------------------------------------- 121 * 122 * +-------+--------+------+------+---------+--------+---------+---------+ 123 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 | 124 * +-------+--------+------+------+---------+--------+---------+---------+ 125 * | fixed | single | | | | | is | general | 126 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose | 127 * | | mixer | | | | | | | 128 * +-------+--------+------+------+---------+--------+---------+---------+ 129 */ 130 #define ES_FIXED_RATE(cfgv) \ 131 (((cfgv) & 0xffff0000) >> 16) 132 #define ES_SET_FIXED_RATE(cfgv, nv) \ 133 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16)) 134 #define ES_SINGLE_PCM_MIX(cfgv) \ 135 (((cfgv) & 0x8000) >> 15) 136 #define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \ 137 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15)) 138 #define ES_DAC_FIRST(cfgv) \ 139 (((cfgv) & 0x4000) >> 14) 140 #define ES_SET_DAC_FIRST(cfgv, nv) \ 141 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14)) 142 #define ES_DAC_SECOND(cfgv) \ 143 (((cfgv) & 0x2000) >> 13) 144 #define ES_SET_DAC_SECOND(cfgv, nv) \ 145 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13)) 146 #define ES_NUMPLAY(cfgv) \ 147 (((cfgv) & 0x1800) >> 11) 148 #define ES_SET_NUMPLAY(cfgv, nv) \ 149 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11)) 150 #define ES_NUMREC(cfgv) \ 151 (((cfgv) & 0x600) >> 9) 152 #define ES_SET_NUMREC(cfgv, nv) \ 153 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9)) 154 #define ES_IS_ES1370(cfgv) \ 155 (((cfgv) & 0x100) >> 8) 156 #define ES_SET_IS_ES1370(cfgv, nv) \ 157 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8)) 158 #define ES_GP(cfgv) \ 159 ((cfgv) & 0xff) 160 #define ES_SET_GP(cfgv, nv) \ 161 (((cfgv) & ~0xff) | ((nv) & 0xff)) 162 163 #define ES_DAC1_ENABLED(cfgv) \ 164 (ES_NUMPLAY(cfgv) > 1 || \ 165 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1)) 166 #define ES_DAC2_ENABLED(cfgv) \ 167 (ES_NUMPLAY(cfgv) > 1 || \ 168 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2)) 169 170 /* 171 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val" 172 * 173 * 0 = Enable both DACs - Default 174 * 1 = Enable single DAC (DAC1) 175 * 2 = Enable single DAC (DAC2) 176 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1) 177 */ 178 #define ES_DEFAULT_DAC_CFG 0 179 180 struct es_info { 181 bus_space_tag_t st; 182 bus_space_handle_t sh; 183 bus_dma_tag_t parent_dmat; 184 185 struct resource *reg, *irq; 186 int regtype, regid, irqid; 187 void *ih; 188 189 device_t dev; 190 int num; 191 unsigned int bufsz, blkcnt; 192 193 /* Contents of board's registers */ 194 uint32_t ctrl; 195 uint32_t sctrl; 196 uint32_t escfg; 197 struct es_chinfo ch[ES_NCHANS]; 198 struct mtx *lock; 199 struct callout poll_timer; 200 int poll_ticks, polling; 201 }; 202 203 #define ES_LOCK(sc) snd_mtxlock((sc)->lock) 204 #define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) 205 #define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock) 206 207 /* prototypes */ 208 static void es_intr(void *); 209 static uint32_t es1371_wait_src_ready(struct es_info *); 210 static void es1371_src_write(struct es_info *, 211 unsigned short, unsigned short); 212 static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int); 213 static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int); 214 static int es1371_init(struct es_info *); 215 static int es1370_init(struct es_info *); 216 static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char); 217 218 static uint32_t es_fmt[] = { 219 AFMT_U8, 220 AFMT_STEREO | AFMT_U8, 221 AFMT_S16_LE, 222 AFMT_STEREO | AFMT_S16_LE, 223 0 224 }; 225 static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0}; 226 227 static const struct { 228 unsigned volidx:4; 229 unsigned left:4; 230 unsigned right:4; 231 unsigned stereo:1; 232 unsigned recmask:13; 233 unsigned avail:1; 234 } mixtable[SOUND_MIXER_NRDEVICES] = { 235 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 }, 236 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 237 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 238 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 239 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 240 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 241 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 242 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 243 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 244 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 245 }; 246 247 static __inline uint32_t 248 es_rd(struct es_info *es, int regno, int size) 249 { 250 switch (size) { 251 case 1: 252 return (bus_space_read_1(es->st, es->sh, regno)); 253 case 2: 254 return (bus_space_read_2(es->st, es->sh, regno)); 255 case 4: 256 return (bus_space_read_4(es->st, es->sh, regno)); 257 default: 258 return (0xFFFFFFFF); 259 } 260 } 261 262 static __inline void 263 es_wr(struct es_info *es, int regno, uint32_t data, int size) 264 { 265 266 switch (size) { 267 case 1: 268 bus_space_write_1(es->st, es->sh, regno, data); 269 break; 270 case 2: 271 bus_space_write_2(es->st, es->sh, regno, data); 272 break; 273 case 4: 274 bus_space_write_4(es->st, es->sh, regno, data); 275 break; 276 } 277 } 278 279 /* -------------------------------------------------------------------- */ 280 /* The es1370 mixer interface */ 281 282 static int 283 es1370_mixinit(struct snd_mixer *m) 284 { 285 struct es_info *es; 286 int i; 287 uint32_t v; 288 289 es = mix_getdevinfo(m); 290 v = 0; 291 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 292 if (mixtable[i].avail) 293 v |= (1 << i); 294 } 295 /* 296 * Each DAC1/2 for ES1370 can be controlled independently 297 * DAC1 = controlled by synth 298 * DAC2 = controlled by pcm 299 * This is indeed can confuse user if DAC1 become primary playback 300 * channel. Try to be smart and combine both if necessary. 301 */ 302 if (ES_SINGLE_PCM_MIX(es->escfg)) 303 v &= ~(1 << SOUND_MIXER_SYNTH); 304 mix_setdevs(m, v); 305 v = 0; 306 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 307 if (mixtable[i].recmask) 308 v |= (1 << i); 309 } 310 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */ 311 v &= ~(1 << SOUND_MIXER_SYNTH); 312 mix_setrecdevs(m, v); 313 return (0); 314 } 315 316 static int 317 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 318 { 319 struct es_info *es; 320 int l, r, rl, rr, set_dac1; 321 322 if (!mixtable[dev].avail) 323 return (-1); 324 l = left; 325 r = (mixtable[dev].stereo) ? right : l; 326 if (mixtable[dev].left == 0xf) 327 rl = (l < 2) ? 0x80 : 7 - (l - 2) / 14; 328 else 329 rl = (l < 10) ? 0x80 : 15 - (l - 10) / 6; 330 es = mix_getdevinfo(m); 331 ES_LOCK(es); 332 if (dev == SOUND_MIXER_PCM && (ES_SINGLE_PCM_MIX(es->escfg)) && 333 ES_DAC1_ENABLED(es->escfg)) 334 set_dac1 = 1; 335 else 336 set_dac1 = 0; 337 if (mixtable[dev].stereo) { 338 rr = (r < 10) ? 0x80 : 15 - (r - 10) / 6; 339 es1370_wrcodec(es, mixtable[dev].right, rr); 340 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo) 341 es1370_wrcodec(es, 342 mixtable[SOUND_MIXER_SYNTH].right, rr); 343 } 344 es1370_wrcodec(es, mixtable[dev].left, rl); 345 if (set_dac1) 346 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl); 347 ES_UNLOCK(es); 348 349 return (l | (r << 8)); 350 } 351 352 static int 353 es1370_mixsetrecsrc(struct snd_mixer *m, uint32_t src) 354 { 355 struct es_info *es; 356 int i, j = 0; 357 358 es = mix_getdevinfo(m); 359 if (src == 0) src = 1 << SOUND_MIXER_MIC; 360 src &= mix_getrecdevs(m); 361 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 362 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 363 364 ES_LOCK(es); 365 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) && 366 ES_DAC1_ENABLED(es->escfg)) 367 j |= mixtable[SOUND_MIXER_SYNTH].recmask; 368 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55); 369 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa); 370 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17); 371 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f); 372 es1370_wrcodec(es, CODEC_OMIX1, 0x7f); 373 es1370_wrcodec(es, CODEC_OMIX2, 0x3f); 374 ES_UNLOCK(es); 375 376 return (src); 377 } 378 379 static kobj_method_t es1370_mixer_methods[] = { 380 KOBJMETHOD(mixer_init, es1370_mixinit), 381 KOBJMETHOD(mixer_set, es1370_mixset), 382 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 383 { 0, 0 } 384 }; 385 MIXER_DECLARE(es1370_mixer); 386 387 /* -------------------------------------------------------------------- */ 388 389 static int 390 es1370_wrcodec(struct es_info *es, unsigned char i, unsigned char data) 391 { 392 unsigned int t; 393 394 ES_LOCK_ASSERT(es); 395 396 for (t = 0; t < 0x1000; t++) { 397 if ((es_rd(es, ES1370_REG_STATUS, 4) & 398 STAT_CSTAT) == 0) { 399 es_wr(es, ES1370_REG_CODEC, 400 ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2); 401 return (0); 402 } 403 DELAY(1); 404 } 405 device_printf(es->dev, "%s: timed out\n", __func__); 406 return (-1); 407 } 408 409 /* -------------------------------------------------------------------- */ 410 411 /* channel interface */ 412 static void * 413 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 414 struct pcm_channel *c, int dir) 415 { 416 struct es_info *es = devinfo; 417 struct es_chinfo *ch; 418 uint32_t index; 419 420 ES_LOCK(es); 421 422 if (dir == PCMDIR_PLAY) { 423 index = ES_GP(es->escfg); 424 es->escfg = ES_SET_GP(es->escfg, index + 1); 425 if (index == 0) 426 index = ES_DAC_FIRST(es->escfg); 427 else if (index == 1) 428 index = ES_DAC_SECOND(es->escfg); 429 else { 430 device_printf(es->dev, 431 "Invalid ES_GP index: %d\n", index); 432 ES_UNLOCK(es); 433 return (NULL); 434 } 435 if (!(index == ES_DAC1 || index == ES_DAC2)) { 436 device_printf(es->dev, "Unknown DAC: %d\n", index + 1); 437 ES_UNLOCK(es); 438 return (NULL); 439 } 440 if (es->ch[index].channel != NULL) { 441 device_printf(es->dev, "DAC%d already initialized!\n", 442 index + 1); 443 ES_UNLOCK(es); 444 return (NULL); 445 } 446 } else 447 index = ES_ADC; 448 449 ch = &es->ch[index]; 450 ch->index = index; 451 ch->num = es->num++; 452 ch->caps = es_caps; 453 if (ES_IS_ES1370(es->escfg)) { 454 if (ch->index == ES_DAC1) { 455 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED; 456 ch->caps.minspeed = ES1370_DAC1_MINSPEED; 457 } else { 458 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg); 459 if (!(fixed_rate < es_caps.minspeed || 460 fixed_rate > es_caps.maxspeed)) { 461 ch->caps.maxspeed = fixed_rate; 462 ch->caps.minspeed = fixed_rate; 463 } 464 } 465 } 466 ch->parent = es; 467 ch->channel = c; 468 ch->buffer = b; 469 ch->bufsz = es->bufsz; 470 ch->blkcnt = es->blkcnt; 471 ch->blksz = ch->bufsz / ch->blkcnt; 472 ch->dir = dir; 473 ES_UNLOCK(es); 474 if (sndbuf_alloc(ch->buffer, es->parent_dmat, 0, ch->bufsz) != 0) 475 return (NULL); 476 ES_LOCK(es); 477 if (dir == PCMDIR_PLAY) { 478 if (ch->index == ES_DAC1) { 479 es_wr(es, ES1370_REG_MEMPAGE, 480 ES1370_REG_DAC1_FRAMEADR >> 8, 1); 481 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff, 482 sndbuf_getbufaddr(ch->buffer), 4); 483 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, 484 (ch->bufsz >> 2) - 1, 4); 485 } else { 486 es_wr(es, ES1370_REG_MEMPAGE, 487 ES1370_REG_DAC2_FRAMEADR >> 8, 1); 488 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, 489 sndbuf_getbufaddr(ch->buffer), 4); 490 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, 491 (ch->bufsz >> 2) - 1, 4); 492 } 493 } else { 494 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 495 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, 496 sndbuf_getbufaddr(ch->buffer), 4); 497 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, 498 (ch->bufsz >> 2) - 1, 4); 499 } 500 ES_UNLOCK(es); 501 return (ch); 502 } 503 504 static int 505 eschan_setformat(kobj_t obj, void *data, uint32_t format) 506 { 507 struct es_chinfo *ch = data; 508 struct es_info *es = ch->parent; 509 510 ES_LOCK(es); 511 if (ch->dir == PCMDIR_PLAY) { 512 if (ch->index == ES_DAC1) { 513 es->sctrl &= ~SCTRL_P1FMT; 514 if (format & AFMT_S16_LE) 515 es->sctrl |= SCTRL_P1SEB; 516 if (format & AFMT_STEREO) 517 es->sctrl |= SCTRL_P1SMB; 518 } else { 519 es->sctrl &= ~SCTRL_P2FMT; 520 if (format & AFMT_S16_LE) 521 es->sctrl |= SCTRL_P2SEB; 522 if (format & AFMT_STEREO) 523 es->sctrl |= SCTRL_P2SMB; 524 } 525 } else { 526 es->sctrl &= ~SCTRL_R1FMT; 527 if (format & AFMT_S16_LE) 528 es->sctrl |= SCTRL_R1SEB; 529 if (format & AFMT_STEREO) 530 es->sctrl |= SCTRL_R1SMB; 531 } 532 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 533 ES_UNLOCK(es); 534 ch->fmt = format; 535 return (0); 536 } 537 538 static int 539 eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed) 540 { 541 struct es_chinfo *ch = data; 542 struct es_info *es = ch->parent; 543 544 ES_LOCK(es); 545 /* Fixed rate , do nothing. */ 546 if (ch->caps.minspeed == ch->caps.maxspeed) { 547 ES_UNLOCK(es); 548 return (ch->caps.maxspeed); 549 } 550 if (speed < ch->caps.minspeed) 551 speed = ch->caps.minspeed; 552 if (speed > ch->caps.maxspeed) 553 speed = ch->caps.maxspeed; 554 if (ch->index == ES_DAC1) { 555 /* 556 * DAC1 does not support continuous rate settings. 557 * Pick the nearest and use it since FEEDER_RATE will 558 * do the the proper conversion for us. 559 */ 560 es->ctrl &= ~CTRL_WTSRSEL; 561 if (speed < 8268) { 562 speed = 5512; 563 es->ctrl |= 0 << CTRL_SH_WTSRSEL; 564 } else if (speed < 16537) { 565 speed = 11025; 566 es->ctrl |= 1 << CTRL_SH_WTSRSEL; 567 } else if (speed < 33075) { 568 speed = 22050; 569 es->ctrl |= 2 << CTRL_SH_WTSRSEL; 570 } else { 571 speed = 44100; 572 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 573 } 574 } else { 575 es->ctrl &= ~CTRL_PCLKDIV; 576 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 577 } 578 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 579 ES_UNLOCK(es); 580 return (speed); 581 } 582 583 static int 584 eschan1371_setspeed(kobj_t obj, void *data, uint32_t speed) 585 { 586 struct es_chinfo *ch = data; 587 struct es_info *es = ch->parent; 588 uint32_t i; 589 int delta; 590 591 ES_LOCK(es); 592 if (ch->dir == PCMDIR_PLAY) 593 i = es1371_dac_rate(es, speed, ch->index); /* play */ 594 else 595 i = es1371_adc_rate(es, speed, ch->index); /* record */ 596 ES_UNLOCK(es); 597 delta = (speed > i) ? (speed - i) : (i - speed); 598 if (delta < 2) 599 return (speed); 600 return (i); 601 } 602 603 static int 604 eschan_setfragments(kobj_t obj, void *data, uint32_t blksz, uint32_t blkcnt) 605 { 606 struct es_chinfo *ch = data; 607 struct es_info *es = ch->parent; 608 609 blksz &= ES_BLK_ALIGN; 610 611 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN)) 612 blksz = sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN; 613 if (blksz < ES_BLK_MIN) 614 blksz = ES_BLK_MIN; 615 if (blkcnt > ES_DMA_SEGS_MAX) 616 blkcnt = ES_DMA_SEGS_MAX; 617 if (blkcnt < ES_DMA_SEGS_MIN) 618 blkcnt = ES_DMA_SEGS_MIN; 619 620 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) { 621 if ((blkcnt >> 1) >= ES_DMA_SEGS_MIN) 622 blkcnt >>= 1; 623 else if ((blksz >> 1) >= ES_BLK_MIN) 624 blksz >>= 1; 625 else 626 break; 627 } 628 629 if ((sndbuf_getblksz(ch->buffer) != blksz || 630 sndbuf_getblkcnt(ch->buffer) != blkcnt) && 631 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0) 632 device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n", 633 __func__, blksz, blkcnt); 634 635 ch->bufsz = sndbuf_getsize(ch->buffer); 636 ch->blksz = sndbuf_getblksz(ch->buffer); 637 ch->blkcnt = sndbuf_getblkcnt(ch->buffer); 638 639 return (1); 640 } 641 642 static int 643 eschan_setblocksize(kobj_t obj, void *data, uint32_t blksz) 644 { 645 struct es_chinfo *ch = data; 646 struct es_info *es = ch->parent; 647 648 eschan_setfragments(obj, data, blksz, es->blkcnt); 649 650 return (ch->blksz); 651 } 652 653 #define es_chan_active(es) ((es)->ch[ES_DAC1].active + \ 654 (es)->ch[ES_DAC2].active + \ 655 (es)->ch[ES_ADC].active) 656 657 static __inline int 658 es_poll_channel(struct es_chinfo *ch) 659 { 660 struct es_info *es; 661 uint32_t sz, delta; 662 uint32_t reg, ptr; 663 664 if (ch == NULL || ch->channel == NULL || ch->active == 0) 665 return (0); 666 667 es = ch->parent; 668 if (ch->dir == PCMDIR_PLAY) { 669 if (ch->index == ES_DAC1) 670 reg = ES1370_REG_DAC1_FRAMECNT; 671 else 672 reg = ES1370_REG_DAC2_FRAMECNT; 673 } else 674 reg = ES1370_REG_ADC_FRAMECNT; 675 sz = ch->blksz * ch->blkcnt; 676 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 677 ptr = es_rd(es, reg & 0x000000ff, 4) >> 16; 678 ptr <<= 2; 679 ch->ptr = ptr; 680 ptr %= sz; 681 ptr &= ~(ch->blksz - 1); 682 delta = (sz + ptr - ch->prevptr) % sz; 683 684 if (delta < ch->blksz) 685 return (0); 686 687 ch->prevptr = ptr; 688 689 return (1); 690 } 691 692 static void 693 es_poll_callback(void *arg) 694 { 695 struct es_info *es = arg; 696 uint32_t trigger = 0; 697 int i; 698 699 if (es == NULL) 700 return; 701 702 ES_LOCK(es); 703 if (es->polling == 0 || es_chan_active(es) == 0) { 704 ES_UNLOCK(es); 705 return; 706 } 707 708 for (i = 0; i < ES_NCHANS; i++) { 709 if (es_poll_channel(&es->ch[i]) != 0) 710 trigger |= 1 << i; 711 } 712 713 /* XXX */ 714 callout_reset(&es->poll_timer, 1/*es->poll_ticks*/, 715 es_poll_callback, es); 716 717 ES_UNLOCK(es); 718 719 for (i = 0; i < ES_NCHANS; i++) { 720 if (trigger & (1 << i)) 721 chn_intr(es->ch[i].channel); 722 } 723 } 724 725 static int 726 eschan_trigger(kobj_t obj, void *data, int go) 727 { 728 struct es_chinfo *ch = data; 729 struct es_info *es = ch->parent; 730 uint32_t cnt, b = 0; 731 732 if (!PCMTRIG_COMMON(go)) 733 return 0; 734 735 ES_LOCK(es); 736 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 737 if (ch->fmt & AFMT_16BIT) 738 b |= 0x02; 739 if (ch->fmt & AFMT_STEREO) 740 b |= 0x01; 741 if (ch->dir == PCMDIR_PLAY) { 742 if (go == PCMTRIG_START) { 743 if (ch->index == ES_DAC1) { 744 es->ctrl |= CTRL_DAC1_EN; 745 es->sctrl &= ~(SCTRL_P1LOOPSEL | 746 SCTRL_P1PAUSE | SCTRL_P1SCTRLD); 747 if (es->polling == 0) 748 es->sctrl |= SCTRL_P1INTEN; 749 else 750 es->sctrl &= ~SCTRL_P1INTEN; 751 es->sctrl |= b; 752 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4); 753 /* start at beginning of buffer */ 754 es_wr(es, ES1370_REG_MEMPAGE, 755 ES1370_REG_DAC1_FRAMECNT >> 8, 4); 756 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, 757 (ch->bufsz >> 2) - 1, 4); 758 } else { 759 es->ctrl |= CTRL_DAC2_EN; 760 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 761 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 762 SCTRL_P2DACSEN); 763 if (es->polling == 0) 764 es->sctrl |= SCTRL_P2INTEN; 765 else 766 es->sctrl &= ~SCTRL_P2INTEN; 767 es->sctrl |= (b << 2) | 768 ((((b >> 1) & 1) + 1) << SCTRL_SH_P2ENDINC); 769 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 770 /* start at beginning of buffer */ 771 es_wr(es, ES1370_REG_MEMPAGE, 772 ES1370_REG_DAC2_FRAMECNT >> 8, 4); 773 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, 774 (ch->bufsz >> 2) - 1, 4); 775 } 776 } else 777 es->ctrl &= ~((ch->index == ES_DAC1) ? 778 CTRL_DAC1_EN : CTRL_DAC2_EN); 779 } else { 780 if (go == PCMTRIG_START) { 781 es->ctrl |= CTRL_ADC_EN; 782 es->sctrl &= ~SCTRL_R1LOOPSEL; 783 if (es->polling == 0) 784 es->sctrl |= SCTRL_R1INTEN; 785 else 786 es->sctrl &= ~SCTRL_R1INTEN; 787 es->sctrl |= b << 4; 788 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 789 /* start at beginning of buffer */ 790 es_wr(es, ES1370_REG_MEMPAGE, 791 ES1370_REG_ADC_FRAMECNT >> 8, 4); 792 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, 793 (ch->bufsz >> 2) - 1, 4); 794 } else 795 es->ctrl &= ~CTRL_ADC_EN; 796 } 797 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 798 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 799 if (go == PCMTRIG_START) { 800 if (es->polling != 0) { 801 ch->ptr = 0; 802 ch->prevptr = 0; 803 if (es_chan_active(es) == 0) { 804 es->poll_ticks = 1; 805 callout_reset(&es->poll_timer, 1, 806 es_poll_callback, es); 807 } 808 } 809 ch->active = 1; 810 } else { 811 ch->active = 0; 812 if (es->polling != 0) { 813 if (es_chan_active(es) == 0) { 814 callout_stop(&es->poll_timer); 815 es->poll_ticks = 1; 816 } 817 } 818 } 819 ES_UNLOCK(es); 820 return (0); 821 } 822 823 static int 824 eschan_getptr(kobj_t obj, void *data) 825 { 826 struct es_chinfo *ch = data; 827 struct es_info *es = ch->parent; 828 uint32_t reg, cnt; 829 830 ES_LOCK(es); 831 if (es->polling != 0) 832 cnt = ch->ptr; 833 else { 834 if (ch->dir == PCMDIR_PLAY) { 835 if (ch->index == ES_DAC1) 836 reg = ES1370_REG_DAC1_FRAMECNT; 837 else 838 reg = ES1370_REG_DAC2_FRAMECNT; 839 } else 840 reg = ES1370_REG_ADC_FRAMECNT; 841 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 842 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16; 843 /* cnt is longwords */ 844 cnt <<= 2; 845 } 846 ES_UNLOCK(es); 847 848 cnt &= ES_BLK_ALIGN; 849 850 return (cnt); 851 } 852 853 static struct pcmchan_caps * 854 eschan_getcaps(kobj_t obj, void *data) 855 { 856 struct es_chinfo *ch = data; 857 858 return (&ch->caps); 859 } 860 861 static kobj_method_t eschan1370_methods[] = { 862 KOBJMETHOD(channel_init, eschan_init), 863 KOBJMETHOD(channel_setformat, eschan_setformat), 864 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 865 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 866 KOBJMETHOD(channel_setfragments, eschan_setfragments), 867 KOBJMETHOD(channel_trigger, eschan_trigger), 868 KOBJMETHOD(channel_getptr, eschan_getptr), 869 KOBJMETHOD(channel_getcaps, eschan_getcaps), 870 { 0, 0 } 871 }; 872 CHANNEL_DECLARE(eschan1370); 873 874 static kobj_method_t eschan1371_methods[] = { 875 KOBJMETHOD(channel_init, eschan_init), 876 KOBJMETHOD(channel_setformat, eschan_setformat), 877 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 878 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 879 KOBJMETHOD(channel_setfragments, eschan_setfragments), 880 KOBJMETHOD(channel_trigger, eschan_trigger), 881 KOBJMETHOD(channel_getptr, eschan_getptr), 882 KOBJMETHOD(channel_getcaps, eschan_getcaps), 883 { 0, 0 } 884 }; 885 CHANNEL_DECLARE(eschan1371); 886 887 /* -------------------------------------------------------------------- */ 888 /* The interrupt handler */ 889 static void 890 es_intr(void *p) 891 { 892 struct es_info *es = p; 893 uint32_t intsrc, sctrl; 894 895 ES_LOCK(es); 896 if (es->polling != 0) { 897 ES_UNLOCK(es); 898 return; 899 } 900 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 901 if ((intsrc & STAT_INTR) == 0) { 902 ES_UNLOCK(es); 903 return; 904 } 905 906 sctrl = es->sctrl; 907 if (intsrc & STAT_ADC) 908 sctrl &= ~SCTRL_R1INTEN; 909 if (intsrc & STAT_DAC1) 910 sctrl &= ~SCTRL_P1INTEN; 911 if (intsrc & STAT_DAC2) 912 sctrl &= ~SCTRL_P2INTEN; 913 914 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 915 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 916 ES_UNLOCK(es); 917 918 if (intsrc & STAT_ADC) 919 chn_intr(es->ch[ES_ADC].channel); 920 if (intsrc & STAT_DAC1) 921 chn_intr(es->ch[ES_DAC1].channel); 922 if (intsrc & STAT_DAC2) 923 chn_intr(es->ch[ES_DAC2].channel); 924 } 925 926 /* ES1370 specific */ 927 static int 928 es1370_init(struct es_info *es) 929 { 930 uint32_t fixed_rate; 931 int r, single_pcm; 932 933 /* ES1370 default to fixed rate operation */ 934 if (resource_int_value(device_get_name(es->dev), 935 device_get_unit(es->dev), "fixed_rate", &r) == 0) { 936 fixed_rate = r; 937 if (fixed_rate) { 938 if (fixed_rate < es_caps.minspeed) 939 fixed_rate = es_caps.minspeed; 940 if (fixed_rate > es_caps.maxspeed) 941 fixed_rate = es_caps.maxspeed; 942 } 943 } else 944 fixed_rate = es_caps.maxspeed; 945 946 if (resource_int_value(device_get_name(es->dev), 947 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0) 948 single_pcm = (r != 0) ? 1 : 0; 949 else 950 single_pcm = 1; 951 952 ES_LOCK(es); 953 if (ES_NUMPLAY(es->escfg) == 1) 954 single_pcm = 1; 955 /* This is ES1370 */ 956 es->escfg = ES_SET_IS_ES1370(es->escfg, 1); 957 if (fixed_rate) 958 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate); 959 else { 960 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 961 fixed_rate = DSP_DEFAULT_SPEED; 962 } 963 if (single_pcm) 964 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 965 else 966 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 967 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS | 968 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV); 969 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 970 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 971 972 es->sctrl = 0; 973 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 974 975 /* No RST, PD */ 976 es1370_wrcodec(es, CODEC_RES_PD, 3); 977 /* 978 * CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL; 979 * program DAC_SYNC=0! 980 */ 981 es1370_wrcodec(es, CODEC_CSEL, 0); 982 /* Recording source is mixer */ 983 es1370_wrcodec(es, CODEC_ADSEL, 0); 984 /* MIC amp is 0db */ 985 es1370_wrcodec(es, CODEC_MGAIN, 0); 986 ES_UNLOCK(es); 987 988 return (0); 989 } 990 991 /* ES1371 specific */ 992 int 993 es1371_init(struct es_info *es) 994 { 995 uint32_t cssr, devid, revid, subdev; 996 int idx; 997 998 ES_LOCK(es); 999 /* This is NOT ES1370 */ 1000 es->escfg = ES_SET_IS_ES1370(es->escfg, 0); 1001 es->num = 0; 1002 es->sctrl = 0; 1003 cssr = 0; 1004 devid = pci_get_devid(es->dev); 1005 revid = pci_get_revid(es->dev); 1006 subdev = (pci_get_subdevice(es->dev) << 16) | 1007 pci_get_subvendor(es->dev); 1008 /* 1009 * Joyport blacklist. Either we're facing with broken hardware 1010 * or because this hardware need special (unknown) initialization 1011 * procedures. 1012 */ 1013 switch (subdev) { 1014 case 0x20001274: /* old Ensoniq */ 1015 es->ctrl = 0; 1016 break; 1017 default: 1018 es->ctrl = CTRL_JYSTK_EN; 1019 break; 1020 } 1021 if (devid == CT4730_PCI_ID) { 1022 /* XXX amplifier hack? */ 1023 es->ctrl |= (1 << 16); 1024 } 1025 /* initialize the chips */ 1026 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1027 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 1028 es_wr(es, ES1371_REG_LEGACY, 0, 4); 1029 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1030 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1031 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1032 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1033 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 1034 cssr = 1 << 29; 1035 es_wr(es, ES1370_REG_STATUS, cssr, 4); 1036 DELAY(20000); 1037 } 1038 /* AC'97 warm reset to start the bitclk */ 1039 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1040 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4); 1041 DELAY(2000); 1042 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4); 1043 es1371_wait_src_ready(es); 1044 /* Init the sample rate converter */ 1045 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4); 1046 for (idx = 0; idx < 0x80; idx++) 1047 es1371_src_write(es, idx, 0); 1048 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 1049 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 1050 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 1051 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 1052 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 1053 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 1054 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 1055 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 1056 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 1057 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 1058 es1371_adc_rate(es, 22050, ES_ADC); 1059 es1371_dac_rate(es, 22050, ES_DAC1); 1060 es1371_dac_rate(es, 22050, ES_DAC2); 1061 /* 1062 * WARNING: 1063 * enabling the sample rate converter without properly programming 1064 * its parameters causes the chip to lock up (the SRC busy bit will 1065 * be stuck high, and I've found no way to rectify this other than 1066 * power cycle) 1067 */ 1068 es1371_wait_src_ready(es); 1069 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 1070 /* try to reset codec directly */ 1071 es_wr(es, ES1371_REG_CODEC, 0, 4); 1072 es_wr(es, ES1370_REG_STATUS, cssr, 4); 1073 ES_UNLOCK(es); 1074 1075 return (0); 1076 } 1077 1078 /* -------------------------------------------------------------------- */ 1079 1080 static int 1081 es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data) 1082 { 1083 uint32_t t, x, orig; 1084 struct es_info *es = (struct es_info*)s; 1085 1086 for (t = 0; t < 0x1000; t++) { 1087 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 1088 break; 1089 } 1090 /* save the current state for later */ 1091 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 1092 /* enable SRC state data in SRC mux */ 1093 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1094 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4); 1095 /* busy wait */ 1096 for (t = 0; t < 0x1000; t++) { 1097 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1098 0x00000000) 1099 break; 1100 } 1101 /* wait for a SAFE time to write addr/data and then do it, dammit */ 1102 for (t = 0; t < 0x1000; t++) { 1103 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1104 0x00010000) 1105 break; 1106 } 1107 1108 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) & 1109 CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) & 1110 CODEC_PODAT_MASK), 4); 1111 /* restore SRC reg */ 1112 es1371_wait_src_ready(s); 1113 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 1114 1115 return (0); 1116 } 1117 1118 static int 1119 es1371_rdcd(kobj_t obj, void *s, int addr) 1120 { 1121 uint32_t t, x, orig; 1122 struct es_info *es = (struct es_info *)s; 1123 1124 for (t = 0; t < 0x1000; t++) { 1125 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 1126 break; 1127 } 1128 1129 /* save the current state for later */ 1130 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 1131 /* enable SRC state data in SRC mux */ 1132 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1133 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4); 1134 /* busy wait */ 1135 for (t = 0; t < 0x1000; t++) { 1136 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1137 0x00000000) 1138 break; 1139 } 1140 /* wait for a SAFE time to write addr/data and then do it, dammit */ 1141 for (t = 0; t < 0x1000; t++) { 1142 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1143 0x00010000) 1144 break; 1145 } 1146 1147 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) & 1148 CODEC_POADD_MASK) | CODEC_PORD, 4); 1149 1150 /* restore SRC reg */ 1151 es1371_wait_src_ready(s); 1152 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 1153 1154 /* now wait for the stinkin' data (RDY) */ 1155 for (t = 0; t < 0x1000; t++) { 1156 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY) 1157 break; 1158 } 1159 1160 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 1161 } 1162 1163 static kobj_method_t es1371_ac97_methods[] = { 1164 KOBJMETHOD(ac97_read, es1371_rdcd), 1165 KOBJMETHOD(ac97_write, es1371_wrcd), 1166 { 0, 0 } 1167 }; 1168 AC97_DECLARE(es1371_ac97); 1169 1170 /* -------------------------------------------------------------------- */ 1171 1172 static unsigned int 1173 es1371_src_read(struct es_info *es, unsigned short reg) 1174 { 1175 uint32_t r; 1176 1177 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1178 ES1371_DIS_P2 | ES1371_DIS_R1); 1179 r |= ES1371_SRC_RAM_ADDRO(reg); 1180 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1181 return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es))); 1182 } 1183 1184 static void 1185 es1371_src_write(struct es_info *es, unsigned short reg, unsigned short data) 1186 { 1187 uint32_t r; 1188 1189 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1190 ES1371_DIS_P2 | ES1371_DIS_R1); 1191 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 1192 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 1193 } 1194 1195 static unsigned int 1196 es1371_adc_rate(struct es_info *es, unsigned int rate, int set) 1197 { 1198 unsigned int n, truncm, freq, result; 1199 1200 ES_LOCK_ASSERT(es); 1201 1202 if (rate > 48000) 1203 rate = 48000; 1204 if (rate < 4000) 1205 rate = 4000; 1206 n = rate / 3000; 1207 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 1208 n--; 1209 truncm = (21 * n - 1) | 1; 1210 freq = ((48000UL << 15) / rate) * n; 1211 result = (48000UL << 15) / (freq / n); 1212 if (set) { 1213 if (rate >= 24000) { 1214 if (truncm > 239) 1215 truncm = 239; 1216 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 1217 (((239 - truncm) >> 1) << 9) | (n << 4)); 1218 } else { 1219 if (truncm > 119) 1220 truncm = 119; 1221 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 1222 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 1223 } 1224 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 1225 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 1226 0x00ff) | ((freq >> 5) & 0xfc00)); 1227 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, 1228 freq & 0x7fff); 1229 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 1230 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 1231 } 1232 return (result); 1233 } 1234 1235 static unsigned int 1236 es1371_dac_rate(struct es_info *es, unsigned int rate, int set) 1237 { 1238 unsigned int freq, r, result, dac, dis; 1239 1240 ES_LOCK_ASSERT(es); 1241 1242 if (rate > 48000) 1243 rate = 48000; 1244 if (rate < 4000) 1245 rate = 4000; 1246 freq = ((rate << 15) + 1500) / 3000; 1247 result = (freq * 3000) >> 15; 1248 1249 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 1250 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1; 1251 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1252 ES1371_DIS_P2 | ES1371_DIS_R1)); 1253 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1254 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 1255 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | 1256 ((freq >> 5) & 0xfc00)); 1257 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 1258 r = (es1371_wait_src_ready(es) & 1259 (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 1260 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1261 return (result); 1262 } 1263 1264 static uint32_t 1265 es1371_wait_src_ready(struct es_info *es) 1266 { 1267 uint32_t t, r; 1268 1269 for (t = 0; t < 0x1000; t++) { 1270 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & 1271 ES1371_SRC_RAM_BUSY)) 1272 return (r); 1273 DELAY(1); 1274 } 1275 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, 1276 ES1371_REG_SMPRATE, r); 1277 return (0); 1278 } 1279 1280 /* -------------------------------------------------------------------- */ 1281 1282 /* 1283 * Probe and attach the card 1284 */ 1285 1286 static int 1287 es_pci_probe(device_t dev) 1288 { 1289 switch(pci_get_devid(dev)) { 1290 case ES1370_PCI_ID: 1291 device_set_desc(dev, "AudioPCI ES1370"); 1292 return (BUS_PROBE_DEFAULT); 1293 case ES1371_PCI_ID: 1294 switch(pci_get_revid(dev)) { 1295 case ES1371REV_ES1371_A: 1296 device_set_desc(dev, "AudioPCI ES1371-A"); 1297 return (BUS_PROBE_DEFAULT); 1298 case ES1371REV_ES1371_B: 1299 device_set_desc(dev, "AudioPCI ES1371-B"); 1300 return (BUS_PROBE_DEFAULT); 1301 case ES1371REV_ES1373_A: 1302 device_set_desc(dev, "AudioPCI ES1373-A"); 1303 return (BUS_PROBE_DEFAULT); 1304 case ES1371REV_ES1373_B: 1305 device_set_desc(dev, "AudioPCI ES1373-B"); 1306 return (BUS_PROBE_DEFAULT); 1307 case ES1371REV_ES1373_8: 1308 device_set_desc(dev, "AudioPCI ES1373-8"); 1309 return (BUS_PROBE_DEFAULT); 1310 case ES1371REV_CT5880_A: 1311 device_set_desc(dev, "Creative CT5880-A"); 1312 return (BUS_PROBE_DEFAULT); 1313 default: 1314 device_set_desc(dev, "AudioPCI ES1371-?"); 1315 device_printf(dev, 1316 "unknown revision %d -- please report to " 1317 "freebsd-multimedia@freebsd.org\n", 1318 pci_get_revid(dev)); 1319 return (BUS_PROBE_DEFAULT); 1320 } 1321 case ES1371_PCI_ID2: 1322 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 1323 device_printf(dev, 1324 "unknown revision %d -- please report to " 1325 "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev)); 1326 return (BUS_PROBE_DEFAULT); 1327 case CT4730_PCI_ID: 1328 switch(pci_get_revid(dev)) { 1329 case CT4730REV_CT4730_A: 1330 device_set_desc(dev, 1331 "Creative SB AudioPCI CT4730/EV1938"); 1332 return (BUS_PROBE_DEFAULT); 1333 default: 1334 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 1335 device_printf(dev, 1336 "unknown revision %d -- please report to " 1337 "freebsd-multimedia@freebsd.org\n", 1338 pci_get_revid(dev)); 1339 return (BUS_PROBE_DEFAULT); 1340 } 1341 case CT5880_PCI_ID: 1342 switch(pci_get_revid(dev)) { 1343 case CT5880REV_CT5880_C: 1344 device_set_desc(dev, "Creative CT5880-C"); 1345 return (BUS_PROBE_DEFAULT); 1346 case CT5880REV_CT5880_D: 1347 device_set_desc(dev, "Creative CT5880-D"); 1348 return (BUS_PROBE_DEFAULT); 1349 case CT5880REV_CT5880_E: 1350 device_set_desc(dev, "Creative CT5880-E"); 1351 return (BUS_PROBE_DEFAULT); 1352 default: 1353 device_set_desc(dev, "Creative CT5880-?"); 1354 device_printf(dev, 1355 "unknown revision %d -- please report to " 1356 "freebsd-multimedia@freebsd.org\n", 1357 pci_get_revid(dev)); 1358 return (BUS_PROBE_DEFAULT); 1359 } 1360 default: 1361 return (ENXIO); 1362 } 1363 } 1364 1365 #ifdef SND_DYNSYSCTL 1366 static int 1367 sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS) 1368 { 1369 struct es_info *es; 1370 device_t dev; 1371 uint32_t r; 1372 int err, new_en; 1373 1374 dev = oidp->oid_arg1; 1375 es = pcm_getdevinfo(dev); 1376 ES_LOCK(es); 1377 r = es_rd(es, ES1370_REG_STATUS, 4); 1378 ES_UNLOCK(es); 1379 new_en = (r & ENABLE_SPDIF) ? 1 : 0; 1380 err = sysctl_handle_int(oidp, &new_en, 0, req); 1381 1382 if (err || req->newptr == NULL) 1383 return (err); 1384 if (new_en < 0 || new_en > 1) 1385 return (EINVAL); 1386 1387 ES_LOCK(es); 1388 if (new_en) { 1389 r |= ENABLE_SPDIF; 1390 es->ctrl |= SPDIFEN_B; 1391 es->ctrl |= RECEN_B; 1392 } else { 1393 r &= ~ENABLE_SPDIF; 1394 es->ctrl &= ~SPDIFEN_B; 1395 es->ctrl &= ~RECEN_B; 1396 } 1397 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1398 es_wr(es, ES1370_REG_STATUS, r, 4); 1399 ES_UNLOCK(es); 1400 1401 return (0); 1402 } 1403 1404 static int 1405 sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS) 1406 { 1407 struct es_info *es; 1408 device_t dev; 1409 uint32_t val; 1410 int err; 1411 1412 dev = oidp->oid_arg1; 1413 es = pcm_getdevinfo(dev); 1414 ES_LOCK(es); 1415 val = pci_read_config(dev, PCIR_LATTIMER, 1); 1416 ES_UNLOCK(es); 1417 err = sysctl_handle_int(oidp, &val, 0, req); 1418 1419 if (err || req->newptr == NULL) 1420 return (err); 1421 if (val > 255) 1422 return (EINVAL); 1423 1424 ES_LOCK(es); 1425 pci_write_config(dev, PCIR_LATTIMER, val, 1); 1426 ES_UNLOCK(es); 1427 1428 return (0); 1429 } 1430 1431 static int 1432 sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS) 1433 { 1434 struct es_info *es; 1435 device_t dev; 1436 uint32_t val; 1437 int err; 1438 1439 dev = oidp->oid_arg1; 1440 es = pcm_getdevinfo(dev); 1441 ES_LOCK(es); 1442 val = ES_FIXED_RATE(es->escfg); 1443 if (val < es_caps.minspeed) 1444 val = 0; 1445 ES_UNLOCK(es); 1446 err = sysctl_handle_int(oidp, &val, 0, req); 1447 1448 if (err || req->newptr == NULL) 1449 return (err); 1450 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed)) 1451 return (EINVAL); 1452 1453 ES_LOCK(es); 1454 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) { 1455 ES_UNLOCK(es); 1456 return (EBUSY); 1457 } 1458 if (val) { 1459 if (val != ES_FIXED_RATE(es->escfg)) { 1460 es->escfg = ES_SET_FIXED_RATE(es->escfg, val); 1461 es->ch[ES_DAC2].caps.maxspeed = val; 1462 es->ch[ES_DAC2].caps.minspeed = val; 1463 es->ch[ES_ADC].caps.maxspeed = val; 1464 es->ch[ES_ADC].caps.minspeed = val; 1465 es->ctrl &= ~CTRL_PCLKDIV; 1466 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV; 1467 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1468 } 1469 } else { 1470 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1471 es->ch[ES_DAC2].caps = es_caps; 1472 es->ch[ES_ADC].caps = es_caps; 1473 } 1474 ES_UNLOCK(es); 1475 1476 return (0); 1477 } 1478 1479 static int 1480 sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS) 1481 { 1482 struct es_info *es; 1483 struct snddev_info *d; 1484 struct snd_mixer *m; 1485 device_t dev; 1486 uint32_t val, set; 1487 int recsrc, level, err; 1488 1489 dev = oidp->oid_arg1; 1490 d = device_get_softc(dev); 1491 if (!PCM_REGISTERED(d) || d->mixer_dev == NULL || 1492 d->mixer_dev->si_drv1 == NULL) 1493 return (EINVAL); 1494 es = d->devinfo; 1495 if (es == NULL) 1496 return (EINVAL); 1497 ES_LOCK(es); 1498 set = ES_SINGLE_PCM_MIX(es->escfg); 1499 val = set; 1500 ES_UNLOCK(es); 1501 err = sysctl_handle_int(oidp, &val, 0, req); 1502 1503 if (err || req->newptr == NULL) 1504 return (err); 1505 if (!(val == 0 || val == 1)) 1506 return (EINVAL); 1507 if (val == set) 1508 return (0); 1509 PCM_ACQUIRE_QUICK(d); 1510 m = (d->mixer_dev != NULL) ? d->mixer_dev->si_drv1 : NULL; 1511 if (m == NULL) { 1512 PCM_RELEASE_QUICK(d); 1513 return (ENODEV); 1514 } 1515 if (mixer_busy(m) != 0) { 1516 PCM_RELEASE_QUICK(d); 1517 return (EBUSY); 1518 } 1519 level = mix_get(m, SOUND_MIXER_PCM); 1520 recsrc = mix_getrecsrc(m); 1521 if (level < 0 || recsrc < 0) { 1522 PCM_RELEASE_QUICK(d); 1523 return (ENXIO); 1524 } 1525 1526 ES_LOCK(es); 1527 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) { 1528 ES_UNLOCK(es); 1529 PCM_RELEASE_QUICK(d); 1530 return (EBUSY); 1531 } 1532 if (val) 1533 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 1534 else 1535 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 1536 ES_UNLOCK(es); 1537 if (!val) { 1538 mix_setdevs(m, mix_getdevs(m) | (1 << SOUND_MIXER_SYNTH)); 1539 mix_setrecdevs(m, mix_getrecdevs(m) | (1 << SOUND_MIXER_SYNTH)); 1540 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f, 1541 (level >> 8) & 0x7f); 1542 } else { 1543 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f, 1544 (level >> 8) & 0x7f); 1545 mix_setdevs(m, mix_getdevs(m) & ~(1 << SOUND_MIXER_SYNTH)); 1546 mix_setrecdevs(m, mix_getrecdevs(m) & 1547 ~(1 << SOUND_MIXER_SYNTH)); 1548 } 1549 if (!err) { 1550 level = recsrc; 1551 if (recsrc & (1 << SOUND_MIXER_PCM)) 1552 recsrc |= 1 << SOUND_MIXER_SYNTH; 1553 else if (recsrc & (1 << SOUND_MIXER_SYNTH)) 1554 recsrc |= 1 << SOUND_MIXER_PCM; 1555 if (level != recsrc) 1556 err = mix_setrecsrc(m, recsrc); 1557 } 1558 1559 PCM_RELEASE_QUICK(d); 1560 1561 return (err); 1562 } 1563 1564 static int 1565 sysctl_es_polling(SYSCTL_HANDLER_ARGS) 1566 { 1567 struct es_info *es; 1568 device_t dev; 1569 int err, val; 1570 1571 dev = oidp->oid_arg1; 1572 es = pcm_getdevinfo(dev); 1573 if (es == NULL) 1574 return (EINVAL); 1575 ES_LOCK(es); 1576 val = es->polling; 1577 ES_UNLOCK(es); 1578 err = sysctl_handle_int(oidp, &val, 0, req); 1579 1580 if (err || req->newptr == NULL) 1581 return (err); 1582 if (val < 0 || val > 1) 1583 return (EINVAL); 1584 1585 ES_LOCK(es); 1586 if (val != es->polling) { 1587 if (es_chan_active(es) != 0) 1588 err = EBUSY; 1589 else if (val == 0) 1590 es->polling = 0; 1591 else 1592 es->polling = 1; 1593 } 1594 ES_UNLOCK(es); 1595 1596 return (err); 1597 } 1598 #endif /* SND_DYNSYSCTL */ 1599 1600 static void 1601 es_init_sysctls(device_t dev) 1602 { 1603 #ifdef SND_DYNSYSCTL 1604 struct es_info *es; 1605 int r, devid, revid; 1606 1607 devid = pci_get_devid(dev); 1608 revid = pci_get_revid(dev); 1609 es = pcm_getdevinfo(dev); 1610 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1611 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1612 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1613 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1614 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 1615 /* XXX: an user should be able to set this with a control tool, 1616 if not done before 7.0-RELEASE, this needs to be converted 1617 to a device specific sysctl "dev.pcm.X.yyy" via 1618 device_get_sysctl_*() as discussed on multimedia@ in msg-id 1619 <861wujij2q.fsf@xps.des.no> */ 1620 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1621 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 1622 "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1623 sysctl_es137x_spdif_enable, "I", 1624 "Enable S/PDIF output on primary playback channel"); 1625 } else if (devid == ES1370_PCI_ID) { 1626 /* 1627 * Enable fixed rate sysctl if both DAC2 / ADC enabled. 1628 */ 1629 if (es->ch[ES_DAC2].channel != NULL && 1630 es->ch[ES_ADC].channel != NULL) { 1631 /* XXX: an user should be able to set this with a control tool, 1632 if not done before 7.0-RELEASE, this needs to be converted 1633 to a device specific sysctl "dev.pcm.X.yyy" via 1634 device_get_sysctl_*() as discussed on multimedia@ in msg-id 1635 <861wujij2q.fsf@xps.des.no> */ 1636 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1637 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1638 OID_AUTO, "fixed_rate", CTLTYPE_INT | CTLFLAG_RW, 1639 dev, sizeof(dev), sysctl_es137x_fixed_rate, "I", 1640 "Enable fixed rate playback/recording"); 1641 } 1642 /* 1643 * Enable single pcm mixer sysctl if both DAC1/2 enabled. 1644 */ 1645 if (es->ch[ES_DAC1].channel != NULL && 1646 es->ch[ES_DAC2].channel != NULL) { 1647 /* XXX: an user should be able to set this with a control tool, 1648 if not done before 7.0-RELEASE, this needs to be converted 1649 to a device specific sysctl "dev.pcm.X.yyy" via 1650 device_get_sysctl_*() as discussed on multimedia@ in msg-id 1651 <861wujij2q.fsf@xps.des.no> */ 1652 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1653 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1654 OID_AUTO, "single_pcm_mixer", 1655 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1656 sysctl_es137x_single_pcm_mixer, "I", 1657 "Single PCM mixer controller for both DAC1/DAC2"); 1658 } 1659 } 1660 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 1661 "latency_timer", &r) == 0 && !(r < 0 || r > 255)) 1662 pci_write_config(dev, PCIR_LATTIMER, r, 1); 1663 /* XXX: this needs to be converted to a device specific sysctl 1664 "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on 1665 multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */ 1666 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1667 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 1668 "latency_timer", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1669 sysctl_es137x_latency_timer, "I", 1670 "PCI Latency Timer configuration"); 1671 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1672 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 1673 "polling", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1674 sysctl_es_polling, "I", 1675 "Enable polling mode"); 1676 #endif /* SND_DYNSYSCTL */ 1677 } 1678 1679 static int 1680 es_pci_attach(device_t dev) 1681 { 1682 uint32_t data; 1683 struct es_info *es = NULL; 1684 int mapped, i, numplay, dac_cfg; 1685 char status[SND_STATUSLEN]; 1686 struct ac97_info *codec = NULL; 1687 kobj_class_t ct = NULL; 1688 uint32_t devid; 1689 1690 es = malloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO); 1691 es->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_es137x softc"); 1692 es->dev = dev; 1693 es->escfg = 0; 1694 mapped = 0; 1695 1696 pci_enable_busmaster(dev); 1697 data = pci_read_config(dev, PCIR_COMMAND, 2); 1698 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN); 1699 pci_write_config(dev, PCIR_COMMAND, data, 2); 1700 data = pci_read_config(dev, PCIR_COMMAND, 2); 1701 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 1702 es->regid = MEM_MAP_REG; 1703 es->regtype = SYS_RES_MEMORY; 1704 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1705 RF_ACTIVE); 1706 if (es->reg) 1707 mapped++; 1708 } 1709 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 1710 es->regid = PCIR_BAR(0); 1711 es->regtype = SYS_RES_IOPORT; 1712 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1713 RF_ACTIVE); 1714 if (es->reg) 1715 mapped++; 1716 } 1717 if (mapped == 0) { 1718 device_printf(dev, "unable to map register space\n"); 1719 goto bad; 1720 } 1721 1722 es->st = rman_get_bustag(es->reg); 1723 es->sh = rman_get_bushandle(es->reg); 1724 callout_init(&es->poll_timer, CALLOUT_MPSAFE); 1725 es->poll_ticks = 1; 1726 1727 if (resource_int_value(device_get_name(dev), 1728 device_get_unit(dev), "polling", &i) == 0 && i != 0) 1729 es->polling = 1; 1730 else 1731 es->polling = 0; 1732 1733 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1734 if (resource_int_value(device_get_name(dev), 1735 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { 1736 i &= ES_BLK_ALIGN; 1737 if (i < ES_BLK_MIN) 1738 i = ES_BLK_MIN; 1739 es->blkcnt = es->bufsz / i; 1740 i = 0; 1741 while (es->blkcnt >> i) 1742 i++; 1743 es->blkcnt = 1 << (i - 1); 1744 if (es->blkcnt < ES_DMA_SEGS_MIN) 1745 es->blkcnt = ES_DMA_SEGS_MIN; 1746 else if (es->blkcnt > ES_DMA_SEGS_MAX) 1747 es->blkcnt = ES_DMA_SEGS_MAX; 1748 1749 } else 1750 es->blkcnt = 2; 1751 1752 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 1753 "dac", &dac_cfg) == 0) { 1754 if (dac_cfg < 0 || dac_cfg > 3) 1755 dac_cfg = ES_DEFAULT_DAC_CFG; 1756 } else 1757 dac_cfg = ES_DEFAULT_DAC_CFG; 1758 1759 switch (dac_cfg) { 1760 case 0: /* Enable all DAC: DAC1, DAC2 */ 1761 numplay = 2; 1762 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1763 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2); 1764 break; 1765 case 1: /* Only DAC1 */ 1766 numplay = 1; 1767 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1768 break; 1769 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */ 1770 numplay = 2; 1771 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1772 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1); 1773 break; 1774 case 2: /* Only DAC2 */ 1775 default: 1776 numplay = 1; 1777 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1778 break; 1779 } 1780 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay); 1781 es->escfg = ES_SET_NUMREC(es->escfg, 1); 1782 1783 devid = pci_get_devid(dev); 1784 switch (devid) { 1785 case ES1371_PCI_ID: 1786 case ES1371_PCI_ID2: 1787 case CT5880_PCI_ID: 1788 case CT4730_PCI_ID: 1789 es1371_init(es); 1790 codec = AC97_CREATE(dev, es, es1371_ac97); 1791 if (codec == NULL) 1792 goto bad; 1793 /* our init routine does everything for us */ 1794 /* set to NULL; flag mixer_init not to run the ac97_init */ 1795 /* ac97_mixer.init = NULL; */ 1796 if (mixer_init(dev, ac97_getmixerclass(), codec)) 1797 goto bad; 1798 ct = &eschan1371_class; 1799 break; 1800 case ES1370_PCI_ID: 1801 es1370_init(es); 1802 /* 1803 * Disable fixed rate operation if DAC2 disabled. 1804 * This is a special case for es1370 only, where the 1805 * speed of both ADC and DAC2 locked together. 1806 */ 1807 if (!ES_DAC2_ENABLED(es->escfg)) 1808 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1809 if (mixer_init(dev, &es1370_mixer_class, es)) 1810 goto bad; 1811 ct = &eschan1370_class; 1812 break; 1813 default: 1814 goto bad; 1815 /* NOTREACHED */ 1816 } 1817 1818 es->irqid = 0; 1819 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1820 RF_ACTIVE | RF_SHAREABLE); 1821 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, 1822 es, &es->ih)) { 1823 device_printf(dev, "unable to map interrupt\n"); 1824 goto bad; 1825 } 1826 1827 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), 1828 /*alignment*/2, /*boundary*/0, 1829 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1830 /*highaddr*/BUS_SPACE_MAXADDR, 1831 /*filter*/NULL, /*filterarg*/NULL, 1832 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1833 /*flags*/0, /*lockfunc*/NULL, 1834 /*lockarg*/NULL, &es->parent_dmat) != 0) { 1835 device_printf(dev, "unable to create dma tag\n"); 1836 goto bad; 1837 } 1838 1839 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 1840 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 1841 rman_get_start(es->reg), rman_get_start(es->irq), 1842 PCM_KLDSTRING(snd_es137x)); 1843 1844 if (pcm_register(dev, es, numplay, 1)) 1845 goto bad; 1846 for (i = 0; i < numplay; i++) 1847 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1848 pcm_addchan(dev, PCMDIR_REC, ct, es); 1849 es_init_sysctls(dev); 1850 pcm_setstatus(dev, status); 1851 es->escfg = ES_SET_GP(es->escfg, 0); 1852 if (numplay == 1) 1853 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n", 1854 ES_DAC_FIRST(es->escfg) + 1); 1855 else if (numplay == 2) 1856 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n", 1857 ES_DAC_FIRST(es->escfg) + 1, ES_DAC_SECOND(es->escfg) + 1); 1858 return (0); 1859 1860 bad: 1861 if (es->parent_dmat) 1862 bus_dma_tag_destroy(es->parent_dmat); 1863 if (es->ih) 1864 bus_teardown_intr(dev, es->irq, es->ih); 1865 if (es->irq) 1866 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1867 if (codec) 1868 ac97_destroy(codec); 1869 if (es->reg) 1870 bus_release_resource(dev, es->regtype, es->regid, es->reg); 1871 if (es->lock) 1872 snd_mtxfree(es->lock); 1873 if (es) 1874 free(es, M_DEVBUF); 1875 return (ENXIO); 1876 } 1877 1878 static int 1879 es_pci_detach(device_t dev) 1880 { 1881 int r; 1882 struct es_info *es; 1883 1884 r = pcm_unregister(dev); 1885 if (r) 1886 return (r); 1887 1888 es = pcm_getdevinfo(dev); 1889 1890 if (es != NULL && es->num != 0) { 1891 ES_LOCK(es); 1892 es->polling = 0; 1893 callout_stop(&es->poll_timer); 1894 ES_UNLOCK(es); 1895 callout_drain(&es->poll_timer); 1896 } 1897 1898 bus_teardown_intr(dev, es->irq, es->ih); 1899 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1900 bus_release_resource(dev, es->regtype, es->regid, es->reg); 1901 bus_dma_tag_destroy(es->parent_dmat); 1902 snd_mtxfree(es->lock); 1903 free(es, M_DEVBUF); 1904 1905 return (0); 1906 } 1907 1908 static device_method_t es_methods[] = { 1909 /* Device interface */ 1910 DEVMETHOD(device_probe, es_pci_probe), 1911 DEVMETHOD(device_attach, es_pci_attach), 1912 DEVMETHOD(device_detach, es_pci_detach), 1913 1914 { 0, 0 } 1915 }; 1916 1917 static driver_t es_driver = { 1918 "pcm", 1919 es_methods, 1920 PCM_SOFTC_SIZE, 1921 }; 1922 1923 DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 1924 MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1925 MODULE_VERSION(snd_es137x, 1); 1926