1 /* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49 */ 50 51 #include <dev/sound/pcm/sound.h> 52 #include <dev/sound/pcm/ac97.h> 53 #include <dev/sound/pci/es137x.h> 54 55 #include <pci/pcireg.h> 56 #include <pci/pcivar.h> 57 58 #include <sys/sysctl.h> 59 60 #include "mixer_if.h" 61 62 SND_DECLARE_FILE("$FreeBSD$"); 63 64 static int debug = 0; 65 SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 66 67 #define MEM_MAP_REG 0x14 68 69 /* PCI IDs of supported chips */ 70 #define ES1370_PCI_ID 0x50001274 71 #define ES1371_PCI_ID 0x13711274 72 #define ES1371_PCI_ID2 0x13713274 73 #define CT5880_PCI_ID 0x58801274 74 75 #define ES1371REV_ES1371_A 0x02 76 #define ES1371REV_ES1371_B 0x09 77 78 #define ES1371REV_ES1373_8 0x08 79 #define ES1371REV_ES1373_A 0x04 80 #define ES1371REV_ES1373_B 0x06 81 82 #define ES1371REV_CT5880_A 0x07 83 84 #define CT5880REV_CT5880_C 0x02 85 #define CT5880REV_CT5880_D 0x03 86 87 #define ES_DEFAULT_BUFSZ 4096 88 89 /* device private data */ 90 struct es_info; 91 92 struct es_chinfo { 93 struct es_info *parent; 94 struct pcm_channel *channel; 95 struct snd_dbuf *buffer; 96 int dir, num; 97 u_int32_t fmt, blksz, bufsz; 98 }; 99 100 struct es_info { 101 bus_space_tag_t st; 102 bus_space_handle_t sh; 103 bus_dma_tag_t parent_dmat; 104 105 struct resource *reg, *irq; 106 int regtype, regid, irqid; 107 void *ih; 108 109 device_t dev; 110 int num; 111 unsigned int bufsz; 112 113 /* Contents of board's registers */ 114 u_long ctrl; 115 u_long sctrl; 116 struct es_chinfo pch, rch; 117 }; 118 119 /* -------------------------------------------------------------------- */ 120 121 /* prototypes */ 122 static void es_intr(void *); 123 124 static u_int es1371_wait_src_ready(struct es_info *); 125 static void es1371_src_write(struct es_info *, u_short, unsigned short); 126 static u_int es1371_adc_rate(struct es_info *, u_int, int); 127 static u_int es1371_dac_rate(struct es_info *, u_int, int); 128 static int es1371_init(struct es_info *, device_t); 129 static int es1370_init(struct es_info *); 130 static int es1370_wrcodec(struct es_info *, u_char, u_char); 131 132 static u_int32_t es_playfmt[] = { 133 AFMT_U8, 134 AFMT_STEREO | AFMT_U8, 135 AFMT_S16_LE, 136 AFMT_STEREO | AFMT_S16_LE, 137 0 138 }; 139 static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 140 141 static u_int32_t es_recfmt[] = { 142 AFMT_U8, 143 AFMT_STEREO | AFMT_U8, 144 AFMT_S16_LE, 145 AFMT_STEREO | AFMT_S16_LE, 146 0 147 }; 148 static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 149 150 static const struct { 151 unsigned volidx:4; 152 unsigned left:4; 153 unsigned right:4; 154 unsigned stereo:1; 155 unsigned recmask:13; 156 unsigned avail:1; 157 } mixtable[SOUND_MIXER_NRDEVICES] = { 158 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 159 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 160 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 161 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 162 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 163 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 164 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 165 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 166 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 167 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 168 }; 169 170 /* -------------------------------------------------------------------- */ 171 /* The es1370 mixer interface */ 172 173 static int 174 es1370_mixinit(struct snd_mixer *m) 175 { 176 int i; 177 u_int32_t v; 178 179 v = 0; 180 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 181 if (mixtable[i].avail) v |= (1 << i); 182 mix_setdevs(m, v); 183 v = 0; 184 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 185 if (mixtable[i].recmask) v |= (1 << i); 186 mix_setrecdevs(m, v); 187 return 0; 188 } 189 190 static int 191 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 192 { 193 int l, r, rl, rr; 194 195 if (!mixtable[dev].avail) return -1; 196 l = left; 197 r = mixtable[dev].stereo? right : l; 198 if (mixtable[dev].left == 0xf) { 199 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 200 } else { 201 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 202 } 203 if (mixtable[dev].stereo) { 204 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 205 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 206 } 207 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 208 return l | (r << 8); 209 } 210 211 static int 212 es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 213 { 214 int i, j = 0; 215 216 if (src == 0) src = 1 << SOUND_MIXER_MIC; 217 src &= mix_getrecdevs(m); 218 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 219 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 220 221 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 222 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 223 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 224 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 225 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 226 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 227 return src; 228 } 229 230 static kobj_method_t es1370_mixer_methods[] = { 231 KOBJMETHOD(mixer_init, es1370_mixinit), 232 KOBJMETHOD(mixer_set, es1370_mixset), 233 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 234 { 0, 0 } 235 }; 236 MIXER_DECLARE(es1370_mixer); 237 238 /* -------------------------------------------------------------------- */ 239 240 static int 241 es1370_wrcodec(struct es_info *es, u_char i, u_char data) 242 { 243 int wait = 100; /* 100 msec timeout */ 244 245 do { 246 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 247 STAT_CSTAT) == 0) { 248 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 249 ((u_short)i << CODEC_INDEX_SHIFT) | data); 250 return 0; 251 } 252 DELAY(1000); 253 } while (--wait); 254 printf("pcm: es1370_wrcodec timed out\n"); 255 return -1; 256 } 257 258 /* -------------------------------------------------------------------- */ 259 260 /* channel interface */ 261 static void * 262 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 263 { 264 struct es_info *es = devinfo; 265 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 266 267 ch->parent = es; 268 ch->channel = c; 269 ch->buffer = b; 270 ch->bufsz = es->bufsz; 271 ch->blksz = ch->bufsz / 2; 272 ch->num = ch->parent->num++; 273 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) == -1) return NULL; 274 return ch; 275 } 276 277 static int 278 eschan_setdir(kobj_t obj, void *data, int dir) 279 { 280 struct es_chinfo *ch = data; 281 struct es_info *es = ch->parent; 282 283 if (dir == PCMDIR_PLAY) { 284 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8); 285 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, vtophys(sndbuf_getbuf(ch->buffer))); 286 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 287 } else { 288 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8); 289 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, vtophys(sndbuf_getbuf(ch->buffer))); 290 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 291 } 292 ch->dir = dir; 293 return 0; 294 } 295 296 static int 297 eschan_setformat(kobj_t obj, void *data, u_int32_t format) 298 { 299 struct es_chinfo *ch = data; 300 struct es_info *es = ch->parent; 301 302 if (ch->dir == PCMDIR_PLAY) { 303 es->sctrl &= ~SCTRL_P2FMT; 304 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 305 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 306 } else { 307 es->sctrl &= ~SCTRL_R1FMT; 308 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 309 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 310 } 311 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 312 ch->fmt = format; 313 return 0; 314 } 315 316 static int 317 eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 318 { 319 struct es_chinfo *ch = data; 320 struct es_info *es = ch->parent; 321 322 es->ctrl &= ~CTRL_PCLKDIV; 323 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 324 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 325 /* rec/play speeds locked together - should indicate in flags */ 326 return speed; /* XXX calc real speed */ 327 } 328 329 static int 330 eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 331 { 332 struct es_chinfo *ch = data; 333 struct es_info *es = ch->parent; 334 335 if (ch->dir == PCMDIR_PLAY) { 336 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 337 } else { 338 return es1371_adc_rate(es, speed, 1); /* record */ 339 } 340 } 341 342 static int 343 eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 344 { 345 struct es_chinfo *ch = data; 346 347 ch->blksz = blocksize; 348 ch->bufsz = ch->blksz * 2; 349 sndbuf_resize(ch->buffer, 2, ch->blksz); 350 351 return ch->blksz; 352 } 353 354 static int 355 eschan_trigger(kobj_t obj, void *data, int go) 356 { 357 struct es_chinfo *ch = data; 358 struct es_info *es = ch->parent; 359 unsigned cnt; 360 361 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 362 return 0; 363 364 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 365 366 if (ch->dir == PCMDIR_PLAY) { 367 if (go == PCMTRIG_START) { 368 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 369 es->ctrl |= CTRL_DAC2_EN; 370 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 371 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 372 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_SCOUNT, cnt); 373 /* start at beginning of buffer */ 374 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8); 375 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 376 } else es->ctrl &= ~CTRL_DAC2_EN; 377 } else { 378 if (go == PCMTRIG_START) { 379 es->ctrl |= CTRL_ADC_EN; 380 es->sctrl &= ~SCTRL_R1LOOPSEL; 381 es->sctrl |= SCTRL_R1INTEN; 382 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_SCOUNT, cnt); 383 /* start at beginning of buffer */ 384 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8); 385 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1); 386 } else es->ctrl &= ~CTRL_ADC_EN; 387 } 388 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 389 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 390 return 0; 391 } 392 393 static int 394 eschan_getptr(kobj_t obj, void *data) 395 { 396 struct es_chinfo *ch = data; 397 struct es_info *es = ch->parent; 398 u_int32_t reg, cnt; 399 400 if (ch->dir == PCMDIR_PLAY) 401 reg = ES1370_REG_DAC2_FRAMECNT; 402 else 403 reg = ES1370_REG_ADC_FRAMECNT; 404 405 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 406 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 407 /* cnt is longwords */ 408 return cnt << 2; 409 } 410 411 static struct pcmchan_caps * 412 eschan_getcaps(kobj_t obj, void *data) 413 { 414 struct es_chinfo *ch = data; 415 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 416 } 417 418 static kobj_method_t eschan1370_methods[] = { 419 KOBJMETHOD(channel_init, eschan_init), 420 KOBJMETHOD(channel_setdir, eschan_setdir), 421 KOBJMETHOD(channel_setformat, eschan_setformat), 422 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 423 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 424 KOBJMETHOD(channel_trigger, eschan_trigger), 425 KOBJMETHOD(channel_getptr, eschan_getptr), 426 KOBJMETHOD(channel_getcaps, eschan_getcaps), 427 { 0, 0 } 428 }; 429 CHANNEL_DECLARE(eschan1370); 430 431 static kobj_method_t eschan1371_methods[] = { 432 KOBJMETHOD(channel_init, eschan_init), 433 KOBJMETHOD(channel_setdir, eschan_setdir), 434 KOBJMETHOD(channel_setformat, eschan_setformat), 435 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 436 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 437 KOBJMETHOD(channel_trigger, eschan_trigger), 438 KOBJMETHOD(channel_getptr, eschan_getptr), 439 KOBJMETHOD(channel_getcaps, eschan_getcaps), 440 { 0, 0 } 441 }; 442 CHANNEL_DECLARE(eschan1371); 443 444 /* -------------------------------------------------------------------- */ 445 /* The interrupt handler */ 446 static void 447 es_intr(void *p) 448 { 449 struct es_info *es = p; 450 unsigned intsrc, sctrl; 451 452 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 453 if ((intsrc & STAT_INTR) == 0) return; 454 455 sctrl = es->sctrl; 456 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 457 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 458 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 459 460 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 461 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 462 463 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 464 if (intsrc & STAT_DAC1); 465 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 466 } 467 468 /* ES1370 specific */ 469 static int 470 es1370_init(struct es_info *es) 471 { 472 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 473 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 474 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 475 476 es->sctrl = 0; 477 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 478 479 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 480 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 481 * {LR,B}CLK2 and run off the LRCLK2 482 * PLL; program DAC_SYNC=0! */ 483 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 484 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 485 486 return 0; 487 } 488 489 /* ES1371 specific */ 490 int 491 es1371_init(struct es_info *es, device_t dev) 492 { 493 int idx; 494 int devid = pci_get_devid(dev); 495 int revid = pci_get_revid(dev); 496 497 if (debug > 0) printf("es_init\n"); 498 499 es->num = 0; 500 es->ctrl = 0; 501 es->sctrl = 0; 502 /* initialize the chips */ 503 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 504 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 505 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 506 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D)) { 507 bus_space_write_4(es->st, es->sh, ES1370_REG_STATUS, 0x20000000); 508 DELAY(20000); 509 if (debug > 0) device_printf(dev, "ac97 2.1 enabled\n"); 510 } else { /* pre ac97 2.1 card */ 511 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 512 if (debug > 0) device_printf(dev, "ac97 pre-2.1 enabled\n"); 513 } 514 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 515 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 516 /* AC'97 warm reset to start the bitclk */ 517 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 518 DELAY(2000); 519 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 520 /* Init the sample rate converter */ 521 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 522 for (idx = 0; idx < 0x80; idx++) 523 es1371_src_write(es, idx, 0); 524 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 525 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 526 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 527 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 528 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 529 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 530 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 531 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 532 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 533 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 534 es1371_adc_rate (es, 22050, 1); 535 es1371_dac_rate (es, 22050, 1); 536 es1371_dac_rate (es, 22050, 2); 537 /* WARNING: 538 * enabling the sample rate converter without properly programming 539 * its parameters causes the chip to lock up (the SRC busy bit will 540 * be stuck high, and I've found no way to rectify this other than 541 * power cycle) 542 */ 543 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 544 545 return (0); 546 } 547 548 /* -------------------------------------------------------------------- */ 549 550 static int 551 es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 552 { 553 int sl; 554 unsigned t, x; 555 struct es_info *es = (struct es_info*)s; 556 557 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 558 559 for (t = 0; t < 0x1000; t++) 560 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 561 break; 562 sl = spltty(); 563 /* save the current state for later */ 564 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 565 /* enable SRC state data in SRC mux */ 566 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 567 (es1371_wait_src_ready(s) & 568 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 569 /* wait for a SAFE time to write addr/data and then do it, dammit */ 570 for (t = 0; t < 0x1000; t++) 571 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 572 break; 573 574 if (debug > 2) 575 printf("one b_s_w: 0x%lx 0x%x 0x%x\n", 576 rman_get_start(es->reg), ES1371_REG_CODEC, 577 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 578 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 579 580 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 581 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 582 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 583 /* restore SRC reg */ 584 es1371_wait_src_ready(s); 585 if (debug > 2) 586 printf("two b_s_w: 0x%lx 0x%x 0x%x\n", 587 rman_get_start(es->reg), ES1371_REG_SMPRATE, x); 588 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 589 splx(sl); 590 591 return 0; 592 } 593 594 static int 595 es1371_rdcd(kobj_t obj, void *s, int addr) 596 { 597 int sl; 598 unsigned t, x; 599 struct es_info *es = (struct es_info *)s; 600 601 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 602 603 for (t = 0; t < 0x1000; t++) 604 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 605 break; 606 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 607 608 sl = spltty(); 609 610 /* save the current state for later */ 611 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 612 /* enable SRC state data in SRC mux */ 613 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 614 (es1371_wait_src_ready(s) & 615 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 616 /* wait for a SAFE time to write addr/data and then do it, dammit */ 617 for (t = 0; t < 0x5000; t++) 618 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 619 break; 620 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 621 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 622 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 623 624 /* restore SRC reg */ 625 es1371_wait_src_ready(s); 626 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 627 628 splx(sl); 629 630 /* now wait for the stinkin' data (RDY) */ 631 for (t = 0; t < 0x1000; t++) 632 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 633 break; 634 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 635 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 636 } 637 638 static kobj_method_t es1371_ac97_methods[] = { 639 KOBJMETHOD(ac97_read, es1371_rdcd), 640 KOBJMETHOD(ac97_write, es1371_wrcd), 641 { 0, 0 } 642 }; 643 AC97_DECLARE(es1371_ac97); 644 645 /* -------------------------------------------------------------------- */ 646 647 static u_int 648 es1371_src_read(struct es_info *es, u_short reg) 649 { 650 unsigned int r; 651 652 r = es1371_wait_src_ready(es) & 653 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 654 r |= ES1371_SRC_RAM_ADDRO(reg); 655 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 656 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 657 } 658 659 static void 660 es1371_src_write(struct es_info *es, u_short reg, u_short data){ 661 u_int r; 662 663 r = es1371_wait_src_ready(es) & 664 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 665 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 666 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 667 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 668 } 669 670 static u_int 671 es1371_adc_rate(struct es_info *es, u_int rate, int set) 672 { 673 u_int n, truncm, freq, result; 674 675 if (rate > 48000) rate = 48000; 676 if (rate < 4000) rate = 4000; 677 n = rate / 3000; 678 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 679 n--; 680 truncm = (21 * n - 1) | 1; 681 freq = ((48000UL << 15) / rate) * n; 682 result = (48000UL << 15) / (freq / n); 683 if (set) { 684 if (rate >= 24000) { 685 if (truncm > 239) truncm = 239; 686 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 687 (((239 - truncm) >> 1) << 9) | (n << 4)); 688 } else { 689 if (truncm > 119) truncm = 119; 690 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 691 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 692 } 693 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 694 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 695 0x00ff) | ((freq >> 5) & 0xfc00)); 696 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 697 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 698 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 699 } 700 return result; 701 } 702 703 static u_int 704 es1371_dac_rate(struct es_info *es, u_int rate, int set) 705 { 706 u_int freq, r, result, dac, dis; 707 708 if (rate > 48000) rate = 48000; 709 if (rate < 4000) rate = 4000; 710 freq = (rate << 15) / 3000; 711 result = (freq * 3000) >> 15; 712 if (set) { 713 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 714 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 715 716 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 717 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 718 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 719 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 720 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 721 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 722 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 723 } 724 return result; 725 } 726 727 static u_int 728 es1371_wait_src_ready(struct es_info *es) 729 { 730 u_int t, r; 731 732 for (t = 0; t < 500; t++) { 733 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 734 return r; 735 DELAY(1000); 736 } 737 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 738 return 0; 739 } 740 741 /* -------------------------------------------------------------------- */ 742 743 /* 744 * Probe and attach the card 745 */ 746 747 static int 748 es_pci_probe(device_t dev) 749 { 750 switch(pci_get_devid(dev)) { 751 case ES1370_PCI_ID: 752 device_set_desc(dev, "AudioPCI ES1370"); 753 return 0; 754 755 case ES1371_PCI_ID: 756 switch(pci_get_revid(dev)) { 757 case ES1371REV_ES1371_A: 758 device_set_desc(dev, "AudioPCI ES1371-A"); 759 return 0; 760 761 case ES1371REV_ES1371_B: 762 device_set_desc(dev, "AudioPCI ES1371-B"); 763 return 0; 764 765 case ES1371REV_ES1373_A: 766 device_set_desc(dev, "AudioPCI ES1373-A"); 767 return 0; 768 769 case ES1371REV_ES1373_B: 770 device_set_desc(dev, "AudioPCI ES1373-B"); 771 return 0; 772 773 case ES1371REV_ES1373_8: 774 device_set_desc(dev, "AudioPCI ES1373-8"); 775 return 0; 776 777 case ES1371REV_CT5880_A: 778 device_set_desc(dev, "Creative CT5880-A"); 779 return 0; 780 781 default: 782 device_set_desc(dev, "AudioPCI ES1371-?"); 783 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 784 return 0; 785 } 786 787 case ES1371_PCI_ID2: 788 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 789 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 790 return 0; 791 792 case CT5880_PCI_ID: 793 switch(pci_get_revid(dev)) { 794 case CT5880REV_CT5880_C: 795 device_set_desc(dev, "Creative CT5880-C"); 796 return 0; 797 798 case CT5880REV_CT5880_D: 799 device_set_desc(dev, "Creative CT5880-D"); 800 return 0; 801 802 default: 803 device_set_desc(dev, "Creative CT5880-?"); 804 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 805 return 0; 806 } 807 808 default: 809 return ENXIO; 810 } 811 } 812 813 static int 814 es_pci_attach(device_t dev) 815 { 816 u_int32_t data; 817 struct es_info *es = 0; 818 int mapped; 819 char status[SND_STATUSLEN]; 820 struct ac97_info *codec = 0; 821 kobj_class_t ct = NULL; 822 823 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 824 device_printf(dev, "cannot allocate softc\n"); 825 return ENXIO; 826 } 827 828 es->dev = dev; 829 mapped = 0; 830 data = pci_read_config(dev, PCIR_COMMAND, 2); 831 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 832 pci_write_config(dev, PCIR_COMMAND, data, 2); 833 data = pci_read_config(dev, PCIR_COMMAND, 2); 834 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 835 es->regid = MEM_MAP_REG; 836 es->regtype = SYS_RES_MEMORY; 837 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 838 0, ~0, 1, RF_ACTIVE); 839 if (es->reg) { 840 es->st = rman_get_bustag(es->reg); 841 es->sh = rman_get_bushandle(es->reg); 842 mapped++; 843 } 844 } 845 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 846 es->regid = PCIR_MAPS; 847 es->regtype = SYS_RES_IOPORT; 848 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 849 0, ~0, 1, RF_ACTIVE); 850 if (es->reg) { 851 es->st = rman_get_bustag(es->reg); 852 es->sh = rman_get_bushandle(es->reg); 853 mapped++; 854 } 855 } 856 if (mapped == 0) { 857 device_printf(dev, "unable to map register space\n"); 858 goto bad; 859 } 860 861 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 862 863 if (pci_get_devid(dev) == ES1371_PCI_ID || 864 pci_get_devid(dev) == ES1371_PCI_ID2 || 865 pci_get_devid(dev) == CT5880_PCI_ID) { 866 if(-1 == es1371_init(es, dev)) { 867 device_printf(dev, "unable to initialize the card\n"); 868 goto bad; 869 } 870 codec = AC97_CREATE(dev, es, es1371_ac97); 871 if (codec == NULL) goto bad; 872 /* our init routine does everything for us */ 873 /* set to NULL; flag mixer_init not to run the ac97_init */ 874 /* ac97_mixer.init = NULL; */ 875 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad; 876 ct = &eschan1371_class; 877 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 878 if (-1 == es1370_init(es)) { 879 device_printf(dev, "unable to initialize the card\n"); 880 goto bad; 881 } 882 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad; 883 ct = &eschan1370_class; 884 } else goto bad; 885 886 es->irqid = 0; 887 es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid, 888 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 889 if (!es->irq || snd_setup_intr(dev, es->irq, 0, es_intr, es, &es->ih)) { 890 device_printf(dev, "unable to map interrupt\n"); 891 goto bad; 892 } 893 894 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 895 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 896 /*highaddr*/BUS_SPACE_MAXADDR, 897 /*filter*/NULL, /*filterarg*/NULL, 898 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 899 /*flags*/0, &es->parent_dmat) != 0) { 900 device_printf(dev, "unable to create dma tag\n"); 901 goto bad; 902 } 903 904 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 905 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 906 rman_get_start(es->reg), rman_get_start(es->irq)); 907 908 if (pcm_register(dev, es, 1, 1)) goto bad; 909 pcm_addchan(dev, PCMDIR_REC, ct, es); 910 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 911 pcm_setstatus(dev, status); 912 913 return 0; 914 915 bad: 916 if (codec) ac97_destroy(codec); 917 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 918 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 919 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 920 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 921 if (es) free(es, M_DEVBUF); 922 return ENXIO; 923 } 924 925 static int 926 es_pci_detach(device_t dev) 927 { 928 int r; 929 struct es_info *es; 930 931 r = pcm_unregister(dev); 932 if (r) 933 return r; 934 935 es = pcm_getdevinfo(dev); 936 bus_release_resource(dev, es->regtype, es->regid, es->reg); 937 bus_teardown_intr(dev, es->irq, es->ih); 938 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 939 bus_dma_tag_destroy(es->parent_dmat); 940 free(es, M_DEVBUF); 941 942 return 0; 943 } 944 945 static device_method_t es_methods[] = { 946 /* Device interface */ 947 DEVMETHOD(device_probe, es_pci_probe), 948 DEVMETHOD(device_attach, es_pci_attach), 949 DEVMETHOD(device_detach, es_pci_detach), 950 951 { 0, 0 } 952 }; 953 954 static driver_t es_driver = { 955 "pcm", 956 es_methods, 957 PCM_SOFTC_SIZE, 958 }; 959 960 DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 961 MODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 962 MODULE_VERSION(snd_es137x, 1); 963