1 /*- 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * Copyright (c) 2003-2006 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef EMU10KX_H 31 #define EMU10KX_H 32 33 #define SND_EMU10KX_MINVER 1 34 #define SND_EMU10KX_PREFVER 1 35 #define SND_EMU10KX_MAXVER 1 36 37 #ifdef _KERNEL 38 39 #define EMUPAGESIZE 4096 40 #define NUM_G 64 41 #define EMU_PLAY_BUFSZ EMUPAGESIZE*16 42 /* Recording is limited by EMUPAGESIZE*16=64K buffer */ 43 #define EMU_REC_BUFSZ EMUPAGESIZE*16 44 #define EMU_MAX_BUFSZ EMUPAGESIZE*16 45 #define EMU_MAXPAGES 8192 46 47 48 #define EMU_VAR_FUNC 0 49 #define EMU_VAR_ROUTE 1 50 #define EMU_VAR_ISEMU10K1 2 51 52 #define RT_FRONT 0 53 #define RT_REAR 1 54 #define RT_CENTER 2 55 #define RT_SUB 3 56 #define RT_SIDE 4 57 #define RT_MCHRECORD 5 58 #define RT_COUNT 6 59 60 /* mixer controls */ 61 /* fx play */ 62 #define M_FX0_FRONT_L 0 63 #define M_FX1_FRONT_R 1 64 #define M_FX2_REAR_L 2 65 #define M_FX3_REAR_R 3 66 #define M_FX4_CENTER 4 67 #define M_FX5_SUBWOOFER 5 68 #define M_FX6_SIDE_L 6 69 #define M_FX7_SIDE_R 7 70 /* fx rec */ 71 #define M_FX0_REC_L 8 72 #define M_FX1_REC_R 9 73 /* inputs play */ 74 #define M_IN0_FRONT_L 10 75 #define M_IN0_FRONT_R 11 76 #define M_IN1_FRONT_L 12 77 #define M_IN1_FRONT_R 13 78 #define M_IN2_FRONT_L 14 79 #define M_IN2_FRONT_R 15 80 #define M_IN3_FRONT_L 16 81 #define M_IN3_FRONT_R 17 82 #define M_IN4_FRONT_L 18 83 #define M_IN4_FRONT_R 19 84 #define M_IN5_FRONT_L 20 85 #define M_IN5_FRONT_R 21 86 #define M_IN6_FRONT_L 22 87 #define M_IN6_FRONT_R 23 88 #define M_IN7_FRONT_L 24 89 #define M_IN7_FRONT_R 25 90 /* inputs rec */ 91 #define M_IN0_REC_L 26 92 #define M_IN0_REC_R 27 93 #define M_IN1_REC_L 28 94 #define M_IN1_REC_R 29 95 #define M_IN2_REC_L 30 96 #define M_IN2_REC_R 31 97 #define M_IN3_REC_L 32 98 #define M_IN3_REC_R 33 99 #define M_IN4_REC_L 34 100 #define M_IN4_REC_R 35 101 #define M_IN5_REC_L 36 102 #define M_IN5_REC_R 37 103 #define M_IN6_REC_L 38 104 #define M_IN6_REC_R 39 105 #define M_IN7_REC_L 40 106 #define M_IN7_REC_R 41 107 /* master volume */ 108 #define M_MASTER_FRONT_L 42 109 #define M_MASTER_FRONT_R 43 110 #define M_MASTER_REAR_L 44 111 #define M_MASTER_REAR_R 45 112 #define M_MASTER_CENTER 46 113 #define M_MASTER_SUBWOOFER 47 114 #define M_MASTER_SIDE_L 48 115 #define M_MASTER_SIDE_R 49 116 /* master rec volume */ 117 #define M_MASTER_REC_L 50 118 #define M_MASTER_REC_R 51 119 120 #define NUM_MIXERS 52 121 122 struct emu_sc_info; 123 124 /* MIDI device parameters */ 125 struct emu_midiinfo { 126 struct emu_sc_info *card; 127 int port; 128 int portnr; 129 }; 130 131 /* PCM device parameters */ 132 struct emu_pcminfo { 133 struct emu_sc_info *card; 134 int route; 135 }; 136 137 int emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc); 138 int emu_intr_unregister(struct emu_sc_info *sc, int ihandle); 139 140 uint32_t emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size); 141 void emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); 142 143 uint32_t emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg); 144 void emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data); 145 146 uint32_t emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg); 147 void emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data); 148 149 int emu_timer_create(struct emu_sc_info *sc); 150 int emu_timer_set(struct emu_sc_info *sc, int timer, int delay); 151 int emu_timer_enable(struct emu_sc_info *sc, int timer, int go); 152 int emu_timer_clear(struct emu_sc_info *sc, int timer); 153 154 struct emu_voice; 155 156 struct emu_route { 157 int routing_left[8]; 158 int amounts_left[8]; 159 int routing_right[8]; 160 int amounts_right[8]; 161 }; 162 163 struct emu_voice* emu_valloc(struct emu_sc_info *sc); 164 void emu_vfree(struct emu_sc_info *sc, struct emu_voice *v); 165 int emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, 166 uint32_t sz, struct snd_dbuf *b); 167 void emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v); 168 void emu_vsetup(struct emu_voice *v, int fmt, int spd); 169 void emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v); 170 void emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go); 171 int emu_vpos(struct emu_sc_info *sc, struct emu_voice *v); 172 173 bus_dma_tag_t emu_gettag(struct emu_sc_info *sc); 174 175 void emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume); 176 int emumix_get_volume(struct emu_sc_info *sc, int mixer_idx); 177 178 void emu_enable_ir(struct emu_sc_info *sc); 179 #endif /* _KERNEL */ 180 #endif /* EMU10K1_H */ 181