1 /*- 2 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 3 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/param.h> 31 #include <sys/types.h> 32 #include <sys/bus.h> 33 #include <machine/bus.h> 34 #include <sys/rman.h> 35 #include <sys/systm.h> 36 #include <sys/sbuf.h> 37 #include <sys/queue.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sysctl.h> 41 #include <sys/kdb.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <machine/clock.h> /* for DELAY */ 47 48 #ifdef HAVE_KERNEL_OPTION_HEADERS 49 #include "opt_snd.h" 50 #endif 51 52 #include <dev/sound/chip.h> 53 #include <dev/sound/pcm/sound.h> 54 #include <dev/sound/pcm/ac97.h> 55 56 #include <dev/sound/pci/emuxkireg.h> 57 #include <dev/sound/pci/emu10kx.h> 58 59 /* hw flags */ 60 #define HAS_51 0x0001 61 #define HAS_71 0x0002 62 #define HAS_AC97 0x0004 63 64 #define IS_EMU10K1 0x0008 65 #define IS_EMU10K2 0x0010 66 #define IS_CA0102 0x0020 67 #define IS_CA0108 0x0040 68 #define IS_UNKNOWN 0x0080 69 70 #define BROKEN_DIGITAL 0x0100 71 #define DIGITAL_ONLY 0x0200 72 73 #define IS_CARDBUS 0x0400 74 75 #define MODE_ANALOG 1 76 #define MODE_DIGITAL 2 77 #define SPDIF_MODE_PCM 1 78 #define SPDIF_MODE_AC3 2 79 80 #define MACS 0x0 81 #define MACS1 0x1 82 #define MACW 0x2 83 #define MACW1 0x3 84 #define MACINTS 0x4 85 #define MACINTW 0x5 86 #define ACC3 0x6 87 #define MACMV 0x7 88 #define ANDXOR 0x8 89 #define TSTNEG 0x9 90 #define LIMIT 0xA 91 #define LIMIT1 0xB 92 #define LOG 0xC 93 #define EXP 0xD 94 #define INTERP 0xE 95 #define SKIP 0xF 96 97 #define GPR(i) (sc->gpr_base+(i)) 98 #define INP(i) (sc->input_base+(i)) 99 #define OUTP(i) (sc->output_base+(i)) 100 #define FX(i) (i) 101 #define FX2(i) (sc->efxc_base+(i)) 102 #define DSP_CONST(i) (sc->dsp_zero+(i)) 103 104 #define COND_NORMALIZED DSP_CONST(0x1) 105 #define COND_BORROW DSP_CONST(0x2) 106 #define COND_MINUS DSP_CONST(0x3) 107 #define COND_LESS_ZERO DSP_CONST(0x4) 108 #define COND_EQ_ZERO DSP_CONST(0x5) 109 #define COND_SATURATION DSP_CONST(0x6) 110 #define COND_NEQ_ZERO DSP_CONST(0x8) 111 112 #define DSP_ACCUM DSP_CONST(0x16) 113 #define DSP_CCR DSP_CONST(0x17) 114 115 /* Live! Inputs */ 116 #define IN_AC97_L 0x00 117 #define IN_AC97_R 0x01 118 #define IN_AC97 IN_AC97_L 119 #define IN_SPDIF_CD_L 0x02 120 #define IN_SPDIF_CD_R 0x03 121 #define IN_SPDIF_CD IN_SPDIF_CD_L 122 #define IN_ZOOM_L 0x04 123 #define IN_ZOOM_R 0x05 124 #define IN_ZOOM IN_ZOOM_L 125 #define IN_TOSLINK_L 0x06 126 #define IN_TOSLINK_R 0x07 127 #define IN_TOSLINK IN_TOSLINK_L 128 #define IN_LINE1_L 0x08 129 #define IN_LINE1_R 0x09 130 #define IN_LINE1 IN_LINE1_L 131 #define IN_COAX_SPDIF_L 0x0a 132 #define IN_COAX_SPDIF_R 0x0b 133 #define IN_COAX_SPDIF IN_COAX_SPDIF_L 134 #define IN_LINE2_L 0x0c 135 #define IN_LINE2_R 0x0d 136 #define IN_LINE2 IN_LINE2_L 137 #define IN_0E 0x0e 138 #define IN_0F 0x0f 139 140 /* Outputs */ 141 #define OUT_AC97_L 0x00 142 #define OUT_AC97_R 0x01 143 #define OUT_AC97 OUT_AC97_L 144 #define OUT_A_FRONT OUT_AC97 145 #define OUT_TOSLINK_L 0x02 146 #define OUT_TOSLINK_R 0x03 147 #define OUT_TOSLINK OUT_TOSLINK_L 148 #define OUT_D_CENTER 0x04 149 #define OUT_D_SUB 0x05 150 #define OUT_HEADPHONE_L 0x06 151 #define OUT_HEADPHONE_R 0x07 152 #define OUT_HEADPHONE OUT_HEADPHONE_L 153 #define OUT_REAR_L 0x08 154 #define OUT_REAR_R 0x09 155 #define OUT_REAR OUT_REAR_L 156 #define OUT_ADC_REC_L 0x0a 157 #define OUT_ADC_REC_R 0x0b 158 #define OUT_ADC_REC OUT_ADC_REC_L 159 #define OUT_MIC_CAP 0x0c 160 161 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */ 162 #define OUT_A_CENTER 0x11 163 #define OUT_A_SUB 0x12 164 165 /* Audigy Inputs */ 166 #define A_IN_AC97_L 0x00 167 #define A_IN_AC97_R 0x01 168 #define A_IN_AC97 A_IN_AC97_L 169 #define A_IN_SPDIF_CD_L 0x02 170 #define A_IN_SPDIF_CD_R 0x03 171 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L 172 #define A_IN_O_SPDIF_L 0x04 173 #define A_IN_O_SPDIF_R 0x05 174 #define A_IN_O_SPDIF A_IN_O_SPDIF_L 175 #define A_IN_LINE2_L 0x08 176 #define A_IN_LINE2_R 0x09 177 #define A_IN_LINE2 A_IN_LINE2_L 178 #define A_IN_R_SPDIF_L 0x0a 179 #define A_IN_R_SPDIF_R 0x0b 180 #define A_IN_R_SPDIF A_IN_R_SPDIF_L 181 #define A_IN_AUX2_L 0x0c 182 #define A_IN_AUX2_R 0x0d 183 #define A_IN_AUX2 A_IN_AUX2_L 184 185 /* Audigy Outputs */ 186 #define A_OUT_D_FRONT_L 0x00 187 #define A_OUT_D_FRONT_R 0x01 188 #define A_OUT_D_FRONT A_OUT_D_FRONT_L 189 #define A_OUT_D_CENTER 0x02 190 #define A_OUT_D_SUB 0x03 191 #define A_OUT_D_SIDE_L 0x04 192 #define A_OUT_D_SIDE_R 0x05 193 #define A_OUT_D_SIDE A_OUT_D_SIDE_L 194 #define A_OUT_D_REAR_L 0x06 195 #define A_OUT_D_REAR_R 0x07 196 #define A_OUT_D_REAR A_OUT_D_REAR_L 197 198 /* on Audigy Platinum only */ 199 #define A_OUT_HPHONE_L 0x04 200 #define A_OUT_HPHONE_R 0x05 201 #define A_OUT_HPHONE A_OUT_HPHONE_L 202 203 #define A_OUT_A_FRONT_L 0x08 204 #define A_OUT_A_FRONT_R 0x09 205 #define A_OUT_A_FRONT A_OUT_A_FRONT_L 206 #define A_OUT_A_CENTER 0x0a 207 #define A_OUT_A_SUB 0x0b 208 #define A_OUT_A_SIDE_L 0x0c 209 #define A_OUT_A_SIDE_R 0x0d 210 #define A_OUT_A_SIDE A_OUT_A_SIDE_L 211 #define A_OUT_A_REAR_L 0x0e 212 #define A_OUT_A_REAR_R 0x0f 213 #define A_OUT_A_REAR A_OUT_A_REAR_L 214 #define A_OUT_AC97_L 0x10 215 #define A_OUT_AC97_R 0x11 216 #define A_OUT_AC97 A_OUT_AC97_L 217 #define A_OUT_ADC_REC_L 0x16 218 #define A_OUT_ADC_REC_R 0x17 219 #define A_OUT_ADC_REC A_OUT_ADC_REC_L 220 221 #define EMU_DATA2 0x24 222 #define EMU_IPR2 0x28 223 #define EMU_INTE2 0x2c 224 #define EMU_IPR3 0x38 225 #define EMU_INTE3 0x3c 226 227 #define EMU_A2_SRCSel 0x60 228 #define EMU_A2_SRCMULTI_ENABLE 0x6e 229 230 #define EMU_A_I2S_CAPTURE_96000 0x00000400 231 232 #define EMU_A2_MIXER_I2S_ENABLE 0x7B 233 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A 234 235 #define C_FRONT_L 0 236 #define C_FRONT_R 1 237 #define C_REC_L 2 238 #define C_REC_R 3 239 #define C_REAR_L 4 240 #define C_REAR_R 5 241 #define C_CENTER 6 242 #define C_SUB 7 243 #define C_SIDE_L 8 244 #define C_SIDE_R 9 245 #define NUM_CACHES 10 246 247 #define CDSPDIFMUTE 0 248 #define ANALOGMUTE 1 249 #define NUM_MUTE 2 250 251 #define EMU_MAX_GPR 512 252 #define EMU_MAX_IRQ_CONSUMERS 32 253 254 struct emu_voice { 255 int vnum; 256 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; 257 int speed; 258 int start; 259 int end; 260 int vol; 261 uint32_t buf; 262 void *vbuf; 263 struct emu_voice *slave; 264 uint32_t sa; 265 uint32_t ea; 266 uint32_t routing[8]; 267 uint32_t amounts[8]; 268 }; 269 270 struct emu_memblk { 271 SLIST_ENTRY(emu_memblk) link; 272 void *buf; 273 char owner[16]; 274 bus_addr_t buf_addr; 275 uint32_t pte_start, pte_size; 276 bus_dmamap_t buf_map; 277 }; 278 279 struct emu_mem { 280 uint8_t bmap[EMU_MAXPAGES / 8]; 281 uint32_t *ptb_pages; 282 void *silent_page; 283 bus_addr_t ptb_pages_addr; 284 bus_addr_t silent_page_addr; 285 bus_dmamap_t ptb_map; 286 bus_dmamap_t silent_map; 287 bus_dma_tag_t dmat; 288 struct emu_sc_info *card; 289 SLIST_HEAD(, emu_memblk) blocks; 290 }; 291 292 /* rm */ 293 struct emu_rm { 294 struct emu_sc_info *card; 295 struct mtx gpr_lock; 296 signed int allocmap[EMU_MAX_GPR]; 297 int num_gprs; 298 int last_free_gpr; 299 int num_used; 300 }; 301 302 struct emu_intr_handler { 303 void* softc; 304 uint32_t intr_mask; 305 uint32_t inte_mask; 306 uint32_t(*irq_func) (void *softc, uint32_t irq); 307 }; 308 309 struct emu_sc_info { 310 struct mtx lock; 311 struct mtx rw; /* Hardware exclusive access lock */ 312 313 /* Hardware and subdevices */ 314 device_t dev; 315 device_t pcm[RT_COUNT]; 316 device_t midi[2]; 317 uint32_t type; 318 uint32_t rev; 319 320 bus_space_tag_t st; 321 bus_space_handle_t sh; 322 323 struct cdev *cdev; /* /dev/emu10k character device */ 324 struct mtx emu10kx_lock; 325 int emu10kx_isopen; 326 struct sbuf emu10kx_sbuf; 327 int emu10kx_bufptr; 328 329 330 /* Resources */ 331 struct resource *reg; 332 struct resource *irq; 333 void *ih; 334 335 /* IRQ handlers */ 336 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS]; 337 338 /* Card HW configuration */ 339 unsigned int mode; /* analog / digital */ 340 unsigned int mchannel_fx; 341 unsigned int dsp_zero; 342 unsigned int code_base; 343 unsigned int code_size; 344 unsigned int gpr_base; 345 unsigned int num_gprs; 346 unsigned int input_base; 347 unsigned int output_base; 348 unsigned int efxc_base; 349 unsigned int opcode_shift; 350 unsigned int high_operand_shift; 351 unsigned int address_mask; 352 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1, 353 has_ac97:1, has_51:1, has_71:1, 354 enable_ir:1, 355 broken_digital:1, is_cardbus:1; 356 357 signed int mch_disabled, mch_rec, dbg_level; 358 signed int num_inputs; 359 unsigned int num_outputs; 360 unsigned int num_fxbuses; 361 unsigned int routing_code_start; 362 unsigned int routing_code_end; 363 364 /* HW resources */ 365 struct emu_voice voice[NUM_G]; /* Hardware voices */ 366 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ 367 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ 368 int timerinterval; 369 struct emu_rm *rm; 370 struct emu_mem mem; /* memory */ 371 372 /* Mixer */ 373 int mixer_gpr[NUM_MIXERS]; 374 int mixer_volcache[NUM_MIXERS]; 375 int cache_gpr[NUM_CACHES]; 376 int dummy_gpr; 377 int mute_gpr[NUM_MUTE]; 378 struct sysctl_ctx_list *ctx; 379 struct sysctl_oid *root; 380 }; 381 382 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error); 383 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map); 384 static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); 385 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner); 386 static int emu_memfree(struct emu_mem *mem, void *membuf); 387 static int emu_memstart(struct emu_mem *mem, void *membuf); 388 389 /* /dev */ 390 static int emu10kx_dev_init(struct emu_sc_info *sc); 391 static int emu10kx_dev_uninit(struct emu_sc_info *sc); 392 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); 393 394 static void emumix_set_mode(struct emu_sc_info *sc, int mode); 395 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); 396 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); 397 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); 398 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); 399 400 static int emu_rm_init(struct emu_sc_info *sc); 401 static int emu_rm_uninit(struct emu_sc_info *sc); 402 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); 403 404 static unsigned int emu_getcard(device_t dev); 405 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size); 406 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); 407 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); 408 409 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); 410 411 static void emu_intr(void *p); 412 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data); 413 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc); 414 static void emu_initefx(struct emu_sc_info *sc); 415 416 static int emu_cardbus_init(struct emu_sc_info *sc); 417 static int emu_init(struct emu_sc_info *sc); 418 static int emu_uninit(struct emu_sc_info *sc); 419 420 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result); 421 static int emu_write_ivar(device_t bus __unused, device_t dev __unused, 422 int ivar_index, uintptr_t value __unused); 423 424 static int emu_pci_probe(device_t dev); 425 static int emu_pci_attach(device_t dev); 426 static int emu_pci_detach(device_t dev); 427 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); 428 429 #ifdef SND_EMU10KX_DEBUG 430 431 #define EMU_MTX_DEBUG() do { \ 432 if (mtx_owned(&sc->rw)) { \ 433 printf("RW owned in %s line %d for %s\n", __func__, \ 434 __LINE__ , device_get_nameunit(sc->dev)); \ 435 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ 436 printf("rw lock: value %x thread %x\n", \ 437 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ 438 (uintptr_t)curthread); \ 439 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\ 440 db_show_mtx(&sc->rw); \ 441 } \ 442 } while (0) 443 #else 444 #define EMU_MTX_DEBUG() do { \ 445 } while (0) 446 #endif 447 448 #define EMU_RWLOCK() do { \ 449 EMU_MTX_DEBUG(); \ 450 mtx_lock(&(sc->rw)); \ 451 } while (0) 452 453 #define EMU_RWUNLOCK() do { \ 454 mtx_unlock(&(sc->rw)); \ 455 EMU_MTX_DEBUG(); \ 456 } while (0) 457 458 /* Supported cards */ 459 struct emu_hwinfo { 460 uint16_t vendor; 461 uint16_t device; 462 uint16_t subvendor; 463 uint16_t subdevice; 464 char SBcode[8]; 465 char desc[32]; 466 int flags; 467 }; 468 469 static struct emu_hwinfo emu_cards[] = { 470 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0}, 471 /* 0x0020..0x002f 4.0 EMU10K1 cards */ 472 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 473 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1}, 474 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1}, 475 476 /* (range unknown) 5.1 EMU10K1 cards */ 477 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 478 479 /* 0x80??..0x805? 4.0 EMU10K1 cards */ 480 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 481 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1}, 482 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 483 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1}, 484 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 485 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 486 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1}, 487 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 488 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 489 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 490 491 /* 0x8061..0x???? 5.1 EMU10K1 cards */ 492 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 493 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1}, 494 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 495 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 496 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 497 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1}, 498 499 /* Generic SB Live! */ 500 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1}, 501 502 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */ 503 504 /* 0x0051..0x0051 5.1 CA0100-IAF cards */ 505 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2}, 506 /* ES is CA0100-IDF chip that don't work in digital mode */ 507 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL}, 508 /* 0x0053..0x005C 5.1 CA0101-NAF cards */ 509 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 510 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 511 512 /* 0x1002..0x1009 5.1 CA0102-IAT cards */ 513 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102}, 514 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102}, 515 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102}, 516 517 /* 0x2001..0x2003 7.1 CA0102-ICT cards */ 518 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 519 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 520 /* XXX No reports about 0x2003 & 0x2004 cards */ 521 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 522 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 523 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 524 525 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */ 526 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102}, 527 528 /* Generic Audigy or Audigy 2 */ 529 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2}, 530 531 /* We don't support CA0103-DAT (Audigy LS) cards */ 532 /* There is NO CA0104-xxx cards */ 533 /* There is NO CA0105-xxx cards */ 534 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */ 535 /* There is NO CA0107-xxx cards */ 536 537 /* 0x1000..0x1001 7.1 CA0108-IAT cards */ 538 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY}, 539 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 540 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 541 542 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS}, 543 544 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108}, 545 }; 546 /* Unsupported cards */ 547 548 static struct emu_hwinfo emu_bad_cards[] = { 549 /* APS cards should be possible to support */ 550 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0}, 551 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0}, 552 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0}, 553 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */ 554 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0}, 555 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0}, 556 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0}, 557 }; 558 559 /* 560 * Get best known information about device. 561 */ 562 static unsigned int 563 emu_getcard(device_t dev) 564 { 565 uint16_t device; 566 uint16_t subdevice; 567 int n_cards; 568 unsigned int thiscard; 569 int i; 570 571 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2); 572 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2); 573 574 n_cards = sizeof(emu_cards) / sizeof(struct emu_hwinfo); 575 thiscard = 0; 576 for (i = 1; i < n_cards; i++) { 577 if (device == emu_cards[i].device) { 578 if (subdevice == emu_cards[i].subdevice) { 579 thiscard = i; 580 break; 581 } 582 if (0x0000 == emu_cards[i].subdevice) { 583 thiscard = i; 584 /* 585 * don't break, we can get more specific card 586 * later in the list. 587 */ 588 } 589 } 590 } 591 592 n_cards = sizeof(emu_bad_cards) / sizeof(struct emu_hwinfo); 593 for (i = 0; i < n_cards; i++) { 594 if (device == emu_bad_cards[i].device) { 595 if (subdevice == emu_bad_cards[i].subdevice) { 596 thiscard = 0; 597 break; 598 } 599 if (0x0000 == emu_bad_cards[i].subdevice) { 600 thiscard = 0; 601 break; /* we avoid all this cards */ 602 } 603 } 604 } 605 return (thiscard); 606 } 607 608 609 /* 610 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers. 611 * Some of them are used directly, some of them provide pointer / data pairs. 612 */ 613 static uint32_t 614 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 615 { 616 617 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 618 switch (size) { 619 case 1: 620 return (bus_space_read_1(sc->st, sc->sh, regno)); 621 case 2: 622 return (bus_space_read_2(sc->st, sc->sh, regno)); 623 case 4: 624 return (bus_space_read_4(sc->st, sc->sh, regno)); 625 } 626 return (0xffffffff); 627 } 628 629 static void 630 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 631 { 632 633 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 634 switch (size) { 635 case 1: 636 bus_space_write_1(sc->st, sc->sh, regno, data); 637 break; 638 case 2: 639 bus_space_write_2(sc->st, sc->sh, regno, data); 640 break; 641 case 4: 642 bus_space_write_4(sc->st, sc->sh, regno, data); 643 break; 644 } 645 } 646 /* 647 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made 648 * via (channel, register) pair. Some registers are channel-specific, 649 * some not. 650 */ 651 uint32_t 652 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg) 653 { 654 uint32_t ptr, val, mask, size, offset; 655 656 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 657 658 EMU_RWLOCK(); 659 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 660 val = emu_rd_nolock(sc, EMU_DATA, 4); 661 EMU_RWUNLOCK(); 662 663 /* 664 * XXX Some register numbers has data size and offset encoded in 665 * it to get only part of 32bit register. This use is not described 666 * in register name, be careful! 667 */ 668 if (reg & 0xff000000) { 669 size = (reg >> 24) & 0x3f; 670 offset = (reg >> 16) & 0x1f; 671 mask = ((1 << size) - 1) << offset; 672 val &= mask; 673 val >>= offset; 674 } 675 return (val); 676 } 677 678 void 679 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data) 680 { 681 uint32_t ptr, mask, size, offset; 682 683 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 684 685 EMU_RWLOCK(); 686 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 687 /* 688 * XXX Another kind of magic encoding in register number. This can 689 * give you side effect - it will read previous data from register 690 * and change only required bits. 691 */ 692 if (reg & 0xff000000) { 693 size = (reg >> 24) & 0x3f; 694 offset = (reg >> 16) & 0x1f; 695 mask = ((1 << size) - 1) << offset; 696 data <<= offset; 697 data &= mask; 698 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask; 699 } 700 emu_wr_nolock(sc, EMU_DATA, data, 4); 701 EMU_RWUNLOCK(); 702 } 703 /* 704 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made 705 * via (channel, register) pair. Some registers are channel-specific, 706 * some not. This interface is supported by CA0102 and CA0108 chips only. 707 */ 708 uint32_t 709 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg) 710 { 711 uint32_t val; 712 713 /* XXX separate lock? */ 714 EMU_RWLOCK(); 715 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 716 val = emu_rd_nolock(sc, EMU_DATA2, 4); 717 718 EMU_RWUNLOCK(); 719 720 return (val); 721 } 722 723 void 724 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data) 725 { 726 727 EMU_RWLOCK(); 728 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 729 emu_wr_nolock(sc, EMU_DATA2, data, 4); 730 EMU_RWUNLOCK(); 731 } 732 /* 733 * XXX CardBus interface. Not tested on any real hardware. 734 */ 735 static void 736 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data) 737 { 738 uint32_t val; 739 740 /* 741 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems 742 * to be some reg/value accessible kind of config register on CardBus 743 * CA0108, with value(?) in top 16 bit, address(?) in low 16 744 */ 745 746 val = emu_rd_nolock(sc, 0x38, 4); 747 emu_wr_nolock(sc, 0x38, data, 4); 748 val = emu_rd_nolock(sc, 0x38, 4); 749 750 } 751 752 /* 753 * Direct hardware register access 754 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked. 755 */ 756 void 757 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 758 { 759 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR")); 760 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR")); 761 762 emu_wr_nolock(sc, regno, data, size); 763 } 764 765 uint32_t 766 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 767 { 768 uint32_t rd; 769 770 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA")); 771 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2")); 772 773 rd = emu_rd_nolock(sc, regno, size); 774 return (rd); 775 } 776 777 /* 778 * Enabling IR MIDI messages is another kind of black magic. It just 779 * has to be made this way. It really do it. 780 */ 781 void 782 emu_enable_ir(struct emu_sc_info *sc) 783 { 784 uint32_t iocfg; 785 786 if (sc->is_emu10k2 || sc->is_ca0102) { 787 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2); 788 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2); 789 DELAY(500); 790 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); 791 DELAY(500); 792 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2); 793 DELAY(100); 794 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2); 795 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n"); 796 sc->enable_ir = 1; 797 } 798 if (sc->is_emu10k1) { 799 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4); 800 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4); 801 DELAY(500); 802 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); 803 DELAY(100); 804 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4); 805 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n"); 806 sc->enable_ir = 1; 807 } 808 } 809 810 811 /* 812 * emu_timer_ - HW timer management 813 */ 814 int 815 emu_timer_create(struct emu_sc_info *sc) 816 { 817 int i, timer; 818 819 timer = -1; 820 821 mtx_lock(&sc->lock); 822 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 823 if (sc->timer[i] == 0) { 824 sc->timer[i] = -1; /* disable it */ 825 timer = i; 826 mtx_unlock(&sc->lock); 827 return (timer); 828 } 829 mtx_unlock(&sc->lock); 830 831 return (-1); 832 } 833 834 int 835 emu_timer_set(struct emu_sc_info *sc, int timer, int delay) 836 { 837 int i; 838 839 if (timer < 0) 840 return (-1); 841 842 RANGE(delay, 16, 1024); 843 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 844 845 mtx_lock(&sc->lock); 846 sc->timer[timer] = delay; 847 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 848 if (sc->timerinterval > sc->timer[i]) 849 sc->timerinterval = sc->timer[i]; 850 851 /* XXX */ 852 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 853 mtx_unlock(&sc->lock); 854 855 return (timer); 856 } 857 858 int 859 emu_timer_enable(struct emu_sc_info *sc, int timer, int go) 860 { 861 uint32_t x; 862 int ena_int; 863 int i; 864 865 if (timer < 0) 866 return (-1); 867 868 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 869 870 mtx_lock(&sc->lock); 871 872 if ((go == 1) && (sc->timer[timer] < 0)) 873 sc->timer[timer] = -sc->timer[timer]; 874 if ((go == 0) && (sc->timer[timer] > 0)) 875 sc->timer[timer] = -sc->timer[timer]; 876 877 ena_int = 0; 878 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 879 if (sc->timerinterval > sc->timer[i]) 880 sc->timerinterval = sc->timer[i]; 881 if (sc->timer[i] > 0) 882 ena_int = 1; 883 } 884 885 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 886 887 if (ena_int == 1) { 888 x = emu_rd(sc, EMU_INTE, 4); 889 x |= EMU_INTE_INTERTIMERENB; 890 emu_wr(sc, EMU_INTE, x, 4); 891 } else { 892 x = emu_rd(sc, EMU_INTE, 4); 893 x &= ~EMU_INTE_INTERTIMERENB; 894 emu_wr(sc, EMU_INTE, x, 4); 895 } 896 mtx_unlock(&sc->lock); 897 return (0); 898 } 899 900 int 901 emu_timer_clear(struct emu_sc_info *sc, int timer) 902 { 903 if (timer < 0) 904 return (-1); 905 906 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 907 908 emu_timer_enable(sc, timer, 0); 909 910 mtx_lock(&sc->lock); 911 if (sc->timer[timer] != 0) 912 sc->timer[timer] = 0; 913 mtx_unlock(&sc->lock); 914 915 return (timer); 916 } 917 918 /* 919 * emu_intr_ - HW interrupt handler management 920 */ 921 int 922 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc) 923 { 924 int i; 925 uint32_t x; 926 927 mtx_lock(&sc->lock); 928 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 929 if (sc->ihandler[i].inte_mask == 0) { 930 sc->ihandler[i].inte_mask = inte_mask; 931 sc->ihandler[i].intr_mask = intr_mask; 932 sc->ihandler[i].softc = isc; 933 sc->ihandler[i].irq_func = func; 934 x = emu_rd(sc, EMU_INTE, 4); 935 x |= inte_mask; 936 emu_wr(sc, EMU_INTE, x, 4); 937 mtx_unlock(&sc->lock); 938 if (sc->dbg_level > 1) 939 device_printf(sc->dev, "ihandle %d registered\n", i); 940 941 return (i); 942 } 943 mtx_unlock(&sc->lock); 944 if (sc->dbg_level > 1) 945 device_printf(sc->dev, "ihandle not registered\n"); 946 947 return (-1); 948 } 949 950 int 951 emu_intr_unregister(struct emu_sc_info *sc, int hnumber) 952 { 953 uint32_t x; 954 int i; 955 956 mtx_lock(&sc->lock); 957 958 if (sc->ihandler[hnumber].inte_mask == 0) { 959 mtx_unlock(&sc->lock); 960 return (-1); 961 } 962 963 x = emu_rd(sc, EMU_INTE, 4); 964 x &= ~sc->ihandler[hnumber].inte_mask; 965 966 sc->ihandler[hnumber].inte_mask = 0; 967 sc->ihandler[hnumber].intr_mask = 0; 968 sc->ihandler[hnumber].softc = NULL; 969 sc->ihandler[hnumber].irq_func = NULL; 970 971 /* other interrupt handlers may use this EMU_INTE value */ 972 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 973 if (sc->ihandler[i].inte_mask != 0) 974 x |= sc->ihandler[i].inte_mask; 975 976 emu_wr(sc, EMU_INTE, x, 4); 977 978 mtx_unlock(&sc->lock); 979 return (hnumber); 980 } 981 982 static void 983 emu_intr(void *p) 984 { 985 struct emu_sc_info *sc = (struct emu_sc_info *)p; 986 uint32_t stat, ack; 987 int i; 988 989 for (;;) { 990 stat = emu_rd(sc, EMU_IPR, 4); 991 ack = 0; 992 if (stat == 0) 993 break; 994 emu_wr(sc, EMU_IPR, stat, 4); 995 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 996 if ((((sc->ihandler[i].intr_mask) & stat) != 0) && 997 (((void *)sc->ihandler[i].irq_func) != NULL)) { 998 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc, 999 (sc->ihandler[i].intr_mask) & stat); 1000 } 1001 } 1002 if (sc->dbg_level > 1) 1003 if (stat & (~ack)) 1004 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack)); 1005 1006 } 1007 1008 if ((sc->is_ca0102) || (sc->is_ca0108)) 1009 for (;;) { 1010 stat = emu_rd(sc, EMU_IPR2, 4); 1011 ack = 0; 1012 if (stat == 0) 1013 break; 1014 emu_wr(sc, EMU_IPR2, stat, 4); 1015 if (sc->dbg_level > 1) 1016 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat); 1017 1018 break; /* to avoid infinite loop. should be removed 1019 * after completion of P16V interface. */ 1020 } 1021 1022 if (sc->is_ca0102) 1023 for (;;) { 1024 stat = emu_rd(sc, EMU_IPR3, 4); 1025 ack = 0; 1026 if (stat == 0) 1027 break; 1028 emu_wr(sc, EMU_IPR3, stat, 4); 1029 if (sc->dbg_level > 1) 1030 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat); 1031 1032 break; /* to avoid infinite loop. should be removed 1033 * after completion of S/PDIF interface */ 1034 } 1035 } 1036 1037 1038 /* 1039 * Get data from private emu10kx structure for PCM buffer allocation. 1040 * Used by PCM code only. 1041 */ 1042 bus_dma_tag_t 1043 emu_gettag(struct emu_sc_info *sc) 1044 { 1045 return (sc->mem.dmat); 1046 } 1047 1048 static void 1049 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error) 1050 { 1051 bus_addr_t *phys = (bus_addr_t *) arg; 1052 1053 *phys = error ? 0 : (bus_addr_t) segs->ds_addr; 1054 1055 if (bootverbose) { 1056 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n", 1057 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1058 nseg, error); 1059 } 1060 } 1061 1062 static void * 1063 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, 1064 bus_dmamap_t *map) 1065 { 1066 void *dmabuf; 1067 int error; 1068 1069 *addr = 0; 1070 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) { 1071 if (mem->card->dbg_level > 2) 1072 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error); 1073 return (NULL); 1074 } 1075 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) { 1076 if (mem->card->dbg_level > 2) 1077 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error); 1078 bus_dmamem_free(mem->dmat, dmabuf, *map); 1079 return (NULL); 1080 } 1081 return (dmabuf); 1082 } 1083 1084 static void 1085 emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map) 1086 { 1087 bus_dmamap_unload(mem->dmat, map); 1088 bus_dmamem_free(mem->dmat, dmabuf, map); 1089 } 1090 1091 static void * 1092 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner) 1093 { 1094 uint32_t blksz, start, idx, ofs, tmp, found; 1095 struct emu_memblk *blk; 1096 void *membuf; 1097 1098 blksz = sz / EMUPAGESIZE; 1099 if (sz > (blksz * EMUPAGESIZE)) 1100 blksz++; 1101 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) { 1102 if (mem->card->dbg_level > 2) 1103 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n"); 1104 return (NULL); 1105 } 1106 /* find a free block in the bitmap */ 1107 found = 0; 1108 start = 1; 1109 while (!found && start + blksz < EMU_MAXPAGES) { 1110 found = 1; 1111 for (idx = start; idx < start + blksz; idx++) 1112 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1113 found = 0; 1114 if (!found) 1115 start++; 1116 } 1117 if (!found) { 1118 if (mem->card->dbg_level > 2) 1119 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n"); 1120 return (NULL); 1121 } 1122 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1123 if (blk == NULL) { 1124 if (mem->card->dbg_level > 2) 1125 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n"); 1126 return (NULL); 1127 } 1128 bzero(blk, sizeof(*blk)); 1129 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map); 1130 *addr = blk->buf_addr; 1131 if (membuf == NULL) { 1132 if (mem->card->dbg_level > 2) 1133 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n"); 1134 free(blk, M_DEVBUF); 1135 return (NULL); 1136 } 1137 blk->buf = membuf; 1138 blk->pte_start = start; 1139 blk->pte_size = blksz; 1140 strncpy(blk->owner, owner, 15); 1141 blk->owner[15] = '\0'; 1142 ofs = 0; 1143 for (idx = start; idx < start + blksz; idx++) { 1144 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1145 tmp = (uint32_t) (blk->buf_addr + ofs); 1146 mem->ptb_pages[idx] = (tmp << 1) | idx; 1147 ofs += EMUPAGESIZE; 1148 } 1149 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1150 return (membuf); 1151 } 1152 1153 static int 1154 emu_memfree(struct emu_mem *mem, void *membuf) 1155 { 1156 uint32_t idx, tmp; 1157 struct emu_memblk *blk, *i; 1158 1159 blk = NULL; 1160 SLIST_FOREACH(i, &mem->blocks, link) { 1161 if (i->buf == membuf) 1162 blk = i; 1163 } 1164 if (blk == NULL) 1165 return (EINVAL); 1166 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1167 emu_free(mem, membuf, blk->buf_map); 1168 tmp = (uint32_t) (mem->silent_page_addr) << 1; 1169 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1170 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1171 mem->ptb_pages[idx] = tmp | idx; 1172 } 1173 free(blk, M_DEVBUF); 1174 return (0); 1175 } 1176 1177 static int 1178 emu_memstart(struct emu_mem *mem, void *membuf) 1179 { 1180 struct emu_memblk *blk, *i; 1181 1182 blk = NULL; 1183 SLIST_FOREACH(i, &mem->blocks, link) { 1184 if (i->buf == membuf) 1185 blk = i; 1186 } 1187 if (blk == NULL) 1188 return (-1); 1189 return (blk->pte_start); 1190 } 1191 1192 1193 static uint32_t 1194 emu_rate_to_pitch(uint32_t rate) 1195 { 1196 static uint32_t logMagTable[128] = { 1197 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 1198 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 1199 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 1200 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 1201 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 1202 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 1203 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 1204 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 1205 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 1206 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 1207 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 1208 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 1209 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 1210 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 1211 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 1212 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 1213 }; 1214 static char logSlopeTable[128] = { 1215 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 1216 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 1217 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 1218 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 1219 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 1220 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 1221 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 1222 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 1223 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 1224 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 1225 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 1226 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 1227 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 1228 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 1229 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 1230 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 1231 }; 1232 int i; 1233 1234 if (rate == 0) 1235 return (0); 1236 rate *= 11185; /* Scale 48000 to 0x20002380 */ 1237 for (i = 31; i > 0; i--) { 1238 if (rate & 0x80000000) { /* Detect leading "1" */ 1239 return (((uint32_t) (i - 15) << 20) + 1240 logMagTable[0x7f & (rate >> 24)] + 1241 (0x7f & (rate >> 17)) * 1242 logSlopeTable[0x7f & (rate >> 24)]); 1243 } 1244 rate <<= 1; 1245 } 1246 /* NOTREACHED */ 1247 return (0); 1248 } 1249 1250 static uint32_t 1251 emu_rate_to_linearpitch(uint32_t rate) 1252 { 1253 rate = (rate << 8) / 375; 1254 return ((rate >> 1) + (rate & 1)); 1255 } 1256 1257 struct emu_voice * 1258 emu_valloc(struct emu_sc_info *sc) 1259 { 1260 struct emu_voice *v; 1261 int i; 1262 1263 v = NULL; 1264 mtx_lock(&sc->lock); 1265 for (i = 0; i < NUM_G && sc->voice[i].busy; i++); 1266 if (i < NUM_G) { 1267 v = &sc->voice[i]; 1268 v->busy = 1; 1269 } 1270 mtx_unlock(&sc->lock); 1271 return (v); 1272 } 1273 1274 void 1275 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v) 1276 { 1277 int i, r; 1278 1279 mtx_lock(&sc->lock); 1280 for (i = 0; i < NUM_G; i++) { 1281 if (v == &sc->voice[i] && sc->voice[i].busy) { 1282 v->busy = 0; 1283 /* 1284 * XXX What we should do with mono channels? 1285 * See -pcm.c emupchan_init for other side of 1286 * this problem 1287 */ 1288 if (v->slave != NULL) 1289 r = emu_memfree(&sc->mem, v->vbuf); 1290 } 1291 } 1292 mtx_unlock(&sc->lock); 1293 } 1294 1295 int 1296 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, 1297 uint32_t sz, struct snd_dbuf *b) 1298 { 1299 void *vbuf; 1300 bus_addr_t tmp_addr; 1301 1302 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit"); 1303 if (vbuf == NULL) { 1304 if(sc->dbg_level > 2) 1305 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n"); 1306 return (ENOMEM); 1307 } 1308 if (b != NULL) 1309 sndbuf_setup(b, vbuf, sz); 1310 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE; 1311 if (m->start < 0) { 1312 if(sc->dbg_level > 2) 1313 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n"); 1314 emu_memfree(&sc->mem, vbuf); 1315 return (ENOMEM); 1316 } 1317 m->end = m->start + sz; 1318 m->speed = 0; 1319 m->b16 = 0; 1320 m->stereo = 0; 1321 m->running = 0; 1322 m->ismaster = 1; 1323 m->vol = 0xff; 1324 m->buf = tmp_addr; 1325 m->vbuf = vbuf; 1326 m->slave = s; 1327 if (s != NULL) { 1328 s->start = m->start; 1329 s->end = m->end; 1330 s->speed = 0; 1331 s->b16 = 0; 1332 s->stereo = 0; 1333 s->running = 0; 1334 s->ismaster = 0; 1335 s->vol = m->vol; 1336 s->buf = m->buf; 1337 s->vbuf = NULL; 1338 s->slave = NULL; 1339 } 1340 return (0); 1341 } 1342 1343 void 1344 emu_vsetup(struct emu_voice *v, int fmt, int spd) 1345 { 1346 if (fmt) { 1347 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0; 1348 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0; 1349 if (v->slave != NULL) { 1350 v->slave->b16 = v->b16; 1351 v->slave->stereo = v->stereo; 1352 } 1353 } 1354 if (spd) { 1355 v->speed = spd; 1356 if (v->slave != NULL) 1357 v->slave->speed = v->speed; 1358 } 1359 } 1360 1361 void 1362 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) 1363 { 1364 int i; 1365 1366 for (i = 0; i < 8; i++) { 1367 v->routing[i] = rt->routing_left[i]; 1368 v->amounts[i] = rt->amounts_left[i]; 1369 } 1370 if ((v->stereo) && (v->ismaster == 0)) 1371 for (i = 0; i < 8; i++) { 1372 v->routing[i] = rt->routing_right[i]; 1373 v->amounts[i] = rt->amounts_right[i]; 1374 } 1375 1376 if ((v->stereo) && (v->slave != NULL)) 1377 emu_vroute(sc, rt, v->slave); 1378 } 1379 1380 void 1381 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v) 1382 { 1383 int s; 1384 uint32_t start, val, silent_page; 1385 1386 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 1387 1388 v->sa = v->start >> s; 1389 v->ea = v->end >> s; 1390 1391 1392 if (v->stereo) { 1393 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK); 1394 } else { 1395 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0); 1396 } 1397 val = v->stereo ? 28 : 30; 1398 val *= v->b16 ? 1 : 2; 1399 start = v->sa + val; 1400 1401 if (sc->is_emu10k1) { 1402 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) | 1403 (v->routing[2] << 8) | 1404 (v->routing[1] << 4) | 1405 (v->routing[0] << 0)) << 16); 1406 } else { 1407 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) | 1408 (v->routing[2] << 16) | 1409 (v->routing[1] << 8) | 1410 (v->routing[0] << 0)); 1411 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) | 1412 (v->routing[6] << 16) | 1413 (v->routing[5] << 8) | 1414 (v->routing[4] << 0)); 1415 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) | 1416 (v->amounts[6] << 26) | 1417 (v->amounts[5] << 8) | 1418 (v->amounts[4] << 0)); 1419 } 1420 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0)); 1421 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24)); 1422 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24)); 1423 1424 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); 1425 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); 1426 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); 1427 1428 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK; 1429 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); 1430 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); 1431 1432 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); 1433 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); 1434 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); 1435 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); 1436 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); 1437 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); 1438 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); 1439 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0); 1440 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0); 1441 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000); 1442 1443 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); 1444 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000); 1445 1446 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f); 1447 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0); 1448 if ((v->stereo) && (v->slave != NULL)) 1449 emu_vwrite(sc, v->slave); 1450 } 1451 1452 static void 1453 emu_vstop(struct emu_sc_info *sc, char channel, int enable) 1454 { 1455 int reg; 1456 1457 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL; 1458 channel &= 0x1f; 1459 reg |= 1 << 24; 1460 reg |= channel << 16; 1461 emu_wrptr(sc, 0, reg, enable); 1462 } 1463 1464 void 1465 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go) 1466 { 1467 uint32_t pitch_target, initial_pitch; 1468 uint32_t cra, cs, ccis; 1469 uint32_t sample, i; 1470 1471 if (go) { 1472 cra = 64; 1473 cs = v->stereo ? 4 : 2; 1474 ccis = v->stereo ? 28 : 30; 1475 ccis *= v->b16 ? 1 : 2; 1476 sample = v->b16 ? 0x00000000 : 0x80808080; 1477 for (i = 0; i < cs; i++) 1478 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample); 1479 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0); 1480 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra); 1481 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis); 1482 1483 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00); 1484 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff); 1485 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff); 1486 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f); 1487 emu_vstop(sc, v->vnum, 0); 1488 1489 pitch_target = emu_rate_to_linearpitch(v->speed); 1490 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 1491 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target); 1492 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target); 1493 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch); 1494 } else { 1495 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0); 1496 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0); 1497 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff); 1498 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff); 1499 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff); 1500 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0); 1501 emu_vstop(sc, v->vnum, 1); 1502 } 1503 if ((v->stereo) && (v->slave != NULL)) 1504 emu_vtrigger(sc, v->slave, go); 1505 } 1506 1507 int 1508 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v) 1509 { 1510 int s, ptr; 1511 1512 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 1513 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; 1514 return (ptr & ~0x0000001f); 1515 } 1516 1517 1518 /* fx */ 1519 static void 1520 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data) 1521 { 1522 emu_wrptr(sc, 0, sc->code_base + pc, data); 1523 } 1524 1525 1526 static void 1527 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc) 1528 { 1529 if ((*pc) + 1 > sc->code_size) { 1530 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc)); 1531 return; 1532 } 1533 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y); 1534 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); 1535 (*pc)++; 1536 } 1537 1538 static int 1539 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS) 1540 { 1541 struct emu_sc_info *sc; 1542 int mixer_id; 1543 int new_vol; 1544 int err; 1545 1546 sc = arg1; 1547 mixer_id = arg2; 1548 1549 new_vol = emumix_get_volume(sc, mixer_id); 1550 err = sysctl_handle_int(oidp, &new_vol, 0, req); 1551 1552 if (err || req->newptr == NULL) 1553 return (err); 1554 if (new_vol < 0 || new_vol > 100) 1555 return (EINVAL); 1556 emumix_set_volume(sc, mixer_id, new_vol); 1557 1558 return (0); 1559 } 1560 1561 static int 1562 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume) 1563 { 1564 int volgpr; 1565 char sysctl_name[32]; 1566 1567 volgpr = emu_rm_gpr_alloc(sc->rm, 1); 1568 emumix_set_fxvol(sc, volgpr, defvolume); 1569 /* 1570 * Mixer controls with NULL mix_name are handled 1571 * by AC97 emulation code or PCM mixer. 1572 */ 1573 if (mix_name != NULL) { 1574 /* 1575 * Temporary sysctls should start with underscore, 1576 * see freebsd-current mailing list, emu10kx driver 1577 * discussion around 2006-05-24. 1578 */ 1579 snprintf(sysctl_name, 32, "_%s", mix_name); 1580 SYSCTL_ADD_PROC(sc->ctx, 1581 SYSCTL_CHILDREN(sc->root), 1582 OID_AUTO, sysctl_name, 1583 CTLTYPE_INT | CTLFLAG_RW, sc, mix_id, 1584 sysctl_emu_mixer_control, "I", ""); 1585 } 1586 1587 return (volgpr); 1588 } 1589 1590 static int 1591 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS) 1592 { 1593 struct emu_sc_info *sc; 1594 int new_val; 1595 int err; 1596 1597 sc = arg1; 1598 1599 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0; 1600 err = sysctl_handle_int(oidp, &new_val, 0, req); 1601 1602 if (err || req->newptr == NULL) 1603 return (err); 1604 if (new_val < 0 || new_val > 1) 1605 return (EINVAL); 1606 1607 switch (new_val) { 1608 case 0: 1609 emumix_set_mode(sc, MODE_ANALOG); 1610 break; 1611 case 1: 1612 emumix_set_mode(sc, MODE_DIGITAL); 1613 break; 1614 } 1615 return (0); 1616 } 1617 1618 static void 1619 emu_digitalswitch(struct emu_sc_info *sc) 1620 { 1621 /* XXX temporary? */ 1622 SYSCTL_ADD_PROC(sc->ctx, 1623 SYSCTL_CHILDREN(sc->root), 1624 OID_AUTO, "_digital", 1625 CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1626 sysctl_emu_digitalswitch_control, "I", "Enable digital output"); 1627 1628 return; 1629 } 1630 1631 /* 1632 * Allocate cache GPRs that will hold mixed output channels 1633 * and clear it on every DSP run. 1634 */ 1635 #define EFX_CACHE(CACHE_IDX) do { \ 1636 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ 1637 emu_addefxop(sc, ACC3, \ 1638 GPR(sc->cache_gpr[CACHE_IDX]), \ 1639 DSP_CONST(0), \ 1640 DSP_CONST(0), \ 1641 DSP_CONST(0), \ 1642 &pc); \ 1643 } while (0) 1644 1645 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */ 1646 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \ 1647 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \ 1648 sc->mixer_volcache[IN_GPR_IDX] = DEF; \ 1649 emu_addefxop(sc, MACS, \ 1650 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1651 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1652 INP_NR, \ 1653 GPR(sc->mixer_gpr[IN_GPR_IDX]), \ 1654 &pc); \ 1655 } while (0) 1656 1657 /* allocate GPR, OUT = IN * VOL */ 1658 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \ 1659 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \ 1660 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ 1661 emu_addefxop(sc, MACS, \ 1662 OUTP(OUTP_NR), \ 1663 DSP_CONST(0), \ 1664 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1665 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1666 &pc); \ 1667 } while (0) 1668 1669 /* like EFX_OUTPUT, but don't allocate mixer gpr */ 1670 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \ 1671 emu_addefxop(sc, MACS, \ 1672 OUTP(OUTP_NR), \ 1673 DSP_CONST(0), \ 1674 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1675 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1676 &pc); \ 1677 } while (0) 1678 1679 /* skip next OPCOUNT instructions if FLAG != 0 */ 1680 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \ 1681 emu_addefxop(sc, MACS, \ 1682 DSP_CONST(0), \ 1683 GPR(sc->mute_gpr[FLAG_GPR]), \ 1684 DSP_CONST(0), \ 1685 DSP_CONST(0), \ 1686 &pc); \ 1687 emu_addefxop(sc, SKIP, \ 1688 DSP_CCR, \ 1689 DSP_CCR, \ 1690 COND_NEQ_ZERO, \ 1691 OPCOUNT, \ 1692 &pc); \ 1693 } while (0) 1694 1695 #define EFX_COPY(TO, FROM) do { \ 1696 emu_addefxop(sc, ACC3, \ 1697 TO, \ 1698 DSP_CONST(0), \ 1699 DSP_CONST(0), \ 1700 FROM, \ 1701 &pc); \ 1702 } while (0) 1703 1704 1705 static void 1706 emu_initefx(struct emu_sc_info *sc) 1707 { 1708 unsigned int i; 1709 uint32_t pc; 1710 1711 /* stop DSP */ 1712 if (sc->is_emu10k1) { 1713 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP); 1714 } else { 1715 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP); 1716 } 1717 1718 /* code size is in instructions */ 1719 pc = 0; 1720 for (i = 0; i < sc->code_size; i++) { 1721 if (sc->is_emu10k1) { 1722 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc); 1723 } else { 1724 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc); 1725 } 1726 } 1727 1728 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */ 1729 for (i = 0; i < NUM_MUTE; i++) { 1730 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1); 1731 emumix_set_gpr(sc, sc->mute_gpr[i], 1); 1732 } 1733 emu_digitalswitch(sc); 1734 1735 pc = 0; 1736 1737 /* 1738 * DSP code below is not good, because: 1739 * 1. It can be written smaller, if it can use DSP accumulator register 1740 * instead of cache_gpr[]. 1741 * 2. It can be more careful when volume is 100%, because in DSP 1742 * x*0x7fffffff may not be equal to x ! 1743 */ 1744 1745 /* clean outputs */ 1746 for (i = 0; i < 16 ; i++) { 1747 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); 1748 } 1749 1750 1751 if (sc->is_emu10k1) { 1752 EFX_CACHE(C_FRONT_L); 1753 EFX_CACHE(C_FRONT_R); 1754 EFX_CACHE(C_REC_L); 1755 EFX_CACHE(C_REC_R); 1756 1757 /* fx0 to front/record, 100%/muted by default */ 1758 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1759 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1760 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1761 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1762 1763 /* in0, from AC97 codec output */ 1764 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0); 1765 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0); 1766 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1767 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1768 1769 /* in1, from CD S/PDIF */ 1770 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */ 1771 EFX_SKIP(4, CDSPDIFMUTE); 1772 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1773 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1774 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1775 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1776 1777 if (sc->dbg_level > 0) { 1778 /* in2, ZoomVide (???) */ 1779 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1780 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1781 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0); 1782 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0); 1783 } 1784 1785 /* in3, TOSLink */ 1786 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0); 1787 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0); 1788 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0); 1789 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0); 1790 /* in4, LineIn */ 1791 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1792 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1793 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0); 1794 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0); 1795 1796 /* in5, on-card S/PDIF */ 1797 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1798 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1799 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1800 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1801 1802 /* in6, Line2 on Live!Drive */ 1803 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1804 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1805 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0); 1806 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0); 1807 1808 if (sc->dbg_level > 0) { 1809 /* in7, unknown */ 1810 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 1811 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 1812 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 1813 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 1814 } 1815 1816 /* analog and digital */ 1817 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100); 1818 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100); 1819 /* S/PDIF */ 1820 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L); 1821 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R); 1822 /* Headphones */ 1823 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L); 1824 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R); 1825 1826 /* rec output to "ADC" */ 1827 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100); 1828 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100); 1829 1830 if (!(sc->mch_disabled)) { 1831 /* 1832 * Additional channel volume is controlled by mixer in 1833 * emu_dspmixer_set() in -pcm.c 1834 */ 1835 1836 /* fx2/3 (pcm1) to rear */ 1837 EFX_CACHE(C_REAR_L); 1838 EFX_CACHE(C_REAR_R); 1839 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 1840 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 1841 1842 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100); 1843 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100); 1844 if (sc->has_51) { 1845 /* fx4 (pcm2) to center */ 1846 EFX_CACHE(C_CENTER); 1847 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 1848 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1849 1850 /* XXX in digital mode (default) this should be muted because 1851 this output is shared with digital out */ 1852 EFX_SKIP(1, ANALOGMUTE); 1853 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1854 1855 /* fx5 (pcm3) to sub */ 1856 EFX_CACHE(C_SUB); 1857 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 1858 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1859 1860 /* XXX in digital mode (default) this should be muted because 1861 this output is shared with digital out */ 1862 EFX_SKIP(1, ANALOGMUTE); 1863 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1864 1865 } 1866 } else { 1867 /* SND_EMU10KX_MULTICHANNEL_DISABLED */ 1868 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */ 1869 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */ 1870 1871 #if 0 1872 /* XXX 5.1 does not work */ 1873 1874 if (sc->has_51) { 1875 /* (fx0+fx1)/2 to center */ 1876 EFX_CACHE(C_CENTER); 1877 emu_addefxop(sc, MACS, 1878 GPR(sc->cache_gpr[C_CENTER]), 1879 GPR(sc->cache_gpr[C_CENTER]), 1880 DSP_CONST(0xd), /* = 1/2 */ 1881 GPR(sc->cache_gpr[C_FRONT_L]), 1882 &pc); 1883 emu_addefxop(sc, MACS, 1884 GPR(sc->cache_gpr[C_CENTER]), 1885 GPR(sc->cache_gpr[C_CENTER]), 1886 DSP_CONST(0xd), /* = 1/2 */ 1887 GPR(sc->cache_gpr[C_FRONT_R]), 1888 &pc); 1889 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1890 1891 /* XXX in digital mode (default) this should be muted because 1892 this output is shared with digital out */ 1893 EFX_SKIP(1, ANALOGMUTE); 1894 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1895 1896 /* (fx0+fx1)/2 to sub */ 1897 EFX_CACHE(C_SUB); 1898 emu_addefxop(sc, MACS, 1899 GPR(sc->cache_gpr[C_CENTER]), 1900 GPR(sc->cache_gpr[C_CENTER]), 1901 DSP_CONST(0xd), /* = 1/2 */ 1902 GPR(sc->cache_gpr[C_FRONT_L]), 1903 &pc); 1904 emu_addefxop(sc, MACS, 1905 GPR(sc->cache_gpr[C_CENTER]), 1906 GPR(sc->cache_gpr[C_CENTER]), 1907 DSP_CONST(0xd), /* = 1/2 */ 1908 GPR(sc->cache_gpr[C_FRONT_R]), 1909 &pc); 1910 /* XXX add lowpass filter here */ 1911 1912 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1913 1914 /* XXX in digital mode (default) this should be muted because 1915 this output is shared with digital out */ 1916 EFX_SKIP(1, ANALOGMUTE); 1917 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1918 } 1919 #endif 1920 } /* !mch_disabled */ 1921 if (sc->mch_rec) { 1922 /* 1923 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots 1924 * are used as outputs and already filled with data 1925 */ 1926 /* 1927 * XXX On Live! cards stream does not begin at zero offset. 1928 * It can be HW, driver or sound buffering problem. 1929 * Use sync substream (offset 0x3E) to let userland find 1930 * correct data. 1931 */ 1932 1933 /* 1934 * Substream map (in byte offsets, each substream is 2 bytes): 1935 * 0x00..0x1E - outputs 1936 * 0x20..0x3E - FX, inputs and sync stream 1937 */ 1938 1939 /* First 2 channels (offset 0x20,0x22) are empty */ 1940 for(i = (sc->has_51 ? 2 : 0); i < 2; i++) 1941 EFX_COPY(FX2(i), DSP_CONST(0)); 1942 1943 /* PCM Playback monitoring, offset 0x24..0x2A */ 1944 for(i = 0; i < 4; i++) 1945 EFX_COPY(FX2(i+2), FX(i)); 1946 1947 /* Copy of some inputs, offset 0x2C..0x3C */ 1948 for(i = 0; i < 9; i++) 1949 EFX_COPY(FX2(i+8), INP(i)); 1950 1951 /* sync data (0xc0de, offset 0x3E) */ 1952 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 1953 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 1954 1955 EFX_COPY(FX2(15), GPR(sc->dummy_gpr)); 1956 } /* mch_rec */ 1957 } else /* emu10k2 and later */ { 1958 EFX_CACHE(C_FRONT_L); 1959 EFX_CACHE(C_FRONT_R); 1960 EFX_CACHE(C_REC_L); 1961 EFX_CACHE(C_REC_R); 1962 1963 /* fx0 to front/record, 100%/muted by default */ 1964 /* 1965 * FRONT_[L|R] is controlled by AC97 emulation in 1966 * emu_ac97_[read|write]_emulation in -pcm.c 1967 */ 1968 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1969 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1970 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1971 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1972 1973 /* in0, from AC97 codec output */ 1974 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100); 1975 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100); 1976 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1977 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1978 1979 /* in1, from CD S/PDIF */ 1980 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1981 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1982 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1983 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1984 1985 /* in2, optical & coax S/PDIF on AudigyDrive*/ 1986 /* XXX Should be muted when GPRSCS valid stream == 0 */ 1987 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1988 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1989 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0); 1990 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0); 1991 1992 if (sc->dbg_level > 0) { 1993 /* in3, unknown */ 1994 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0); 1995 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0); 1996 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0); 1997 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0); 1998 } 1999 2000 /* in4, LineIn 2 on AudigyDrive */ 2001 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0); 2002 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0); 2003 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0); 2004 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0); 2005 2006 /* in5, on-card S/PDIF */ 2007 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 2008 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 2009 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 2010 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 2011 2012 /* in6, AUX2 on AudigyDrive */ 2013 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 2014 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 2015 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0); 2016 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0); 2017 2018 if (sc->dbg_level > 0) { 2019 /* in7, unknown */ 2020 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 2021 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 2022 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 2023 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 2024 } 2025 2026 /* front output to headphones and alog and digital *front */ 2027 /* volume controlled by AC97 emulation */ 2028 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100); 2029 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100); 2030 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L); 2031 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R); 2032 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L); 2033 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R); 2034 2035 /* rec output to "ADC" */ 2036 /* volume controlled by AC97 emulation */ 2037 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100); 2038 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100); 2039 2040 if (!(sc->mch_disabled)) { 2041 /* 2042 * Additional channel volume is controlled by mixer in 2043 * emu_dspmixer_set() in -pcm.c 2044 */ 2045 2046 /* fx2/3 (pcm1) to rear */ 2047 EFX_CACHE(C_REAR_L); 2048 EFX_CACHE(C_REAR_R); 2049 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 2050 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 2051 2052 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100); 2053 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100); 2054 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L); 2055 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R); 2056 2057 /* fx4 (pcm2) to center */ 2058 EFX_CACHE(C_CENTER); 2059 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 2060 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2061 #if 0 2062 /* 2063 * XXX in digital mode (default) this should be muted 2064 * because this output is shared with digital out 2065 */ 2066 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2067 #endif 2068 /* fx5 (pcm3) to sub */ 2069 EFX_CACHE(C_SUB); 2070 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 2071 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2072 #if 0 2073 /* 2074 * XXX in digital mode (default) this should be muted 2075 * because this output is shared with digital out 2076 */ 2077 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2078 #endif 2079 if (sc->has_71) { 2080 /* XXX this will broke headphones on AudigyDrive */ 2081 /* fx6/7 (pcm4) to side */ 2082 EFX_CACHE(C_SIDE_L); 2083 EFX_CACHE(C_SIDE_R); 2084 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100); 2085 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100); 2086 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100); 2087 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100); 2088 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L); 2089 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R); 2090 } 2091 } else { /* mch_disabled */ 2092 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L); 2093 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R); 2094 2095 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L); 2096 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R); 2097 2098 if (sc->has_51) { 2099 /* (fx0+fx1)/2 to center */ 2100 EFX_CACHE(C_CENTER); 2101 emu_addefxop(sc, MACS, 2102 GPR(sc->cache_gpr[C_CENTER]), 2103 GPR(sc->cache_gpr[C_CENTER]), 2104 DSP_CONST(0xd), /* = 1/2 */ 2105 GPR(sc->cache_gpr[C_FRONT_L]), 2106 &pc); 2107 emu_addefxop(sc, MACS, 2108 GPR(sc->cache_gpr[C_CENTER]), 2109 GPR(sc->cache_gpr[C_CENTER]), 2110 DSP_CONST(0xd), /* = 1/2 */ 2111 GPR(sc->cache_gpr[C_FRONT_R]), 2112 &pc); 2113 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2114 2115 /* XXX in digital mode (default) this should be muted because 2116 this output is shared with digital out */ 2117 EFX_SKIP(1, ANALOGMUTE); 2118 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2119 2120 /* (fx0+fx1)/2 to sub */ 2121 EFX_CACHE(C_SUB); 2122 emu_addefxop(sc, MACS, 2123 GPR(sc->cache_gpr[C_SUB]), 2124 GPR(sc->cache_gpr[C_SUB]), 2125 DSP_CONST(0xd), /* = 1/2 */ 2126 GPR(sc->cache_gpr[C_FRONT_L]), 2127 &pc); 2128 emu_addefxop(sc, MACS, 2129 GPR(sc->cache_gpr[C_SUB]), 2130 GPR(sc->cache_gpr[C_SUB]), 2131 DSP_CONST(0xd), /* = 1/2 */ 2132 GPR(sc->cache_gpr[C_FRONT_R]), 2133 &pc); 2134 /* XXX add lowpass filter here */ 2135 2136 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2137 2138 /* XXX in digital mode (default) this should be muted because 2139 this output is shared with digital out */ 2140 EFX_SKIP(1, ANALOGMUTE); 2141 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2142 } 2143 } /* mch_disabled */ 2144 if (sc->mch_rec) { 2145 /* MCH RECORDING, high 32 slots */ 2146 2147 /* 2148 * Stream map (in byte offsets): 2149 * 0x00..0x3E - outputs 2150 * 0x40..0x7E - FX, inputs 2151 * each substream is 2 bytes. 2152 */ 2153 /* 2154 * XXX Audigy 2 Value cards (and, possibly, 2155 * Audigy 4) write some unknown data in place of 2156 * some outputs (offsets 0x20..0x3F) and one 2157 * input (offset 0x7E). 2158 */ 2159 2160 /* PCM Playback monitoring, offsets 0x40..0x5E */ 2161 for(i = 0; i < 16; i++) 2162 EFX_COPY(FX2(i), FX(i)); 2163 2164 /* Copy of all inputs, offsets 0x60..0x7E */ 2165 for(i = 0; i < 16; i++) 2166 EFX_COPY(FX2(i+16), INP(i)); 2167 #if 0 2168 /* XXX Audigy seems to work correct and does not need this */ 2169 /* sync data (0xc0de), offset 0x7E */ 2170 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 2171 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 2172 EFX_COPY(FX2(31), GPR(sc->dummy_gpr)); 2173 #endif 2174 } /* mch_rec */ 2175 } 2176 2177 sc->routing_code_end = pc; 2178 2179 /* start DSP */ 2180 if (sc->is_emu10k1) { 2181 emu_wrptr(sc, 0, EMU_DBG, 0); 2182 } else { 2183 emu_wrptr(sc, 0, EMU_A_DBG, 0); 2184 } 2185 } 2186 2187 /* /dev/em10kx */ 2188 static d_open_t emu10kx_open; 2189 static d_close_t emu10kx_close; 2190 static d_read_t emu10kx_read; 2191 2192 static struct cdevsw emu10kx_cdevsw = { 2193 .d_open = emu10kx_open, 2194 .d_close = emu10kx_close, 2195 .d_read = emu10kx_read, 2196 .d_name = "emu10kx", 2197 .d_version = D_VERSION, 2198 }; 2199 2200 2201 static int 2202 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2203 { 2204 int error; 2205 struct emu_sc_info *sc; 2206 2207 sc = i_dev->si_drv1; 2208 mtx_lock(&sc->emu10kx_lock); 2209 if (sc->emu10kx_isopen) { 2210 mtx_unlock(&sc->emu10kx_lock); 2211 return (EBUSY); 2212 } 2213 sc->emu10kx_isopen = 1; 2214 mtx_unlock(&sc->emu10kx_lock); 2215 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) { 2216 error = ENXIO; 2217 goto out; 2218 } 2219 sc->emu10kx_bufptr = 0; 2220 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM; 2221 out: 2222 if (error) { 2223 mtx_lock(&sc->emu10kx_lock); 2224 sc->emu10kx_isopen = 0; 2225 mtx_unlock(&sc->emu10kx_lock); 2226 } 2227 return (error); 2228 } 2229 2230 static int 2231 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2232 { 2233 struct emu_sc_info *sc; 2234 2235 sc = i_dev->si_drv1; 2236 2237 mtx_lock(&sc->emu10kx_lock); 2238 if (!(sc->emu10kx_isopen)) { 2239 mtx_unlock(&sc->emu10kx_lock); 2240 return (EBADF); 2241 } 2242 sbuf_delete(&sc->emu10kx_sbuf); 2243 sc->emu10kx_isopen = 0; 2244 mtx_unlock(&sc->emu10kx_lock); 2245 2246 return (0); 2247 } 2248 2249 static int 2250 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused) 2251 { 2252 int l, err; 2253 struct emu_sc_info *sc; 2254 2255 sc = i_dev->si_drv1; 2256 mtx_lock(&sc->emu10kx_lock); 2257 if (!(sc->emu10kx_isopen)) { 2258 mtx_unlock(&sc->emu10kx_lock); 2259 return (EBADF); 2260 } 2261 mtx_unlock(&sc->emu10kx_lock); 2262 2263 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); 2264 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0; 2265 sc->emu10kx_bufptr += l; 2266 2267 return (err); 2268 } 2269 2270 static int 2271 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s) 2272 { 2273 int i; 2274 2275 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n"); 2276 sbuf_printf(s, "\nHardware resource usage:\n"); 2277 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs); 2278 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size); 2279 sbuf_printf(s, "Card supports"); 2280 if (sc->has_ac97) { 2281 sbuf_printf(s, " AC97 codec"); 2282 } else { 2283 sbuf_printf(s, " NO AC97 codec"); 2284 } 2285 if (sc->has_51) { 2286 if (sc->has_71) 2287 sbuf_printf(s, " and 7.1 output"); 2288 else 2289 sbuf_printf(s, " and 5.1 output"); 2290 } 2291 if (sc->is_emu10k1) 2292 sbuf_printf(s, ", SBLive! DSP code"); 2293 if (sc->is_emu10k2) 2294 sbuf_printf(s, ", Audigy DSP code"); 2295 if (sc->is_ca0102) 2296 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks"); 2297 if (sc->is_ca0108) 2298 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks"); 2299 sbuf_printf(s, "\n"); 2300 if (sc->broken_digital) 2301 sbuf_printf(s, "Digital mode unsupported\n"); 2302 sbuf_printf(s, "\nInstalled devices:\n"); 2303 for (i = 0; i < RT_COUNT; i++) 2304 if (sc->pcm[i] != NULL) 2305 if (device_is_attached(sc->pcm[i])) { 2306 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i])); 2307 } 2308 if (sc->midi[0] != NULL) 2309 if (device_is_attached(sc->midi[0])) { 2310 sbuf_printf(s, "EMU10Kx MIDI Interface\n"); 2311 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0])); 2312 } 2313 if (sc->midi[1] != NULL) 2314 if (device_is_attached(sc->midi[1])) { 2315 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1])); 2316 } 2317 if (sc->midi[0] != NULL) 2318 if (device_is_attached(sc->midi[0])) { 2319 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled"); 2320 } 2321 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital"); 2322 2323 sbuf_finish(s); 2324 return (sbuf_len(s)); 2325 } 2326 2327 /* INIT & UNINIT */ 2328 static int 2329 emu10kx_dev_init(struct emu_sc_info *sc) 2330 { 2331 int unit; 2332 2333 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0); 2334 unit = device_get_unit(sc->dev); 2335 2336 sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit); 2337 if (sc->cdev != NULL) { 2338 sc->cdev->si_drv1 = sc; 2339 return (0); 2340 } 2341 return (ENXIO); 2342 } 2343 2344 static int 2345 emu10kx_dev_uninit(struct emu_sc_info *sc) 2346 { 2347 mtx_lock(&sc->emu10kx_lock); 2348 if (sc->emu10kx_isopen) { 2349 mtx_unlock(&sc->emu10kx_lock); 2350 return (EBUSY); 2351 } 2352 if (sc->cdev) 2353 destroy_dev(sc->cdev); 2354 sc->cdev = 0; 2355 2356 mtx_destroy(&sc->emu10kx_lock); 2357 return (0); 2358 } 2359 2360 /* resource manager */ 2361 int 2362 emu_rm_init(struct emu_sc_info *sc) 2363 { 2364 int i; 2365 int maxcount; 2366 struct emu_rm *rm; 2367 2368 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO); 2369 if (rm == NULL) { 2370 return (ENOMEM); 2371 } 2372 sc->rm = rm; 2373 rm->card = sc; 2374 maxcount = sc->num_gprs; 2375 rm->num_used = 0; 2376 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF); 2377 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR); 2378 for (i = 0; i < rm->num_gprs; i++) 2379 rm->allocmap[i] = 0; 2380 /* pre-allocate gpr[0] */ 2381 rm->allocmap[0] = 1; 2382 rm->last_free_gpr = 1; 2383 2384 return (0); 2385 } 2386 2387 int 2388 emu_rm_uninit(struct emu_sc_info *sc) 2389 { 2390 int i; 2391 2392 if (sc->dbg_level > 1) { 2393 mtx_lock(&(sc->rm->gpr_lock)); 2394 for (i = 1; i < sc->rm->last_free_gpr; i++) 2395 if (sc->rm->allocmap[i] > 0) 2396 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i); 2397 mtx_unlock(&(sc->rm->gpr_lock)); 2398 } 2399 2400 mtx_destroy(&(sc->rm->gpr_lock)); 2401 free(sc->rm, M_DEVBUF); 2402 return (0); 2403 } 2404 2405 static int 2406 emu_rm_gpr_alloc(struct emu_rm *rm, int count) 2407 { 2408 int i, j; 2409 int allocated_gpr; 2410 2411 allocated_gpr = rm->num_gprs; 2412 /* try fast way first */ 2413 mtx_lock(&(rm->gpr_lock)); 2414 if (rm->last_free_gpr + count <= rm->num_gprs) { 2415 allocated_gpr = rm->last_free_gpr; 2416 rm->last_free_gpr += count; 2417 rm->allocmap[allocated_gpr] = count; 2418 for (i = 1; i < count; i++) 2419 rm->allocmap[allocated_gpr + i] = -(count - i); 2420 } else { 2421 /* longer */ 2422 i = 0; 2423 allocated_gpr = rm->num_gprs; 2424 while (i < rm->last_free_gpr - count) { 2425 if (rm->allocmap[i] > 0) { 2426 i += rm->allocmap[i]; 2427 } else { 2428 allocated_gpr = i; 2429 for (j = 1; j < count; j++) { 2430 if (rm->allocmap[i + j] != 0) 2431 allocated_gpr = rm->num_gprs; 2432 } 2433 if (allocated_gpr == i) 2434 break; 2435 } 2436 } 2437 if (allocated_gpr + count < rm->last_free_gpr) { 2438 rm->allocmap[allocated_gpr] = count; 2439 for (i = 1; i < count; i++) 2440 rm->allocmap[allocated_gpr + i] = -(count - i); 2441 2442 } 2443 } 2444 if (allocated_gpr == rm->num_gprs) 2445 allocated_gpr = (-1); 2446 if (allocated_gpr >= 0) 2447 rm->num_used += count; 2448 mtx_unlock(&(rm->gpr_lock)); 2449 return (allocated_gpr); 2450 } 2451 2452 /* mixer */ 2453 void 2454 emumix_set_mode(struct emu_sc_info *sc, int mode) 2455 { 2456 uint32_t a_iocfg; 2457 uint32_t hcfg; 2458 uint32_t tmp; 2459 2460 switch (mode) { 2461 case MODE_DIGITAL: 2462 /* FALLTHROUGH */ 2463 case MODE_ANALOG: 2464 break; 2465 default: 2466 return; 2467 } 2468 2469 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 2470 a_iocfg = 0; 2471 2472 if (sc->rev >= 6) 2473 hcfg |= EMU_HCFG_JOYENABLE; 2474 2475 if (sc->is_emu10k1) 2476 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 2477 else 2478 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE; 2479 2480 2481 if (mode == MODE_DIGITAL) { 2482 if (sc->broken_digital) { 2483 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n"); 2484 } 2485 a_iocfg |= EMU_A_IOCFG_GPOUT1; 2486 hcfg |= EMU_HCFG_GPOUT0; 2487 } 2488 2489 if (mode == MODE_ANALOG) 2490 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2491 2492 if (sc->is_emu10k2) 2493 a_iocfg |= 0x80; /* XXX */ 2494 2495 if ((sc->is_ca0102) || (sc->is_ca0108)) 2496 /* 2497 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things 2498 * on diffrerent cards. 2499 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108) 2500 * "disable analog outs" on Audigy (emu10k2) 2501 */ 2502 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG; 2503 2504 if (sc->is_ca0108) 2505 a_iocfg |= 0x20; /* XXX */ 2506 2507 /* Mute analog center & subwoofer before mode change */ 2508 if (mode == MODE_DIGITAL) 2509 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1); 2510 2511 emu_wr(sc, EMU_HCFG, hcfg, 4); 2512 2513 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2514 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2515 tmp = a_iocfg; 2516 emu_wr(sc, EMU_A_IOCFG, tmp, 2); 2517 } 2518 2519 /* Unmute if we have changed mode to analog. */ 2520 2521 if (mode == MODE_ANALOG) 2522 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0); 2523 2524 sc->mode = mode; 2525 } 2526 2527 void 2528 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode) 2529 { 2530 uint32_t spcs; 2531 2532 switch (mode) { 2533 case SPDIF_MODE_PCM: 2534 break; 2535 case SPDIF_MODE_AC3: 2536 device_printf(sc->dev, "AC3 mode does not work and disabled\n"); 2537 return; 2538 default: 2539 return; 2540 } 2541 2542 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 | 2543 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC | 2544 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 2545 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT; 2546 2547 mode = SPDIF_MODE_PCM; 2548 2549 emu_wrptr(sc, 0, EMU_SPCS0, spcs); 2550 emu_wrptr(sc, 0, EMU_SPCS1, spcs); 2551 emu_wrptr(sc, 0, EMU_SPCS2, spcs); 2552 } 2553 2554 #define L2L_POINTS 10 2555 2556 static int l2l_df[L2L_POINTS] = { 2557 0x572C5CA, /* 100..90 */ 2558 0x3211625, /* 90..80 */ 2559 0x1CC1A76, /* 80..70 */ 2560 0x108428F, /* 70..60 */ 2561 0x097C70A, /* 60..50 */ 2562 0x0572C5C, /* 50..40 */ 2563 0x0321162, /* 40..30 */ 2564 0x01CC1A7, /* 30..20 */ 2565 0x0108428, /* 20..10 */ 2566 0x016493D /* 10..0 */ 2567 }; 2568 2569 static int l2l_f[L2L_POINTS] = { 2570 0x4984461A, /* 90 */ 2571 0x2A3968A7, /* 80 */ 2572 0x18406003, /* 70 */ 2573 0x0DEDC66D, /* 60 */ 2574 0x07FFFFFF, /* 50 */ 2575 0x04984461, /* 40 */ 2576 0x02A3968A, /* 30 */ 2577 0x01840600, /* 20 */ 2578 0x00DEDC66, /* 10 */ 2579 0x00000000 /* 0 */ 2580 }; 2581 2582 2583 static int 2584 log2lin(int log_t) 2585 { 2586 int lin_t; 2587 int idx, lin; 2588 2589 if (log_t <= 0) { 2590 lin_t = 0x00000000; 2591 return (lin_t); 2592 } 2593 2594 if (log_t >= 100) { 2595 lin_t = 0x7fffffff; 2596 return (lin_t); 2597 } 2598 2599 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS); 2600 lin = log_t % (L2L_POINTS); 2601 lin_t = l2l_df[idx] * lin + l2l_f[idx]; 2602 return (lin_t); 2603 } 2604 2605 2606 void 2607 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol) 2608 { 2609 2610 vol = log2lin(vol); 2611 emumix_set_gpr(sc, gpr, vol); 2612 } 2613 2614 void 2615 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val) 2616 { 2617 if (sc->dbg_level > 1) 2618 if (gpr == 0) { 2619 device_printf(sc->dev, "Zero gpr write access\n"); 2620 #ifdef KDB 2621 kdb_backtrace(); 2622 #endif 2623 return; 2624 } 2625 2626 emu_wrptr(sc, 0, GPR(gpr), val); 2627 } 2628 2629 void 2630 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume) 2631 { 2632 2633 RANGE(volume, 0, 100); 2634 if (mixer_idx < NUM_MIXERS) { 2635 sc->mixer_volcache[mixer_idx] = volume; 2636 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume); 2637 } 2638 } 2639 2640 int 2641 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx) 2642 { 2643 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0)) 2644 return (sc->mixer_volcache[mixer_idx]); 2645 return (-1); 2646 } 2647 2648 /* Init CardBus part */ 2649 static int 2650 emu_cardbus_init(struct emu_sc_info *sc) 2651 { 2652 2653 /* 2654 * XXX May not need this if we have EMU_IPR3 handler. 2655 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments? 2656 * Looks much like "(data << 16) | register". 2657 */ 2658 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000); 2659 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001); 2660 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f); 2661 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f); 2662 2663 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f); 2664 2665 return (0); 2666 } 2667 2668 /* Probe and attach the card */ 2669 static int 2670 emu_init(struct emu_sc_info *sc) 2671 { 2672 uint32_t ch, tmp; 2673 uint32_t spdif_sr; 2674 uint32_t ac97slot; 2675 int def_mode; 2676 int i; 2677 2678 /* disable audio and lock cache */ 2679 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2680 2681 /* reset recording buffers */ 2682 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2683 emu_wrptr(sc, 0, EMU_MICBA, 0); 2684 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2685 emu_wrptr(sc, 0, EMU_FXBA, 0); 2686 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2687 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2688 2689 /* disable channel interrupt */ 2690 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4); 2691 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2692 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2693 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2694 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2695 2696 /* disable P16V and S/PDIF interrupts */ 2697 if ((sc->is_ca0102) || (sc->is_ca0108)) 2698 emu_wr(sc, EMU_INTE2, 0, 4); 2699 2700 if (sc->is_ca0102) 2701 emu_wr(sc, EMU_INTE3, 0, 4); 2702 2703 /* init phys inputs and outputs */ 2704 ac97slot = 0; 2705 if (sc->has_51) 2706 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE; 2707 if (sc->has_71) 2708 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; 2709 if (sc->is_emu10k2) 2710 ac97slot |= 0x40; 2711 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot); 2712 2713 if (sc->is_emu10k2) /* XXX for later cards? */ 2714 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if 2715 * we write 1 here? */ 2716 2717 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev), 2718 /* alignment */ 2, /* boundary */ 0, 2719 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ 2720 /* highaddr */ BUS_SPACE_MAXADDR, 2721 /* filter */ NULL, /* filterarg */ NULL, 2722 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff, 2723 /* flags */ 0, /* lockfunc */ busdma_lock_mutex, 2724 /* lockarg */ &Giant, &(sc->mem.dmat)) != 0) { 2725 device_printf(sc->dev, "unable to create dma tag\n"); 2726 bus_dma_tag_destroy(sc->mem.dmat); 2727 return (ENOMEM); 2728 } 2729 2730 sc->mem.card = sc; 2731 SLIST_INIT(&sc->mem.blocks); 2732 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map); 2733 if (sc->mem.ptb_pages == NULL) 2734 return (ENOMEM); 2735 2736 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map); 2737 if (sc->mem.silent_page == NULL) { 2738 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2739 return (ENOMEM); 2740 } 2741 /* Clear page with silence & setup all pointers to this page */ 2742 bzero(sc->mem.silent_page, EMUPAGESIZE); 2743 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1; 2744 for (i = 0; i < EMU_MAXPAGES; i++) 2745 sc->mem.ptb_pages[i] = tmp | i; 2746 2747 for (ch = 0; ch < NUM_G; ch++) { 2748 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK); 2749 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK); 2750 } 2751 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); 2752 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ 2753 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ 2754 2755 /* init envelope engine */ 2756 for (ch = 0; ch < NUM_G; ch++) { 2757 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2758 emu_wrptr(sc, ch, EMU_CHAN_IP, 0); 2759 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff); 2760 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff); 2761 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2762 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2763 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0); 2764 2765 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0); 2766 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10); 2767 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0); 2768 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0); 2769 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0); 2770 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000); 2771 2772 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0); 2773 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0); 2774 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); 2775 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); 2776 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); 2777 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ 2778 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ 2779 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); 2780 2781 /*** these are last so OFF prevents writing ***/ 2782 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0); 2783 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0); 2784 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0); 2785 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0); 2786 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0); 2787 2788 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2789 emu_wrptr(sc, ch, 0x4c, 0x0); 2790 emu_wrptr(sc, ch, 0x4d, 0x0); 2791 emu_wrptr(sc, ch, 0x4e, 0x0); 2792 emu_wrptr(sc, ch, 0x4f, 0x0); 2793 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f); 2794 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f); 2795 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0); 2796 } 2797 } 2798 2799 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2800 2801 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2802 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000); 2803 2804 /* 2805 * CAxxxx cards needs additional setup: 2806 * 1. Set I2S capture sample rate to 96000 2807 * 2. Disable P16v / P17v proceesing 2808 * 3. Allow EMU10K DSP inputs 2809 */ 2810 if ((sc->is_ca0102) || (sc->is_ca0108)) { 2811 2812 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE); 2813 spdif_sr &= 0xfffff1ff; 2814 spdif_sr |= EMU_A_I2S_CAPTURE_96000; 2815 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr); 2816 2817 /* Disable P16v processing */ 2818 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14); 2819 2820 /* Setup P16v/P17v sound routing */ 2821 if (sc->is_ca0102) 2822 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00); 2823 else { 2824 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000); 2825 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000); 2826 2827 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2828 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2); 2829 } 2830 } 2831 emu_initefx(sc); 2832 2833 def_mode = MODE_ANALOG; 2834 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2835 def_mode = MODE_DIGITAL; 2836 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) { 2837 device_printf(sc->dev, "Audigy card initialized in analog mode.\n"); 2838 def_mode = MODE_ANALOG; 2839 } 2840 emumix_set_mode(sc, def_mode); 2841 2842 if (bootverbose) { 2843 tmp = emu_rd(sc, EMU_HCFG, 4); 2844 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp); 2845 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", 2846 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""), 2847 (tmp & 0x40000000 ? "[0x40] " : ""), 2848 (tmp & 0x20000000 ? "[0x20] " : ""), 2849 (tmp & 0x10000000 ? "[0x10] " : ""), 2850 (tmp & 0x08000000 ? "[0x08] " : ""), 2851 (tmp & 0x04000000 ? "[0x04] " : ""), 2852 (tmp & 0x02000000 ? "[0x02] " : ""), 2853 (tmp & 0x01000000 ? "[0x01]" : " ")); 2854 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", 2855 (tmp & 0x00800000 ? "[0x80] " : ""), 2856 (tmp & 0x00400000 ? "[0x40] " : ""), 2857 (tmp & 0x00200000 ? "[Legacy INT] " : ""), 2858 (tmp & 0x00100000 ? "[0x10] " : ""), 2859 (tmp & 0x00080000 ? "[0x08] " : ""), 2860 (tmp & 0x00040000 ? "[Codec4] " : ""), 2861 (tmp & 0x00020000 ? "[Codec2] " : ""), 2862 (tmp & 0x00010000 ? "[I2S Codec]" : " ")); 2863 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", 2864 (tmp & 0x00008000 ? "[0x80] " : ""), 2865 (tmp & 0x00004000 ? "[GPINPUT0] " : ""), 2866 (tmp & 0x00002000 ? "[GPINPUT1] " : ""), 2867 (tmp & 0x00001000 ? "[GPOUT0] " : ""), 2868 (tmp & 0x00000800 ? "[GPOUT1] " : ""), 2869 (tmp & 0x00000400 ? "[GPOUT2] " : ""), 2870 (tmp & 0x00000200 ? "[Joystick] " : ""), 2871 (tmp & 0x00000100 ? "[0x01]" : " ")); 2872 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", 2873 (tmp & 0x00000080 ? "[0x80] " : ""), 2874 (tmp & 0x00000040 ? "[0x40] " : ""), 2875 (tmp & 0x00000020 ? "[0x20] " : ""), 2876 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""), 2877 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""), 2878 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""), 2879 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""), 2880 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " ")); 2881 2882 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2883 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2884 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp); 2885 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )"); 2886 printf(" : %s%s%s%s%s%s%s%s\n", 2887 (tmp & 0x8000 ? "[Rear Speakers] " : ""), 2888 (tmp & 0x4000 ? "[Front Speakers] " : ""), 2889 (tmp & 0x2000 ? "[0x20] " : ""), 2890 (tmp & 0x1000 ? "[0x10] " : ""), 2891 (tmp & 0x0800 ? "[0x08] " : ""), 2892 (tmp & 0x0400 ? "[0x04] " : ""), 2893 (tmp & 0x0200 ? "[0x02] " : ""), 2894 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " ")); 2895 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )"); 2896 printf(" : %s%s%s%s%s%s%s%s\n", 2897 (tmp & 0x0080 ? "[0x80] " : ""), 2898 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""), 2899 (tmp & 0x0020 ? "[0x20] " : ""), 2900 (tmp & 0x0010 ? "[0x10] " : ""), 2901 (tmp & 0x0008 ? "[0x08] " : ""), 2902 (tmp & 0x0004 ? "[GPOUT0] " : ""), 2903 (tmp & 0x0002 ? "[GPOUT1] " : ""), 2904 (tmp & 0x0001 ? "[GPOUT2]" : " ")); 2905 } /* is_emu10k2 or ca* */ 2906 } /* bootverbose */ 2907 return (0); 2908 } 2909 2910 static int 2911 emu_uninit(struct emu_sc_info *sc) 2912 { 2913 uint32_t ch; 2914 struct emu_memblk *blk; 2915 2916 emu_wr(sc, EMU_INTE, 0, 4); 2917 for (ch = 0; ch < NUM_G; ch++) 2918 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2919 for (ch = 0; ch < NUM_G; ch++) { 2920 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0); 2921 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0); 2922 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2923 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2924 } 2925 2926 /* disable audio and lock cache */ 2927 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2928 2929 emu_wrptr(sc, 0, EMU_PTB, 0); 2930 /* reset recording buffers */ 2931 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2932 emu_wrptr(sc, 0, EMU_MICBA, 0); 2933 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2934 emu_wrptr(sc, 0, EMU_FXBA, 0); 2935 emu_wrptr(sc, 0, EMU_FXWC, 0); 2936 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2937 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2938 emu_wrptr(sc, 0, EMU_TCB, 0); 2939 emu_wrptr(sc, 0, EMU_TCBS, 0); 2940 2941 /* disable channel interrupt */ 2942 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2943 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2944 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2945 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2946 2947 if (!SLIST_EMPTY(&sc->mem.blocks)) 2948 device_printf(sc->dev, "warning: memblock list not empty\n"); 2949 2950 SLIST_FOREACH(blk, &sc->mem.blocks, link) 2951 if (blk != NULL) 2952 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner); 2953 2954 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2955 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map); 2956 2957 return (0); 2958 } 2959 2960 static int 2961 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result) 2962 { 2963 struct sndcard_func *func = device_get_ivars(dev); 2964 struct emu_sc_info *sc = device_get_softc(bus); 2965 2966 if (func==NULL) 2967 return (ENOMEM); 2968 if (sc == NULL) 2969 return (ENOMEM); 2970 2971 switch (ivar_index) { 2972 case EMU_VAR_FUNC: 2973 *result = func->func; 2974 break; 2975 case EMU_VAR_ROUTE: 2976 if (func->varinfo == NULL) 2977 return (ENOMEM); 2978 *result = ((struct emu_pcminfo *)func->varinfo)->route; 2979 break; 2980 case EMU_VAR_ISEMU10K1: 2981 *result = sc->is_emu10k1; 2982 break; 2983 case EMU_VAR_MCH_DISABLED: 2984 *result = sc->mch_disabled; 2985 break; 2986 case EMU_VAR_MCH_REC: 2987 *result = sc->mch_rec; 2988 break; 2989 default: 2990 return (ENOENT); 2991 } 2992 2993 return (0); 2994 } 2995 2996 static int 2997 emu_write_ivar(device_t bus __unused, device_t dev __unused, 2998 int ivar_index, uintptr_t value __unused) 2999 { 3000 3001 switch (ivar_index) { 3002 case 0: 3003 return (EINVAL); 3004 3005 default: 3006 return (ENOENT); 3007 } 3008 } 3009 3010 static int 3011 emu_pci_probe(device_t dev) 3012 { 3013 struct sbuf *s; 3014 unsigned int thiscard = 0; 3015 uint16_t vendor; 3016 3017 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2); 3018 if (vendor != 0x1102) 3019 return (ENXIO); /* Not Creative */ 3020 3021 thiscard = emu_getcard(dev); 3022 if (thiscard == 0) 3023 return (ENXIO); 3024 3025 s = sbuf_new(NULL, NULL, 4096, 0); 3026 if (s == NULL) 3027 return (ENOMEM); 3028 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode); 3029 sbuf_finish(s); 3030 3031 device_set_desc_copy(dev, sbuf_data(s)); 3032 3033 sbuf_delete(s); 3034 3035 return (BUS_PROBE_DEFAULT); 3036 } 3037 3038 3039 static int 3040 emu_pci_attach(device_t dev) 3041 { 3042 struct sndcard_func *func; 3043 struct emu_sc_info *sc; 3044 struct emu_pcminfo *pcminfo; 3045 #if 0 3046 struct emu_midiinfo *midiinfo; 3047 #endif 3048 int i; 3049 int device_flags; 3050 char status[255]; 3051 int error = ENXIO; 3052 int unit; 3053 3054 sc = device_get_softc(dev); 3055 unit = device_get_unit(dev); 3056 3057 /* Get configuration */ 3058 3059 sc->ctx = device_get_sysctl_ctx(dev); 3060 if (sc->ctx == NULL) 3061 goto bad; 3062 sc->root = device_get_sysctl_tree(dev); 3063 if (sc->root == NULL) 3064 goto bad; 3065 3066 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled))) 3067 RANGE(sc->mch_disabled, 0, 1); 3068 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3069 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3070 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting"); 3071 3072 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec))) 3073 RANGE(sc->mch_rec, 0, 1); 3074 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3075 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3076 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting"); 3077 3078 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level))) 3079 RANGE(sc->mch_rec, 0, 2); 3080 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3081 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3082 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); 3083 3084 /* Fill in the softc. */ 3085 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF); 3086 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF); 3087 sc->dev = dev; 3088 sc->type = pci_get_devid(dev); 3089 sc->rev = pci_get_revid(dev); 3090 sc->enable_ir = 0; 3091 sc->has_ac97 = 0; 3092 sc->has_51 = 0; 3093 sc->has_71 = 0; 3094 sc->broken_digital = 0; 3095 sc->is_emu10k1 = 0; 3096 sc->is_emu10k2 = 0; 3097 sc->is_ca0102 = 0; 3098 sc->is_ca0108 = 0; 3099 sc->is_cardbus = 0; 3100 3101 device_flags = emu_cards[emu_getcard(dev)].flags; 3102 if (device_flags & HAS_51) 3103 sc->has_51 = 1; 3104 if (device_flags & HAS_71) { 3105 sc->has_51 = 1; 3106 sc->has_71 = 1; 3107 } 3108 if (device_flags & IS_EMU10K1) 3109 sc->is_emu10k1 = 1; 3110 if (device_flags & IS_EMU10K2) 3111 sc->is_emu10k2 = 1; 3112 if (device_flags & IS_CA0102) 3113 sc->is_ca0102 = 1; 3114 if (device_flags & IS_CA0108) 3115 sc->is_ca0108 = 1; 3116 if ((sc->is_emu10k2) && (sc->rev == 4)) { 3117 sc->is_emu10k2 = 0; 3118 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ 3119 } 3120 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1)) 3121 if (device_flags & IS_CARDBUS) 3122 sc->is_cardbus = 1; 3123 3124 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) { 3125 device_printf(sc->dev, "Unable to detect HW chipset\n"); 3126 goto bad; 3127 } 3128 if (device_flags & BROKEN_DIGITAL) 3129 sc->broken_digital = 1; 3130 if (device_flags & HAS_AC97) 3131 sc->has_ac97 = 1; 3132 3133 sc->opcode_shift = 0; 3134 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 3135 sc->opcode_shift = 24; 3136 sc->high_operand_shift = 12; 3137 3138 /* DSP map */ 3139 /* sc->fx_base = 0x0 */ 3140 sc->input_base = 0x40; 3141 /* sc->p16vinput_base = 0x50; */ 3142 sc->output_base = 0x60; 3143 sc->efxc_base = 0x80; 3144 /* sc->output32h_base = 0xa0; */ 3145 /* sc->output32l_base = 0xb0; */ 3146 sc->dsp_zero = 0xc0; 3147 /* 0xe0...0x100 are unknown */ 3148 /* sc->tram_base = 0x200 */ 3149 /* sc->tram_addr_base = 0x300 */ 3150 sc->gpr_base = EMU_A_FXGPREGBASE; 3151 sc->num_gprs = 0x200; 3152 sc->code_base = EMU_A_MICROCODEBASE; 3153 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, 3154 * 1024 instructions */ 3155 3156 sc->mchannel_fx = 8; 3157 sc->num_fxbuses = 16; 3158 sc->num_inputs = 8; 3159 sc->num_outputs = 16; 3160 sc->address_mask = EMU_A_PTR_ADDR_MASK; 3161 } 3162 if (sc->is_emu10k1) { 3163 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ 3164 sc->opcode_shift = 20; 3165 sc->high_operand_shift = 10; 3166 sc->code_base = EMU_MICROCODEBASE; 3167 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, 3168 * 512 instructions */ 3169 sc->gpr_base = EMU_FXGPREGBASE; 3170 sc->num_gprs = 0x100; 3171 sc->input_base = 0x10; 3172 sc->output_base = 0x20; 3173 /* 3174 * XXX 5.1 Analog outputs are inside efxc address space! 3175 * They use output+0x11/+0x12 (=efxc+1/+2). 3176 * Don't use this efx registers for recording on SB Live! 5.1! 3177 */ 3178 sc->efxc_base = 0x30; 3179 sc->dsp_zero = 0x40; 3180 sc->mchannel_fx = 0; 3181 sc->num_fxbuses = 8; 3182 sc->num_inputs = 8; 3183 sc->num_outputs = 16; 3184 sc->address_mask = EMU_PTR_ADDR_MASK; 3185 } 3186 if (sc->opcode_shift == 0) 3187 goto bad; 3188 3189 pci_enable_busmaster(dev); 3190 3191 i = PCIR_BAR(0); 3192 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 3193 if (sc->reg == NULL) { 3194 device_printf(dev, "unable to map register space\n"); 3195 goto bad; 3196 } 3197 sc->st = rman_get_bustag(sc->reg); 3198 sc->sh = rman_get_bushandle(sc->reg); 3199 3200 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 3201 sc->timer[i] = 0; /* disable it */ 3202 3203 i = 0; 3204 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE); 3205 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, 3206 NULL, 3207 emu_intr, sc, &sc->ih)) { 3208 device_printf(dev, "unable to map interrupt\n"); 3209 goto bad; 3210 } 3211 if (emu_rm_init(sc) != 0) { 3212 device_printf(dev, "unable to create resource manager\n"); 3213 goto bad; 3214 } 3215 if (sc->is_cardbus) 3216 if (emu_cardbus_init(sc) != 0) { 3217 device_printf(dev, "unable to initialize CardBus interface\n"); 3218 goto bad; 3219 } 3220 if (emu_init(sc) != 0) { 3221 device_printf(dev, "unable to initialize the card\n"); 3222 goto bad; 3223 } 3224 if (emu10kx_dev_init(sc) != 0) { 3225 device_printf(dev, "unable to create control device\n"); 3226 goto bad; 3227 } 3228 snprintf(status, 255, "rev %d at io 0x%lx irq %ld", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq)); 3229 3230 /* Voices */ 3231 for (i = 0; i < NUM_G; i++) { 3232 sc->voice[i].vnum = i; 3233 sc->voice[i].slave = NULL; 3234 sc->voice[i].busy = 0; 3235 sc->voice[i].ismaster = 0; 3236 sc->voice[i].running = 0; 3237 sc->voice[i].b16 = 0; 3238 sc->voice[i].stereo = 0; 3239 sc->voice[i].speed = 0; 3240 sc->voice[i].start = 0; 3241 sc->voice[i].end = 0; 3242 } 3243 3244 /* PCM Audio */ 3245 for (i = 0; i < RT_COUNT; i++) 3246 sc->pcm[i] = NULL; 3247 3248 /* FRONT */ 3249 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3250 if (func == NULL) { 3251 error = ENOMEM; 3252 goto bad; 3253 } 3254 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3255 if (pcminfo == NULL) { 3256 error = ENOMEM; 3257 goto bad; 3258 } 3259 pcminfo->card = sc; 3260 pcminfo->route = RT_FRONT; 3261 3262 func->func = SCF_PCM; 3263 func->varinfo = pcminfo; 3264 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1); 3265 device_set_ivars(sc->pcm[RT_FRONT], func); 3266 3267 if (!(sc->mch_disabled)) { 3268 /* REAR */ 3269 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3270 if (func == NULL) { 3271 error = ENOMEM; 3272 goto bad; 3273 } 3274 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3275 if (pcminfo == NULL) { 3276 error = ENOMEM; 3277 goto bad; 3278 } 3279 pcminfo->card = sc; 3280 pcminfo->route = RT_REAR; 3281 3282 func->func = SCF_PCM; 3283 func->varinfo = pcminfo; 3284 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1); 3285 device_set_ivars(sc->pcm[RT_REAR], func); 3286 if (sc->has_51) { 3287 /* CENTER */ 3288 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3289 if (func == NULL) { 3290 error = ENOMEM; 3291 goto bad; 3292 } 3293 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3294 if (pcminfo == NULL) { 3295 error = ENOMEM; 3296 goto bad; 3297 } 3298 pcminfo->card = sc; 3299 pcminfo->route = RT_CENTER; 3300 3301 func->func = SCF_PCM; 3302 func->varinfo = pcminfo; 3303 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1); 3304 device_set_ivars(sc->pcm[RT_CENTER], func); 3305 /* SUB */ 3306 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3307 if (func == NULL) { 3308 error = ENOMEM; 3309 goto bad; 3310 } 3311 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3312 if (pcminfo == NULL) { 3313 error = ENOMEM; 3314 goto bad; 3315 } 3316 pcminfo->card = sc; 3317 pcminfo->route = RT_SUB; 3318 3319 func->func = SCF_PCM; 3320 func->varinfo = pcminfo; 3321 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1); 3322 device_set_ivars(sc->pcm[RT_SUB], func); 3323 } 3324 if (sc->has_71) { 3325 /* SIDE */ 3326 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3327 if (func == NULL) { 3328 error = ENOMEM; 3329 goto bad; 3330 } 3331 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3332 if (pcminfo == NULL) { 3333 error = ENOMEM; 3334 goto bad; 3335 } 3336 pcminfo->card = sc; 3337 pcminfo->route = RT_SIDE; 3338 3339 func->func = SCF_PCM; 3340 func->varinfo = pcminfo; 3341 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1); 3342 device_set_ivars(sc->pcm[RT_SIDE], func); 3343 } 3344 } /* mch_disabled */ 3345 3346 if (sc->mch_rec) { 3347 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3348 if (func == NULL) { 3349 error = ENOMEM; 3350 goto bad; 3351 } 3352 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3353 if (pcminfo == NULL) { 3354 error = ENOMEM; 3355 goto bad; 3356 } 3357 pcminfo->card = sc; 3358 pcminfo->route = RT_MCHRECORD; 3359 3360 func->func = SCF_PCM; 3361 func->varinfo = pcminfo; 3362 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1); 3363 device_set_ivars(sc->pcm[RT_MCHRECORD], func); 3364 } /*mch_rec */ 3365 3366 for (i = 0; i < 2; i++) 3367 sc->midi[i] = NULL; 3368 3369 /* MIDI has some memory mangament and (possible) locking problems */ 3370 #if 0 3371 /* Midi Interface 1: Live!, Audigy, Audigy 2 */ 3372 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) { 3373 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3374 if (func == NULL) { 3375 error = ENOMEM; 3376 goto bad; 3377 } 3378 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3379 if (midiinfo == NULL) { 3380 error = ENOMEM; 3381 goto bad; 3382 } 3383 midiinfo->card = sc; 3384 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3385 midiinfo->port = EMU_A_MUDATA1; 3386 midiinfo->portnr = 1; 3387 } 3388 if (sc->is_emu10k1) { 3389 midiinfo->port = MUDATA; 3390 midiinfo->portnr = 1; 3391 } 3392 func->func = SCF_MIDI; 3393 func->varinfo = midiinfo; 3394 sc->midi[0] = device_add_child(dev, "midi", -1); 3395 device_set_ivars(sc->midi[0], func); 3396 } 3397 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */ 3398 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3399 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3400 if (func == NULL) { 3401 error = ENOMEM; 3402 goto bad; 3403 } 3404 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3405 if (midiinfo == NULL) { 3406 error = ENOMEM; 3407 goto bad; 3408 } 3409 midiinfo->card = sc; 3410 3411 midiinfo->port = EMU_A_MUDATA2; 3412 midiinfo->portnr = 2; 3413 3414 func->func = SCF_MIDI; 3415 func->varinfo = midiinfo; 3416 sc->midi[1] = device_add_child(dev, "midi", -1); 3417 device_set_ivars(sc->midi[1], func); 3418 } 3419 #endif 3420 return (bus_generic_attach(dev)); 3421 3422 bad: 3423 /* XXX can we just call emu_pci_detach here? */ 3424 if (sc->cdev) 3425 emu10kx_dev_uninit(sc); 3426 if (sc->rm != NULL) 3427 emu_rm_uninit(sc); 3428 if (sc->reg) 3429 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3430 if (sc->ih) 3431 bus_teardown_intr(dev, sc->irq, sc->ih); 3432 if (sc->irq) 3433 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3434 mtx_destroy(&sc->rw); 3435 mtx_destroy(&sc->lock); 3436 return (error); 3437 } 3438 3439 static int 3440 emu_pci_detach(device_t dev) 3441 { 3442 struct emu_sc_info *sc; 3443 struct sndcard_func *func; 3444 int devcount, i; 3445 device_t *childlist; 3446 int r = 0; 3447 3448 sc = device_get_softc(dev); 3449 3450 for (i = 0; i < RT_COUNT; i++) { 3451 if (sc->pcm[i] != NULL) { 3452 func = device_get_ivars(sc->pcm[i]); 3453 if (func != NULL && func->func == SCF_PCM) { 3454 device_set_ivars(sc->pcm[i], NULL); 3455 free(func->varinfo, M_DEVBUF); 3456 free(func, M_DEVBUF); 3457 } 3458 r = device_delete_child(dev, sc->pcm[i]); 3459 if (r) return (r); 3460 } 3461 } 3462 3463 if (sc->midi[0] != NULL) { 3464 func = device_get_ivars(sc->midi[0]); 3465 if (func != NULL && func->func == SCF_MIDI) { 3466 device_set_ivars(sc->midi[0], NULL); 3467 free(func->varinfo, M_DEVBUF); 3468 free(func, M_DEVBUF); 3469 } 3470 r = device_delete_child(dev, sc->midi[0]); 3471 if (r) return (r); 3472 } 3473 3474 if (sc->midi[1] != NULL) { 3475 func = device_get_ivars(sc->midi[1]); 3476 if (func != NULL && func->func == SCF_MIDI) { 3477 device_set_ivars(sc->midi[1], NULL); 3478 free(func->varinfo, M_DEVBUF); 3479 free(func, M_DEVBUF); 3480 } 3481 r = device_delete_child(dev, sc->midi[1]); 3482 if (r) return (r); 3483 } 3484 3485 if (device_get_children(dev, &childlist, &devcount) == 0) 3486 for (i = 0; i < devcount - 1; i++) { 3487 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i])); 3488 func = device_get_ivars(childlist[i]); 3489 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) { 3490 device_set_ivars(childlist[i], NULL); 3491 free(func->varinfo, M_DEVBUF); 3492 free(func, M_DEVBUF); 3493 } 3494 device_delete_child(dev, childlist[i]); 3495 } 3496 if (childlist != NULL) 3497 free(childlist, M_TEMP); 3498 3499 r = emu10kx_dev_uninit(sc); 3500 if (r) 3501 return (r); 3502 3503 /* shutdown chip */ 3504 emu_uninit(sc); 3505 emu_rm_uninit(sc); 3506 3507 if (sc->mem.dmat) 3508 bus_dma_tag_destroy(sc->mem.dmat); 3509 3510 if (sc->reg) 3511 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3512 bus_teardown_intr(dev, sc->irq, sc->ih); 3513 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3514 mtx_destroy(&sc->rw); 3515 mtx_destroy(&sc->lock); 3516 3517 return (bus_generic_detach(dev)); 3518 } 3519 /* add suspend, resume */ 3520 static device_method_t emu_methods[] = { 3521 /* Device interface */ 3522 DEVMETHOD(device_probe, emu_pci_probe), 3523 DEVMETHOD(device_attach, emu_pci_attach), 3524 DEVMETHOD(device_detach, emu_pci_detach), 3525 /* Bus methods */ 3526 DEVMETHOD(bus_read_ivar, emu_read_ivar), 3527 DEVMETHOD(bus_write_ivar, emu_write_ivar), 3528 3529 DEVMETHOD_END 3530 }; 3531 3532 3533 static driver_t emu_driver = { 3534 "emu10kx", 3535 emu_methods, 3536 sizeof(struct emu_sc_info), 3537 NULL, 3538 0, 3539 NULL 3540 }; 3541 3542 static int 3543 emu_modevent(module_t mod __unused, int cmd, void *data __unused) 3544 { 3545 int err = 0; 3546 3547 switch (cmd) { 3548 case MOD_LOAD: 3549 break; /* Success */ 3550 3551 case MOD_UNLOAD: 3552 case MOD_SHUTDOWN: 3553 3554 /* XXX Should we check state of pcm & midi subdevices here? */ 3555 3556 break; /* Success */ 3557 3558 default: 3559 err = EINVAL; 3560 break; 3561 } 3562 3563 return (err); 3564 3565 } 3566 3567 static devclass_t emu_devclass; 3568 3569 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL); 3570 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER); 3571