1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/types.h> 32 #include <sys/bus.h> 33 #include <machine/bus.h> 34 #include <sys/rman.h> 35 #include <sys/systm.h> 36 #include <sys/sbuf.h> 37 #include <sys/queue.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sysctl.h> 41 #include <sys/kdb.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <machine/clock.h> /* for DELAY */ 47 48 #ifdef HAVE_KERNEL_OPTION_HEADERS 49 #include "opt_snd.h" 50 #endif 51 52 #include <dev/sound/chip.h> 53 #include <dev/sound/pcm/sound.h> 54 #include <dev/sound/pcm/ac97.h> 55 56 #include <dev/sound/pci/emuxkireg.h> 57 #include <dev/sound/pci/emu10kx.h> 58 59 /* hw flags */ 60 #define HAS_51 0x0001 61 #define HAS_71 0x0002 62 #define HAS_AC97 0x0004 63 64 #define IS_EMU10K1 0x0008 65 #define IS_EMU10K2 0x0010 66 #define IS_CA0102 0x0020 67 #define IS_CA0108 0x0040 68 #define IS_UNKNOWN 0x0080 69 70 #define BROKEN_DIGITAL 0x0100 71 #define DIGITAL_ONLY 0x0200 72 73 #define IS_CARDBUS 0x0400 74 75 #define MODE_ANALOG 1 76 #define MODE_DIGITAL 2 77 #define SPDIF_MODE_PCM 1 78 #define SPDIF_MODE_AC3 2 79 80 #define MACS 0x0 81 #define MACS1 0x1 82 #define MACW 0x2 83 #define MACW1 0x3 84 #define MACINTS 0x4 85 #define MACINTW 0x5 86 #define ACC3 0x6 87 #define MACMV 0x7 88 #define ANDXOR 0x8 89 #define TSTNEG 0x9 90 #define LIMIT 0xA 91 #define LIMIT1 0xB 92 #define LOG 0xC 93 #define EXP 0xD 94 #define INTERP 0xE 95 #define SKIP 0xF 96 97 #define GPR(i) (sc->gpr_base+(i)) 98 #define INP(i) (sc->input_base+(i)) 99 #define OUTP(i) (sc->output_base+(i)) 100 #define FX(i) (i) 101 #define FX2(i) (sc->efxc_base+(i)) 102 #define DSP_CONST(i) (sc->dsp_zero+(i)) 103 104 #define COND_NORMALIZED DSP_CONST(0x1) 105 #define COND_BORROW DSP_CONST(0x2) 106 #define COND_MINUS DSP_CONST(0x3) 107 #define COND_LESS_ZERO DSP_CONST(0x4) 108 #define COND_EQ_ZERO DSP_CONST(0x5) 109 #define COND_SATURATION DSP_CONST(0x6) 110 #define COND_NEQ_ZERO DSP_CONST(0x8) 111 112 #define DSP_ACCUM DSP_CONST(0x16) 113 #define DSP_CCR DSP_CONST(0x17) 114 115 /* Live! Inputs */ 116 #define IN_AC97_L 0x00 117 #define IN_AC97_R 0x01 118 #define IN_AC97 IN_AC97_L 119 #define IN_SPDIF_CD_L 0x02 120 #define IN_SPDIF_CD_R 0x03 121 #define IN_SPDIF_CD IN_SPDIF_CD_L 122 #define IN_ZOOM_L 0x04 123 #define IN_ZOOM_R 0x05 124 #define IN_ZOOM IN_ZOOM_L 125 #define IN_TOSLINK_L 0x06 126 #define IN_TOSLINK_R 0x07 127 #define IN_TOSLINK IN_TOSLINK_L 128 #define IN_LINE1_L 0x08 129 #define IN_LINE1_R 0x09 130 #define IN_LINE1 IN_LINE1_L 131 #define IN_COAX_SPDIF_L 0x0a 132 #define IN_COAX_SPDIF_R 0x0b 133 #define IN_COAX_SPDIF IN_COAX_SPDIF_L 134 #define IN_LINE2_L 0x0c 135 #define IN_LINE2_R 0x0d 136 #define IN_LINE2 IN_LINE2_L 137 #define IN_0E 0x0e 138 #define IN_0F 0x0f 139 140 /* Outputs */ 141 #define OUT_AC97_L 0x00 142 #define OUT_AC97_R 0x01 143 #define OUT_AC97 OUT_AC97_L 144 #define OUT_A_FRONT OUT_AC97 145 #define OUT_TOSLINK_L 0x02 146 #define OUT_TOSLINK_R 0x03 147 #define OUT_TOSLINK OUT_TOSLINK_L 148 #define OUT_D_CENTER 0x04 149 #define OUT_D_SUB 0x05 150 #define OUT_HEADPHONE_L 0x06 151 #define OUT_HEADPHONE_R 0x07 152 #define OUT_HEADPHONE OUT_HEADPHONE_L 153 #define OUT_REAR_L 0x08 154 #define OUT_REAR_R 0x09 155 #define OUT_REAR OUT_REAR_L 156 #define OUT_ADC_REC_L 0x0a 157 #define OUT_ADC_REC_R 0x0b 158 #define OUT_ADC_REC OUT_ADC_REC_L 159 #define OUT_MIC_CAP 0x0c 160 161 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */ 162 #define OUT_A_CENTER 0x11 163 #define OUT_A_SUB 0x12 164 165 /* Audigy Inputs */ 166 #define A_IN_AC97_L 0x00 167 #define A_IN_AC97_R 0x01 168 #define A_IN_AC97 A_IN_AC97_L 169 #define A_IN_SPDIF_CD_L 0x02 170 #define A_IN_SPDIF_CD_R 0x03 171 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L 172 #define A_IN_O_SPDIF_L 0x04 173 #define A_IN_O_SPDIF_R 0x05 174 #define A_IN_O_SPDIF A_IN_O_SPDIF_L 175 #define A_IN_LINE2_L 0x08 176 #define A_IN_LINE2_R 0x09 177 #define A_IN_LINE2 A_IN_LINE2_L 178 #define A_IN_R_SPDIF_L 0x0a 179 #define A_IN_R_SPDIF_R 0x0b 180 #define A_IN_R_SPDIF A_IN_R_SPDIF_L 181 #define A_IN_AUX2_L 0x0c 182 #define A_IN_AUX2_R 0x0d 183 #define A_IN_AUX2 A_IN_AUX2_L 184 185 /* Audigy Outputs */ 186 #define A_OUT_D_FRONT_L 0x00 187 #define A_OUT_D_FRONT_R 0x01 188 #define A_OUT_D_FRONT A_OUT_D_FRONT_L 189 #define A_OUT_D_CENTER 0x02 190 #define A_OUT_D_SUB 0x03 191 #define A_OUT_D_SIDE_L 0x04 192 #define A_OUT_D_SIDE_R 0x05 193 #define A_OUT_D_SIDE A_OUT_D_SIDE_L 194 #define A_OUT_D_REAR_L 0x06 195 #define A_OUT_D_REAR_R 0x07 196 #define A_OUT_D_REAR A_OUT_D_REAR_L 197 198 /* on Audigy Platinum only */ 199 #define A_OUT_HPHONE_L 0x04 200 #define A_OUT_HPHONE_R 0x05 201 #define A_OUT_HPHONE A_OUT_HPHONE_L 202 203 #define A_OUT_A_FRONT_L 0x08 204 #define A_OUT_A_FRONT_R 0x09 205 #define A_OUT_A_FRONT A_OUT_A_FRONT_L 206 #define A_OUT_A_CENTER 0x0a 207 #define A_OUT_A_SUB 0x0b 208 #define A_OUT_A_SIDE_L 0x0c 209 #define A_OUT_A_SIDE_R 0x0d 210 #define A_OUT_A_SIDE A_OUT_A_SIDE_L 211 #define A_OUT_A_REAR_L 0x0e 212 #define A_OUT_A_REAR_R 0x0f 213 #define A_OUT_A_REAR A_OUT_A_REAR_L 214 #define A_OUT_AC97_L 0x10 215 #define A_OUT_AC97_R 0x11 216 #define A_OUT_AC97 A_OUT_AC97_L 217 #define A_OUT_ADC_REC_L 0x16 218 #define A_OUT_ADC_REC_R 0x17 219 #define A_OUT_ADC_REC A_OUT_ADC_REC_L 220 221 #define EMU_DATA2 0x24 222 #define EMU_IPR2 0x28 223 #define EMU_INTE2 0x2c 224 #define EMU_IPR3 0x38 225 #define EMU_INTE3 0x3c 226 227 #define EMU_A2_SRCSel 0x60 228 #define EMU_A2_SRCMULTI_ENABLE 0x6e 229 230 #define EMU_A_I2S_CAPTURE_96000 0x00000400 231 232 #define EMU_A2_MIXER_I2S_ENABLE 0x7B 233 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A 234 235 #define C_FRONT_L 0 236 #define C_FRONT_R 1 237 #define C_REC_L 2 238 #define C_REC_R 3 239 #define C_REAR_L 4 240 #define C_REAR_R 5 241 #define C_CENTER 6 242 #define C_SUB 7 243 #define C_SIDE_L 8 244 #define C_SIDE_R 9 245 #define NUM_CACHES 10 246 247 #define CDSPDIFMUTE 0 248 #define ANALOGMUTE 1 249 #define NUM_MUTE 2 250 251 #define EMU_MAX_GPR 512 252 #define EMU_MAX_IRQ_CONSUMERS 32 253 254 struct emu_voice { 255 int vnum; 256 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; 257 int speed; 258 int start; 259 int end; 260 int vol; 261 uint32_t buf; 262 void *vbuf; 263 struct emu_voice *slave; 264 uint32_t sa; 265 uint32_t ea; 266 uint32_t routing[8]; 267 uint32_t amounts[8]; 268 }; 269 270 struct emu_memblk { 271 SLIST_ENTRY(emu_memblk) link; 272 void *buf; 273 char owner[16]; 274 bus_addr_t buf_addr; 275 uint32_t pte_start, pte_size; 276 bus_dmamap_t buf_map; 277 }; 278 279 struct emu_mem { 280 uint8_t bmap[EMU_MAXPAGES / 8]; 281 uint32_t *ptb_pages; 282 void *silent_page; 283 bus_addr_t ptb_pages_addr; 284 bus_addr_t silent_page_addr; 285 bus_dmamap_t ptb_map; 286 bus_dmamap_t silent_map; 287 bus_dma_tag_t dmat; 288 struct emu_sc_info *card; 289 SLIST_HEAD(, emu_memblk) blocks; 290 }; 291 292 /* rm */ 293 struct emu_rm { 294 struct emu_sc_info *card; 295 struct mtx gpr_lock; 296 signed int allocmap[EMU_MAX_GPR]; 297 int num_gprs; 298 int last_free_gpr; 299 int num_used; 300 }; 301 302 struct emu_intr_handler { 303 void* softc; 304 uint32_t intr_mask; 305 uint32_t inte_mask; 306 uint32_t(*irq_func) (void *softc, uint32_t irq); 307 }; 308 309 struct emu_sc_info { 310 struct mtx lock; 311 struct mtx rw; /* Hardware exclusive access lock */ 312 313 /* Hardware and subdevices */ 314 device_t dev; 315 device_t pcm[RT_COUNT]; 316 device_t midi[2]; 317 uint32_t type; 318 uint32_t rev; 319 320 bus_space_tag_t st; 321 bus_space_handle_t sh; 322 323 struct cdev *cdev; /* /dev/emu10k character device */ 324 struct mtx emu10kx_lock; 325 int emu10kx_isopen; 326 struct sbuf emu10kx_sbuf; 327 int emu10kx_bufptr; 328 329 /* Resources */ 330 struct resource *reg; 331 struct resource *irq; 332 void *ih; 333 334 /* IRQ handlers */ 335 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS]; 336 337 /* Card HW configuration */ 338 unsigned int mode; /* analog / digital */ 339 unsigned int mchannel_fx; 340 unsigned int dsp_zero; 341 unsigned int code_base; 342 unsigned int code_size; 343 unsigned int gpr_base; 344 unsigned int num_gprs; 345 unsigned int input_base; 346 unsigned int output_base; 347 unsigned int efxc_base; 348 unsigned int opcode_shift; 349 unsigned int high_operand_shift; 350 unsigned int address_mask; 351 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1, 352 has_ac97:1, has_51:1, has_71:1, 353 enable_ir:1, 354 broken_digital:1, is_cardbus:1; 355 356 signed int mch_disabled, mch_rec, dbg_level; 357 signed int num_inputs; 358 unsigned int num_outputs; 359 unsigned int num_fxbuses; 360 unsigned int routing_code_start; 361 unsigned int routing_code_end; 362 363 /* HW resources */ 364 struct emu_voice voice[NUM_G]; /* Hardware voices */ 365 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ 366 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ 367 int timerinterval; 368 struct emu_rm *rm; 369 struct emu_mem mem; /* memory */ 370 371 /* Mixer */ 372 int mixer_gpr[NUM_MIXERS]; 373 int mixer_volcache[NUM_MIXERS]; 374 int cache_gpr[NUM_CACHES]; 375 int dummy_gpr; 376 int mute_gpr[NUM_MUTE]; 377 struct sysctl_ctx_list *ctx; 378 struct sysctl_oid *root; 379 }; 380 381 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error); 382 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map); 383 static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); 384 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner); 385 static int emu_memfree(struct emu_mem *mem, void *membuf); 386 static int emu_memstart(struct emu_mem *mem, void *membuf); 387 388 /* /dev */ 389 static int emu10kx_dev_init(struct emu_sc_info *sc); 390 static int emu10kx_dev_uninit(struct emu_sc_info *sc); 391 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); 392 393 static void emumix_set_mode(struct emu_sc_info *sc, int mode); 394 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); 395 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); 396 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); 397 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); 398 399 static int emu_rm_init(struct emu_sc_info *sc); 400 static int emu_rm_uninit(struct emu_sc_info *sc); 401 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); 402 403 static unsigned int emu_getcard(device_t dev); 404 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size); 405 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); 406 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); 407 408 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); 409 410 static void emu_intr(void *p); 411 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data); 412 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc); 413 static void emu_initefx(struct emu_sc_info *sc); 414 415 static int emu_cardbus_init(struct emu_sc_info *sc); 416 static int emu_init(struct emu_sc_info *sc); 417 static int emu_uninit(struct emu_sc_info *sc); 418 419 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result); 420 static int emu_write_ivar(device_t bus __unused, device_t dev __unused, 421 int ivar_index, uintptr_t value __unused); 422 423 static int emu_pci_probe(device_t dev); 424 static int emu_pci_attach(device_t dev); 425 static int emu_pci_detach(device_t dev); 426 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); 427 428 #ifdef SND_EMU10KX_DEBUG 429 430 #define EMU_MTX_DEBUG() do { \ 431 if (mtx_owned(&sc->rw)) { \ 432 printf("RW owned in %s line %d for %s\n", __func__, \ 433 __LINE__ , device_get_nameunit(sc->dev)); \ 434 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ 435 printf("rw lock: value %x thread %x\n", \ 436 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ 437 (uintptr_t)curthread); \ 438 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\ 439 db_show_mtx(&sc->rw); \ 440 } \ 441 } while (0) 442 #else 443 #define EMU_MTX_DEBUG() do { \ 444 } while (0) 445 #endif 446 447 #define EMU_RWLOCK() do { \ 448 EMU_MTX_DEBUG(); \ 449 mtx_lock(&(sc->rw)); \ 450 } while (0) 451 452 #define EMU_RWUNLOCK() do { \ 453 mtx_unlock(&(sc->rw)); \ 454 EMU_MTX_DEBUG(); \ 455 } while (0) 456 457 /* Supported cards */ 458 struct emu_hwinfo { 459 uint16_t vendor; 460 uint16_t device; 461 uint16_t subvendor; 462 uint16_t subdevice; 463 char SBcode[8]; 464 char desc[32]; 465 int flags; 466 }; 467 468 static struct emu_hwinfo emu_cards[] = { 469 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0}, 470 /* 0x0020..0x002f 4.0 EMU10K1 cards */ 471 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 472 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1}, 473 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1}, 474 475 /* (range unknown) 5.1 EMU10K1 cards */ 476 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 477 478 /* 0x80??..0x805? 4.0 EMU10K1 cards */ 479 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 480 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1}, 481 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 482 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1}, 483 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 484 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 485 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1}, 486 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 487 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 488 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 489 490 /* 0x8061..0x???? 5.1 EMU10K1 cards */ 491 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 492 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1}, 493 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 494 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 495 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 496 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1}, 497 498 /* Generic SB Live! */ 499 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1}, 500 501 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */ 502 503 /* 0x0051..0x0051 5.1 CA0100-IAF cards */ 504 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2}, 505 /* ES is CA0100-IDF chip that don't work in digital mode */ 506 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL}, 507 /* 0x0053..0x005C 5.1 CA0101-NAF cards */ 508 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 509 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 510 511 /* 0x1002..0x1009 5.1 CA0102-IAT cards */ 512 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102}, 513 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102}, 514 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102}, 515 516 /* 0x2001..0x2003 7.1 CA0102-ICT cards */ 517 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 518 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 519 /* XXX No reports about 0x2003 & 0x2004 cards */ 520 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 521 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 522 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 523 524 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */ 525 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102}, 526 527 /* Generic Audigy or Audigy 2 */ 528 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2}, 529 530 /* We don't support CA0103-DAT (Audigy LS) cards */ 531 /* There is NO CA0104-xxx cards */ 532 /* There is NO CA0105-xxx cards */ 533 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */ 534 /* There is NO CA0107-xxx cards */ 535 536 /* 0x1000..0x1001 7.1 CA0108-IAT cards */ 537 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY}, 538 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 539 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 540 541 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS}, 542 543 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108}, 544 }; 545 /* Unsupported cards */ 546 547 static struct emu_hwinfo emu_bad_cards[] = { 548 /* APS cards should be possible to support */ 549 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0}, 550 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0}, 551 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0}, 552 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */ 553 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0}, 554 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0}, 555 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0}, 556 }; 557 558 /* 559 * Get best known information about device. 560 */ 561 static unsigned int 562 emu_getcard(device_t dev) 563 { 564 uint16_t device; 565 uint16_t subdevice; 566 unsigned int thiscard; 567 int i; 568 569 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2); 570 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2); 571 572 thiscard = 0; 573 for (i = 1; i < nitems(emu_cards); i++) { 574 if (device == emu_cards[i].device) { 575 if (subdevice == emu_cards[i].subdevice) { 576 thiscard = i; 577 break; 578 } 579 if (0x0000 == emu_cards[i].subdevice) { 580 thiscard = i; 581 /* 582 * don't break, we can get more specific card 583 * later in the list. 584 */ 585 } 586 } 587 } 588 589 for (i = 0; i < nitems(emu_bad_cards); i++) { 590 if (device == emu_bad_cards[i].device) { 591 if (subdevice == emu_bad_cards[i].subdevice) { 592 thiscard = 0; 593 break; 594 } 595 if (0x0000 == emu_bad_cards[i].subdevice) { 596 thiscard = 0; 597 break; /* we avoid all this cards */ 598 } 599 } 600 } 601 return (thiscard); 602 } 603 604 /* 605 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers. 606 * Some of them are used directly, some of them provide pointer / data pairs. 607 */ 608 static uint32_t 609 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 610 { 611 612 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 613 switch (size) { 614 case 1: 615 return (bus_space_read_1(sc->st, sc->sh, regno)); 616 case 2: 617 return (bus_space_read_2(sc->st, sc->sh, regno)); 618 case 4: 619 return (bus_space_read_4(sc->st, sc->sh, regno)); 620 } 621 return (0xffffffff); 622 } 623 624 static void 625 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 626 { 627 628 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 629 switch (size) { 630 case 1: 631 bus_space_write_1(sc->st, sc->sh, regno, data); 632 break; 633 case 2: 634 bus_space_write_2(sc->st, sc->sh, regno, data); 635 break; 636 case 4: 637 bus_space_write_4(sc->st, sc->sh, regno, data); 638 break; 639 } 640 } 641 /* 642 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made 643 * via (channel, register) pair. Some registers are channel-specific, 644 * some not. 645 */ 646 uint32_t 647 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg) 648 { 649 uint32_t ptr, val, mask, size, offset; 650 651 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 652 653 EMU_RWLOCK(); 654 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 655 val = emu_rd_nolock(sc, EMU_DATA, 4); 656 EMU_RWUNLOCK(); 657 658 /* 659 * XXX Some register numbers has data size and offset encoded in 660 * it to get only part of 32bit register. This use is not described 661 * in register name, be careful! 662 */ 663 if (reg & 0xff000000) { 664 size = (reg >> 24) & 0x3f; 665 offset = (reg >> 16) & 0x1f; 666 mask = ((1 << size) - 1) << offset; 667 val &= mask; 668 val >>= offset; 669 } 670 return (val); 671 } 672 673 void 674 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data) 675 { 676 uint32_t ptr, mask, size, offset; 677 678 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 679 680 EMU_RWLOCK(); 681 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 682 /* 683 * XXX Another kind of magic encoding in register number. This can 684 * give you side effect - it will read previous data from register 685 * and change only required bits. 686 */ 687 if (reg & 0xff000000) { 688 size = (reg >> 24) & 0x3f; 689 offset = (reg >> 16) & 0x1f; 690 mask = ((1 << size) - 1) << offset; 691 data <<= offset; 692 data &= mask; 693 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask; 694 } 695 emu_wr_nolock(sc, EMU_DATA, data, 4); 696 EMU_RWUNLOCK(); 697 } 698 /* 699 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made 700 * via (channel, register) pair. Some registers are channel-specific, 701 * some not. This interface is supported by CA0102 and CA0108 chips only. 702 */ 703 uint32_t 704 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg) 705 { 706 uint32_t val; 707 708 /* XXX separate lock? */ 709 EMU_RWLOCK(); 710 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 711 val = emu_rd_nolock(sc, EMU_DATA2, 4); 712 713 EMU_RWUNLOCK(); 714 715 return (val); 716 } 717 718 void 719 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data) 720 { 721 722 EMU_RWLOCK(); 723 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 724 emu_wr_nolock(sc, EMU_DATA2, data, 4); 725 EMU_RWUNLOCK(); 726 } 727 /* 728 * XXX CardBus interface. Not tested on any real hardware. 729 */ 730 static void 731 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data) 732 { 733 734 /* 735 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems 736 * to be some reg/value accessible kind of config register on CardBus 737 * CA0108, with value(?) in top 16 bit, address(?) in low 16 738 */ 739 740 emu_rd_nolock(sc, 0x38, 4); 741 emu_wr_nolock(sc, 0x38, data, 4); 742 emu_rd_nolock(sc, 0x38, 4); 743 744 } 745 746 /* 747 * Direct hardware register access 748 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked. 749 */ 750 void 751 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 752 { 753 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR")); 754 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR")); 755 756 emu_wr_nolock(sc, regno, data, size); 757 } 758 759 uint32_t 760 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 761 { 762 uint32_t rd; 763 764 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA")); 765 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2")); 766 767 rd = emu_rd_nolock(sc, regno, size); 768 return (rd); 769 } 770 771 /* 772 * Enabling IR MIDI messages is another kind of black magic. It just 773 * has to be made this way. It really do it. 774 */ 775 void 776 emu_enable_ir(struct emu_sc_info *sc) 777 { 778 uint32_t iocfg; 779 780 if (sc->is_emu10k2 || sc->is_ca0102) { 781 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2); 782 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2); 783 DELAY(500); 784 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); 785 DELAY(500); 786 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2); 787 DELAY(100); 788 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2); 789 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n"); 790 sc->enable_ir = 1; 791 } 792 if (sc->is_emu10k1) { 793 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4); 794 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4); 795 DELAY(500); 796 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); 797 DELAY(100); 798 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4); 799 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n"); 800 sc->enable_ir = 1; 801 } 802 } 803 804 /* 805 * emu_timer_ - HW timer management 806 */ 807 int 808 emu_timer_create(struct emu_sc_info *sc) 809 { 810 int i, timer; 811 812 timer = -1; 813 814 mtx_lock(&sc->lock); 815 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 816 if (sc->timer[i] == 0) { 817 sc->timer[i] = -1; /* disable it */ 818 timer = i; 819 mtx_unlock(&sc->lock); 820 return (timer); 821 } 822 mtx_unlock(&sc->lock); 823 824 return (-1); 825 } 826 827 int 828 emu_timer_set(struct emu_sc_info *sc, int timer, int delay) 829 { 830 int i; 831 832 if (timer < 0) 833 return (-1); 834 835 RANGE(delay, 16, 1024); 836 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 837 838 mtx_lock(&sc->lock); 839 sc->timer[timer] = delay; 840 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 841 if (sc->timerinterval > sc->timer[i]) 842 sc->timerinterval = sc->timer[i]; 843 844 /* XXX */ 845 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 846 mtx_unlock(&sc->lock); 847 848 return (timer); 849 } 850 851 int 852 emu_timer_enable(struct emu_sc_info *sc, int timer, int go) 853 { 854 uint32_t x; 855 int ena_int; 856 int i; 857 858 if (timer < 0) 859 return (-1); 860 861 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 862 863 mtx_lock(&sc->lock); 864 865 if ((go == 1) && (sc->timer[timer] < 0)) 866 sc->timer[timer] = -sc->timer[timer]; 867 if ((go == 0) && (sc->timer[timer] > 0)) 868 sc->timer[timer] = -sc->timer[timer]; 869 870 ena_int = 0; 871 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 872 if (sc->timerinterval > sc->timer[i]) 873 sc->timerinterval = sc->timer[i]; 874 if (sc->timer[i] > 0) 875 ena_int = 1; 876 } 877 878 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 879 880 if (ena_int == 1) { 881 x = emu_rd(sc, EMU_INTE, 4); 882 x |= EMU_INTE_INTERTIMERENB; 883 emu_wr(sc, EMU_INTE, x, 4); 884 } else { 885 x = emu_rd(sc, EMU_INTE, 4); 886 x &= ~EMU_INTE_INTERTIMERENB; 887 emu_wr(sc, EMU_INTE, x, 4); 888 } 889 mtx_unlock(&sc->lock); 890 return (0); 891 } 892 893 int 894 emu_timer_clear(struct emu_sc_info *sc, int timer) 895 { 896 if (timer < 0) 897 return (-1); 898 899 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 900 901 emu_timer_enable(sc, timer, 0); 902 903 mtx_lock(&sc->lock); 904 if (sc->timer[timer] != 0) 905 sc->timer[timer] = 0; 906 mtx_unlock(&sc->lock); 907 908 return (timer); 909 } 910 911 /* 912 * emu_intr_ - HW interrupt handler management 913 */ 914 int 915 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc) 916 { 917 int i; 918 uint32_t x; 919 920 mtx_lock(&sc->lock); 921 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 922 if (sc->ihandler[i].inte_mask == 0) { 923 sc->ihandler[i].inte_mask = inte_mask; 924 sc->ihandler[i].intr_mask = intr_mask; 925 sc->ihandler[i].softc = isc; 926 sc->ihandler[i].irq_func = func; 927 x = emu_rd(sc, EMU_INTE, 4); 928 x |= inte_mask; 929 emu_wr(sc, EMU_INTE, x, 4); 930 mtx_unlock(&sc->lock); 931 if (sc->dbg_level > 1) 932 device_printf(sc->dev, "ihandle %d registered\n", i); 933 934 return (i); 935 } 936 mtx_unlock(&sc->lock); 937 if (sc->dbg_level > 1) 938 device_printf(sc->dev, "ihandle not registered\n"); 939 940 return (-1); 941 } 942 943 int 944 emu_intr_unregister(struct emu_sc_info *sc, int hnumber) 945 { 946 uint32_t x; 947 int i; 948 949 mtx_lock(&sc->lock); 950 951 if (sc->ihandler[hnumber].inte_mask == 0) { 952 mtx_unlock(&sc->lock); 953 return (-1); 954 } 955 956 x = emu_rd(sc, EMU_INTE, 4); 957 x &= ~sc->ihandler[hnumber].inte_mask; 958 959 sc->ihandler[hnumber].inte_mask = 0; 960 sc->ihandler[hnumber].intr_mask = 0; 961 sc->ihandler[hnumber].softc = NULL; 962 sc->ihandler[hnumber].irq_func = NULL; 963 964 /* other interrupt handlers may use this EMU_INTE value */ 965 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 966 if (sc->ihandler[i].inte_mask != 0) 967 x |= sc->ihandler[i].inte_mask; 968 969 emu_wr(sc, EMU_INTE, x, 4); 970 971 mtx_unlock(&sc->lock); 972 return (hnumber); 973 } 974 975 static void 976 emu_intr(void *p) 977 { 978 struct emu_sc_info *sc = (struct emu_sc_info *)p; 979 uint32_t stat, ack; 980 int i; 981 982 for (;;) { 983 stat = emu_rd(sc, EMU_IPR, 4); 984 ack = 0; 985 if (stat == 0) 986 break; 987 emu_wr(sc, EMU_IPR, stat, 4); 988 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 989 if ((((sc->ihandler[i].intr_mask) & stat) != 0) && 990 (((void *)sc->ihandler[i].irq_func) != NULL)) { 991 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc, 992 (sc->ihandler[i].intr_mask) & stat); 993 } 994 } 995 if (sc->dbg_level > 1) 996 if (stat & (~ack)) 997 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack)); 998 } 999 1000 if ((sc->is_ca0102) || (sc->is_ca0108)) 1001 for (;;) { 1002 stat = emu_rd(sc, EMU_IPR2, 4); 1003 ack = 0; 1004 if (stat == 0) 1005 break; 1006 emu_wr(sc, EMU_IPR2, stat, 4); 1007 if (sc->dbg_level > 1) 1008 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat); 1009 1010 break; /* to avoid infinite loop. should be removed 1011 * after completion of P16V interface. */ 1012 } 1013 1014 if (sc->is_ca0102) 1015 for (;;) { 1016 stat = emu_rd(sc, EMU_IPR3, 4); 1017 ack = 0; 1018 if (stat == 0) 1019 break; 1020 emu_wr(sc, EMU_IPR3, stat, 4); 1021 if (sc->dbg_level > 1) 1022 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat); 1023 1024 break; /* to avoid infinite loop. should be removed 1025 * after completion of S/PDIF interface */ 1026 } 1027 } 1028 1029 /* 1030 * Get data from private emu10kx structure for PCM buffer allocation. 1031 * Used by PCM code only. 1032 */ 1033 bus_dma_tag_t 1034 emu_gettag(struct emu_sc_info *sc) 1035 { 1036 return (sc->mem.dmat); 1037 } 1038 1039 static void 1040 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error) 1041 { 1042 bus_addr_t *phys = (bus_addr_t *) arg; 1043 1044 *phys = error ? 0 : (bus_addr_t) segs->ds_addr; 1045 1046 if (bootverbose) { 1047 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n", 1048 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1049 nseg, error); 1050 } 1051 } 1052 1053 static void * 1054 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, 1055 bus_dmamap_t *map) 1056 { 1057 void *dmabuf; 1058 int error; 1059 1060 *addr = 0; 1061 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) { 1062 if (mem->card->dbg_level > 2) 1063 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error); 1064 return (NULL); 1065 } 1066 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) { 1067 if (mem->card->dbg_level > 2) 1068 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error); 1069 bus_dmamem_free(mem->dmat, dmabuf, *map); 1070 return (NULL); 1071 } 1072 return (dmabuf); 1073 } 1074 1075 static void 1076 emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map) 1077 { 1078 bus_dmamap_unload(mem->dmat, map); 1079 bus_dmamem_free(mem->dmat, dmabuf, map); 1080 } 1081 1082 static void * 1083 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner) 1084 { 1085 uint32_t blksz, start, idx, ofs, tmp, found; 1086 struct emu_memblk *blk; 1087 void *membuf; 1088 1089 blksz = sz / EMUPAGESIZE; 1090 if (sz > (blksz * EMUPAGESIZE)) 1091 blksz++; 1092 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) { 1093 if (mem->card->dbg_level > 2) 1094 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n"); 1095 return (NULL); 1096 } 1097 /* find a free block in the bitmap */ 1098 found = 0; 1099 start = 1; 1100 while (!found && start + blksz < EMU_MAXPAGES) { 1101 found = 1; 1102 for (idx = start; idx < start + blksz; idx++) 1103 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1104 found = 0; 1105 if (!found) 1106 start++; 1107 } 1108 if (!found) { 1109 if (mem->card->dbg_level > 2) 1110 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n"); 1111 return (NULL); 1112 } 1113 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1114 if (blk == NULL) { 1115 if (mem->card->dbg_level > 2) 1116 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n"); 1117 return (NULL); 1118 } 1119 bzero(blk, sizeof(*blk)); 1120 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map); 1121 *addr = blk->buf_addr; 1122 if (membuf == NULL) { 1123 if (mem->card->dbg_level > 2) 1124 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n"); 1125 free(blk, M_DEVBUF); 1126 return (NULL); 1127 } 1128 blk->buf = membuf; 1129 blk->pte_start = start; 1130 blk->pte_size = blksz; 1131 strncpy(blk->owner, owner, 15); 1132 blk->owner[15] = '\0'; 1133 ofs = 0; 1134 for (idx = start; idx < start + blksz; idx++) { 1135 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1136 tmp = (uint32_t) (blk->buf_addr + ofs); 1137 mem->ptb_pages[idx] = (tmp << 1) | idx; 1138 ofs += EMUPAGESIZE; 1139 } 1140 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1141 return (membuf); 1142 } 1143 1144 static int 1145 emu_memfree(struct emu_mem *mem, void *membuf) 1146 { 1147 uint32_t idx, tmp; 1148 struct emu_memblk *blk, *i; 1149 1150 blk = NULL; 1151 SLIST_FOREACH(i, &mem->blocks, link) { 1152 if (i->buf == membuf) 1153 blk = i; 1154 } 1155 if (blk == NULL) 1156 return (EINVAL); 1157 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1158 emu_free(mem, membuf, blk->buf_map); 1159 tmp = (uint32_t) (mem->silent_page_addr) << 1; 1160 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1161 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1162 mem->ptb_pages[idx] = tmp | idx; 1163 } 1164 free(blk, M_DEVBUF); 1165 return (0); 1166 } 1167 1168 static int 1169 emu_memstart(struct emu_mem *mem, void *membuf) 1170 { 1171 struct emu_memblk *blk, *i; 1172 1173 blk = NULL; 1174 SLIST_FOREACH(i, &mem->blocks, link) { 1175 if (i->buf == membuf) 1176 blk = i; 1177 } 1178 if (blk == NULL) 1179 return (-1); 1180 return (blk->pte_start); 1181 } 1182 1183 static uint32_t 1184 emu_rate_to_pitch(uint32_t rate) 1185 { 1186 static uint32_t logMagTable[128] = { 1187 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 1188 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 1189 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 1190 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 1191 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 1192 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 1193 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 1194 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 1195 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 1196 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 1197 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 1198 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 1199 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 1200 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 1201 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 1202 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 1203 }; 1204 static char logSlopeTable[128] = { 1205 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 1206 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 1207 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 1208 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 1209 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 1210 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 1211 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 1212 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 1213 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 1214 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 1215 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 1216 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 1217 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 1218 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 1219 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 1220 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 1221 }; 1222 int i; 1223 1224 if (rate == 0) 1225 return (0); 1226 rate *= 11185; /* Scale 48000 to 0x20002380 */ 1227 for (i = 31; i > 0; i--) { 1228 if (rate & 0x80000000) { /* Detect leading "1" */ 1229 return (((uint32_t) (i - 15) << 20) + 1230 logMagTable[0x7f & (rate >> 24)] + 1231 (0x7f & (rate >> 17)) * 1232 logSlopeTable[0x7f & (rate >> 24)]); 1233 } 1234 rate <<= 1; 1235 } 1236 /* NOTREACHED */ 1237 return (0); 1238 } 1239 1240 static uint32_t 1241 emu_rate_to_linearpitch(uint32_t rate) 1242 { 1243 rate = (rate << 8) / 375; 1244 return ((rate >> 1) + (rate & 1)); 1245 } 1246 1247 struct emu_voice * 1248 emu_valloc(struct emu_sc_info *sc) 1249 { 1250 struct emu_voice *v; 1251 int i; 1252 1253 v = NULL; 1254 mtx_lock(&sc->lock); 1255 for (i = 0; i < NUM_G && sc->voice[i].busy; i++); 1256 if (i < NUM_G) { 1257 v = &sc->voice[i]; 1258 v->busy = 1; 1259 } 1260 mtx_unlock(&sc->lock); 1261 return (v); 1262 } 1263 1264 void 1265 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v) 1266 { 1267 1268 mtx_lock(&sc->lock); 1269 for (int i = 0; i < NUM_G; i++) { 1270 if (v == &sc->voice[i] && sc->voice[i].busy) { 1271 v->busy = 0; 1272 /* 1273 * XXX What we should do with mono channels? 1274 * See -pcm.c emupchan_init for other side of 1275 * this problem 1276 */ 1277 if (v->slave != NULL) 1278 emu_memfree(&sc->mem, v->vbuf); 1279 } 1280 } 1281 mtx_unlock(&sc->lock); 1282 } 1283 1284 int 1285 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, 1286 uint32_t sz, struct snd_dbuf *b) 1287 { 1288 void *vbuf; 1289 bus_addr_t tmp_addr; 1290 1291 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit"); 1292 if (vbuf == NULL) { 1293 if(sc->dbg_level > 2) 1294 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n"); 1295 return (ENOMEM); 1296 } 1297 if (b != NULL) 1298 sndbuf_setup(b, vbuf, sz); 1299 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE; 1300 if (m->start < 0) { 1301 if(sc->dbg_level > 2) 1302 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n"); 1303 emu_memfree(&sc->mem, vbuf); 1304 return (ENOMEM); 1305 } 1306 m->end = m->start + sz; 1307 m->speed = 0; 1308 m->b16 = 0; 1309 m->stereo = 0; 1310 m->running = 0; 1311 m->ismaster = 1; 1312 m->vol = 0xff; 1313 m->buf = tmp_addr; 1314 m->vbuf = vbuf; 1315 m->slave = s; 1316 if (s != NULL) { 1317 s->start = m->start; 1318 s->end = m->end; 1319 s->speed = 0; 1320 s->b16 = 0; 1321 s->stereo = 0; 1322 s->running = 0; 1323 s->ismaster = 0; 1324 s->vol = m->vol; 1325 s->buf = m->buf; 1326 s->vbuf = NULL; 1327 s->slave = NULL; 1328 } 1329 return (0); 1330 } 1331 1332 void 1333 emu_vsetup(struct emu_voice *v, int fmt, int spd) 1334 { 1335 if (fmt) { 1336 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0; 1337 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0; 1338 if (v->slave != NULL) { 1339 v->slave->b16 = v->b16; 1340 v->slave->stereo = v->stereo; 1341 } 1342 } 1343 if (spd) { 1344 v->speed = spd; 1345 if (v->slave != NULL) 1346 v->slave->speed = v->speed; 1347 } 1348 } 1349 1350 void 1351 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) 1352 { 1353 int i; 1354 1355 for (i = 0; i < 8; i++) { 1356 v->routing[i] = rt->routing_left[i]; 1357 v->amounts[i] = rt->amounts_left[i]; 1358 } 1359 if ((v->stereo) && (v->ismaster == 0)) 1360 for (i = 0; i < 8; i++) { 1361 v->routing[i] = rt->routing_right[i]; 1362 v->amounts[i] = rt->amounts_right[i]; 1363 } 1364 1365 if ((v->stereo) && (v->slave != NULL)) 1366 emu_vroute(sc, rt, v->slave); 1367 } 1368 1369 void 1370 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v) 1371 { 1372 int s; 1373 uint32_t start, val, silent_page; 1374 1375 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 1376 1377 v->sa = v->start >> s; 1378 v->ea = v->end >> s; 1379 1380 if (v->stereo) { 1381 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK); 1382 } else { 1383 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0); 1384 } 1385 val = v->stereo ? 28 : 30; 1386 val *= v->b16 ? 1 : 2; 1387 start = v->sa + val; 1388 1389 if (sc->is_emu10k1) { 1390 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) | 1391 (v->routing[2] << 8) | 1392 (v->routing[1] << 4) | 1393 (v->routing[0] << 0)) << 16); 1394 } else { 1395 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) | 1396 (v->routing[2] << 16) | 1397 (v->routing[1] << 8) | 1398 (v->routing[0] << 0)); 1399 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) | 1400 (v->routing[6] << 16) | 1401 (v->routing[5] << 8) | 1402 (v->routing[4] << 0)); 1403 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) | 1404 (v->amounts[6] << 26) | 1405 (v->amounts[5] << 8) | 1406 (v->amounts[4] << 0)); 1407 } 1408 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0)); 1409 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24)); 1410 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24)); 1411 1412 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); 1413 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); 1414 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); 1415 1416 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK; 1417 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); 1418 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); 1419 1420 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); 1421 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); 1422 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); 1423 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); 1424 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); 1425 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); 1426 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); 1427 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0); 1428 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0); 1429 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000); 1430 1431 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); 1432 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000); 1433 1434 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f); 1435 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0); 1436 if ((v->stereo) && (v->slave != NULL)) 1437 emu_vwrite(sc, v->slave); 1438 } 1439 1440 static void 1441 emu_vstop(struct emu_sc_info *sc, char channel, int enable) 1442 { 1443 int reg; 1444 1445 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL; 1446 channel &= 0x1f; 1447 reg |= 1 << 24; 1448 reg |= channel << 16; 1449 emu_wrptr(sc, 0, reg, enable); 1450 } 1451 1452 void 1453 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go) 1454 { 1455 uint32_t pitch_target, initial_pitch; 1456 uint32_t cra, cs, ccis; 1457 uint32_t sample, i; 1458 1459 if (go) { 1460 cra = 64; 1461 cs = v->stereo ? 4 : 2; 1462 ccis = v->stereo ? 28 : 30; 1463 ccis *= v->b16 ? 1 : 2; 1464 sample = v->b16 ? 0x00000000 : 0x80808080; 1465 for (i = 0; i < cs; i++) 1466 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample); 1467 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0); 1468 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra); 1469 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis); 1470 1471 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00); 1472 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff); 1473 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff); 1474 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f); 1475 emu_vstop(sc, v->vnum, 0); 1476 1477 pitch_target = emu_rate_to_linearpitch(v->speed); 1478 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 1479 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target); 1480 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target); 1481 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch); 1482 } else { 1483 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0); 1484 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0); 1485 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff); 1486 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff); 1487 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff); 1488 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0); 1489 emu_vstop(sc, v->vnum, 1); 1490 } 1491 if ((v->stereo) && (v->slave != NULL)) 1492 emu_vtrigger(sc, v->slave, go); 1493 } 1494 1495 int 1496 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v) 1497 { 1498 int s, ptr; 1499 1500 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 1501 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; 1502 return (ptr & ~0x0000001f); 1503 } 1504 1505 /* fx */ 1506 static void 1507 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data) 1508 { 1509 emu_wrptr(sc, 0, sc->code_base + pc, data); 1510 } 1511 1512 static void 1513 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc) 1514 { 1515 if ((*pc) + 1 > sc->code_size) { 1516 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc)); 1517 return; 1518 } 1519 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y); 1520 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); 1521 (*pc)++; 1522 } 1523 1524 static int 1525 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS) 1526 { 1527 struct emu_sc_info *sc; 1528 int mixer_id; 1529 int new_vol; 1530 int err; 1531 1532 sc = arg1; 1533 mixer_id = arg2; 1534 1535 new_vol = emumix_get_volume(sc, mixer_id); 1536 err = sysctl_handle_int(oidp, &new_vol, 0, req); 1537 1538 if (err || req->newptr == NULL) 1539 return (err); 1540 if (new_vol < 0 || new_vol > 100) 1541 return (EINVAL); 1542 emumix_set_volume(sc, mixer_id, new_vol); 1543 1544 return (0); 1545 } 1546 1547 static int 1548 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume) 1549 { 1550 int volgpr; 1551 char sysctl_name[32]; 1552 1553 volgpr = emu_rm_gpr_alloc(sc->rm, 1); 1554 emumix_set_fxvol(sc, volgpr, defvolume); 1555 /* 1556 * Mixer controls with NULL mix_name are handled 1557 * by AC97 emulation code or PCM mixer. 1558 */ 1559 if (mix_name != NULL) { 1560 /* 1561 * Temporary sysctls should start with underscore, 1562 * see freebsd-current mailing list, emu10kx driver 1563 * discussion around 2006-05-24. 1564 */ 1565 snprintf(sysctl_name, 32, "_%s", mix_name); 1566 SYSCTL_ADD_PROC(sc->ctx, 1567 SYSCTL_CHILDREN(sc->root), OID_AUTO, sysctl_name, 1568 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, mix_id, 1569 sysctl_emu_mixer_control, "I", ""); 1570 } 1571 1572 return (volgpr); 1573 } 1574 1575 static int 1576 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS) 1577 { 1578 struct emu_sc_info *sc; 1579 int new_val; 1580 int err; 1581 1582 sc = arg1; 1583 1584 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0; 1585 err = sysctl_handle_int(oidp, &new_val, 0, req); 1586 1587 if (err || req->newptr == NULL) 1588 return (err); 1589 if (new_val < 0 || new_val > 1) 1590 return (EINVAL); 1591 1592 switch (new_val) { 1593 case 0: 1594 emumix_set_mode(sc, MODE_ANALOG); 1595 break; 1596 case 1: 1597 emumix_set_mode(sc, MODE_DIGITAL); 1598 break; 1599 } 1600 return (0); 1601 } 1602 1603 static void 1604 emu_digitalswitch(struct emu_sc_info *sc) 1605 { 1606 /* XXX temporary? */ 1607 SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO, 1608 "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 1609 sc, 0, sysctl_emu_digitalswitch_control, "I", 1610 "Enable digital output"); 1611 1612 return; 1613 } 1614 1615 /* 1616 * Allocate cache GPRs that will hold mixed output channels 1617 * and clear it on every DSP run. 1618 */ 1619 #define EFX_CACHE(CACHE_IDX) do { \ 1620 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ 1621 emu_addefxop(sc, ACC3, \ 1622 GPR(sc->cache_gpr[CACHE_IDX]), \ 1623 DSP_CONST(0), \ 1624 DSP_CONST(0), \ 1625 DSP_CONST(0), \ 1626 &pc); \ 1627 } while (0) 1628 1629 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */ 1630 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \ 1631 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \ 1632 sc->mixer_volcache[IN_GPR_IDX] = DEF; \ 1633 emu_addefxop(sc, MACS, \ 1634 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1635 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1636 INP_NR, \ 1637 GPR(sc->mixer_gpr[IN_GPR_IDX]), \ 1638 &pc); \ 1639 } while (0) 1640 1641 /* allocate GPR, OUT = IN * VOL */ 1642 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \ 1643 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \ 1644 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ 1645 emu_addefxop(sc, MACS, \ 1646 OUTP(OUTP_NR), \ 1647 DSP_CONST(0), \ 1648 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1649 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1650 &pc); \ 1651 } while (0) 1652 1653 /* like EFX_OUTPUT, but don't allocate mixer gpr */ 1654 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \ 1655 emu_addefxop(sc, MACS, \ 1656 OUTP(OUTP_NR), \ 1657 DSP_CONST(0), \ 1658 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1659 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1660 &pc); \ 1661 } while (0) 1662 1663 /* skip next OPCOUNT instructions if FLAG != 0 */ 1664 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \ 1665 emu_addefxop(sc, MACS, \ 1666 DSP_CONST(0), \ 1667 GPR(sc->mute_gpr[FLAG_GPR]), \ 1668 DSP_CONST(0), \ 1669 DSP_CONST(0), \ 1670 &pc); \ 1671 emu_addefxop(sc, SKIP, \ 1672 DSP_CCR, \ 1673 DSP_CCR, \ 1674 COND_NEQ_ZERO, \ 1675 OPCOUNT, \ 1676 &pc); \ 1677 } while (0) 1678 1679 #define EFX_COPY(TO, FROM) do { \ 1680 emu_addefxop(sc, ACC3, \ 1681 TO, \ 1682 DSP_CONST(0), \ 1683 DSP_CONST(0), \ 1684 FROM, \ 1685 &pc); \ 1686 } while (0) 1687 1688 static void 1689 emu_initefx(struct emu_sc_info *sc) 1690 { 1691 unsigned int i; 1692 uint32_t pc; 1693 1694 /* stop DSP */ 1695 if (sc->is_emu10k1) { 1696 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP); 1697 } else { 1698 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP); 1699 } 1700 1701 /* code size is in instructions */ 1702 pc = 0; 1703 for (i = 0; i < sc->code_size; i++) { 1704 if (sc->is_emu10k1) { 1705 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc); 1706 } else { 1707 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc); 1708 } 1709 } 1710 1711 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */ 1712 for (i = 0; i < NUM_MUTE; i++) { 1713 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1); 1714 emumix_set_gpr(sc, sc->mute_gpr[i], 1); 1715 } 1716 emu_digitalswitch(sc); 1717 1718 pc = 0; 1719 1720 /* 1721 * DSP code below is not good, because: 1722 * 1. It can be written smaller, if it can use DSP accumulator register 1723 * instead of cache_gpr[]. 1724 * 2. It can be more careful when volume is 100%, because in DSP 1725 * x*0x7fffffff may not be equal to x ! 1726 */ 1727 1728 /* clean outputs */ 1729 for (i = 0; i < 16 ; i++) { 1730 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); 1731 } 1732 1733 if (sc->is_emu10k1) { 1734 EFX_CACHE(C_FRONT_L); 1735 EFX_CACHE(C_FRONT_R); 1736 EFX_CACHE(C_REC_L); 1737 EFX_CACHE(C_REC_R); 1738 1739 /* fx0 to front/record, 100%/muted by default */ 1740 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1741 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1742 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1743 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1744 1745 /* in0, from AC97 codec output */ 1746 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0); 1747 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0); 1748 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1749 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1750 1751 /* in1, from CD S/PDIF */ 1752 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */ 1753 EFX_SKIP(4, CDSPDIFMUTE); 1754 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1755 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1756 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1757 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1758 1759 if (sc->dbg_level > 0) { 1760 /* in2, ZoomVide (???) */ 1761 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1762 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1763 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0); 1764 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0); 1765 } 1766 1767 /* in3, TOSLink */ 1768 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0); 1769 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0); 1770 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0); 1771 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0); 1772 /* in4, LineIn */ 1773 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1774 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1775 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0); 1776 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0); 1777 1778 /* in5, on-card S/PDIF */ 1779 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1780 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1781 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1782 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1783 1784 /* in6, Line2 on Live!Drive */ 1785 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1786 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1787 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0); 1788 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0); 1789 1790 if (sc->dbg_level > 0) { 1791 /* in7, unknown */ 1792 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 1793 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 1794 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 1795 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 1796 } 1797 1798 /* analog and digital */ 1799 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100); 1800 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100); 1801 /* S/PDIF */ 1802 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L); 1803 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R); 1804 /* Headphones */ 1805 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L); 1806 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R); 1807 1808 /* rec output to "ADC" */ 1809 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100); 1810 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100); 1811 1812 if (!(sc->mch_disabled)) { 1813 /* 1814 * Additional channel volume is controlled by mixer in 1815 * emu_dspmixer_set() in -pcm.c 1816 */ 1817 1818 /* fx2/3 (pcm1) to rear */ 1819 EFX_CACHE(C_REAR_L); 1820 EFX_CACHE(C_REAR_R); 1821 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 1822 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 1823 1824 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100); 1825 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100); 1826 if (sc->has_51) { 1827 /* fx4 (pcm2) to center */ 1828 EFX_CACHE(C_CENTER); 1829 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 1830 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1831 1832 /* XXX in digital mode (default) this should be muted because 1833 this output is shared with digital out */ 1834 EFX_SKIP(1, ANALOGMUTE); 1835 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1836 1837 /* fx5 (pcm3) to sub */ 1838 EFX_CACHE(C_SUB); 1839 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 1840 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1841 1842 /* XXX in digital mode (default) this should be muted because 1843 this output is shared with digital out */ 1844 EFX_SKIP(1, ANALOGMUTE); 1845 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1846 } 1847 } else { 1848 /* SND_EMU10KX_MULTICHANNEL_DISABLED */ 1849 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */ 1850 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */ 1851 1852 #if 0 1853 /* XXX 5.1 does not work */ 1854 1855 if (sc->has_51) { 1856 /* (fx0+fx1)/2 to center */ 1857 EFX_CACHE(C_CENTER); 1858 emu_addefxop(sc, MACS, 1859 GPR(sc->cache_gpr[C_CENTER]), 1860 GPR(sc->cache_gpr[C_CENTER]), 1861 DSP_CONST(0xd), /* = 1/2 */ 1862 GPR(sc->cache_gpr[C_FRONT_L]), 1863 &pc); 1864 emu_addefxop(sc, MACS, 1865 GPR(sc->cache_gpr[C_CENTER]), 1866 GPR(sc->cache_gpr[C_CENTER]), 1867 DSP_CONST(0xd), /* = 1/2 */ 1868 GPR(sc->cache_gpr[C_FRONT_R]), 1869 &pc); 1870 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1871 1872 /* XXX in digital mode (default) this should be muted because 1873 this output is shared with digital out */ 1874 EFX_SKIP(1, ANALOGMUTE); 1875 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1876 1877 /* (fx0+fx1)/2 to sub */ 1878 EFX_CACHE(C_SUB); 1879 emu_addefxop(sc, MACS, 1880 GPR(sc->cache_gpr[C_CENTER]), 1881 GPR(sc->cache_gpr[C_CENTER]), 1882 DSP_CONST(0xd), /* = 1/2 */ 1883 GPR(sc->cache_gpr[C_FRONT_L]), 1884 &pc); 1885 emu_addefxop(sc, MACS, 1886 GPR(sc->cache_gpr[C_CENTER]), 1887 GPR(sc->cache_gpr[C_CENTER]), 1888 DSP_CONST(0xd), /* = 1/2 */ 1889 GPR(sc->cache_gpr[C_FRONT_R]), 1890 &pc); 1891 /* XXX add lowpass filter here */ 1892 1893 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1894 1895 /* XXX in digital mode (default) this should be muted because 1896 this output is shared with digital out */ 1897 EFX_SKIP(1, ANALOGMUTE); 1898 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1899 } 1900 #endif 1901 } /* !mch_disabled */ 1902 if (sc->mch_rec) { 1903 /* 1904 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots 1905 * are used as outputs and already filled with data 1906 */ 1907 /* 1908 * XXX On Live! cards stream does not begin at zero offset. 1909 * It can be HW, driver or sound buffering problem. 1910 * Use sync substream (offset 0x3E) to let userland find 1911 * correct data. 1912 */ 1913 1914 /* 1915 * Substream map (in byte offsets, each substream is 2 bytes): 1916 * 0x00..0x1E - outputs 1917 * 0x20..0x3E - FX, inputs and sync stream 1918 */ 1919 1920 /* First 2 channels (offset 0x20,0x22) are empty */ 1921 for(i = (sc->has_51 ? 2 : 0); i < 2; i++) 1922 EFX_COPY(FX2(i), DSP_CONST(0)); 1923 1924 /* PCM Playback monitoring, offset 0x24..0x2A */ 1925 for(i = 0; i < 4; i++) 1926 EFX_COPY(FX2(i+2), FX(i)); 1927 1928 /* Copy of some inputs, offset 0x2C..0x3C */ 1929 for(i = 0; i < 9; i++) 1930 EFX_COPY(FX2(i+8), INP(i)); 1931 1932 /* sync data (0xc0de, offset 0x3E) */ 1933 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 1934 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 1935 1936 EFX_COPY(FX2(15), GPR(sc->dummy_gpr)); 1937 } /* mch_rec */ 1938 } else /* emu10k2 and later */ { 1939 EFX_CACHE(C_FRONT_L); 1940 EFX_CACHE(C_FRONT_R); 1941 EFX_CACHE(C_REC_L); 1942 EFX_CACHE(C_REC_R); 1943 1944 /* fx0 to front/record, 100%/muted by default */ 1945 /* 1946 * FRONT_[L|R] is controlled by AC97 emulation in 1947 * emu_ac97_[read|write]_emulation in -pcm.c 1948 */ 1949 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1950 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1951 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1952 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1953 1954 /* in0, from AC97 codec output */ 1955 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100); 1956 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100); 1957 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1958 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1959 1960 /* in1, from CD S/PDIF */ 1961 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1962 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1963 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1964 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1965 1966 /* in2, optical & coax S/PDIF on AudigyDrive*/ 1967 /* XXX Should be muted when GPRSCS valid stream == 0 */ 1968 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1969 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1970 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0); 1971 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0); 1972 1973 if (sc->dbg_level > 0) { 1974 /* in3, unknown */ 1975 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0); 1976 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0); 1977 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0); 1978 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0); 1979 } 1980 1981 /* in4, LineIn 2 on AudigyDrive */ 1982 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1983 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1984 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0); 1985 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0); 1986 1987 /* in5, on-card S/PDIF */ 1988 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1989 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1990 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1991 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1992 1993 /* in6, AUX2 on AudigyDrive */ 1994 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1995 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1996 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0); 1997 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0); 1998 1999 if (sc->dbg_level > 0) { 2000 /* in7, unknown */ 2001 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 2002 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 2003 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 2004 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 2005 } 2006 2007 /* front output to headphones and alog and digital *front */ 2008 /* volume controlled by AC97 emulation */ 2009 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100); 2010 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100); 2011 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L); 2012 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R); 2013 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L); 2014 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R); 2015 2016 /* rec output to "ADC" */ 2017 /* volume controlled by AC97 emulation */ 2018 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100); 2019 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100); 2020 2021 if (!(sc->mch_disabled)) { 2022 /* 2023 * Additional channel volume is controlled by mixer in 2024 * emu_dspmixer_set() in -pcm.c 2025 */ 2026 2027 /* fx2/3 (pcm1) to rear */ 2028 EFX_CACHE(C_REAR_L); 2029 EFX_CACHE(C_REAR_R); 2030 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 2031 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 2032 2033 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100); 2034 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100); 2035 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L); 2036 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R); 2037 2038 /* fx4 (pcm2) to center */ 2039 EFX_CACHE(C_CENTER); 2040 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 2041 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2042 #if 0 2043 /* 2044 * XXX in digital mode (default) this should be muted 2045 * because this output is shared with digital out 2046 */ 2047 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2048 #endif 2049 /* fx5 (pcm3) to sub */ 2050 EFX_CACHE(C_SUB); 2051 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 2052 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2053 #if 0 2054 /* 2055 * XXX in digital mode (default) this should be muted 2056 * because this output is shared with digital out 2057 */ 2058 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2059 #endif 2060 if (sc->has_71) { 2061 /* XXX this will broke headphones on AudigyDrive */ 2062 /* fx6/7 (pcm4) to side */ 2063 EFX_CACHE(C_SIDE_L); 2064 EFX_CACHE(C_SIDE_R); 2065 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100); 2066 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100); 2067 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100); 2068 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100); 2069 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L); 2070 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R); 2071 } 2072 } else { /* mch_disabled */ 2073 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L); 2074 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R); 2075 2076 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L); 2077 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R); 2078 2079 if (sc->has_51) { 2080 /* (fx0+fx1)/2 to center */ 2081 EFX_CACHE(C_CENTER); 2082 emu_addefxop(sc, MACS, 2083 GPR(sc->cache_gpr[C_CENTER]), 2084 GPR(sc->cache_gpr[C_CENTER]), 2085 DSP_CONST(0xd), /* = 1/2 */ 2086 GPR(sc->cache_gpr[C_FRONT_L]), 2087 &pc); 2088 emu_addefxop(sc, MACS, 2089 GPR(sc->cache_gpr[C_CENTER]), 2090 GPR(sc->cache_gpr[C_CENTER]), 2091 DSP_CONST(0xd), /* = 1/2 */ 2092 GPR(sc->cache_gpr[C_FRONT_R]), 2093 &pc); 2094 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2095 2096 /* XXX in digital mode (default) this should be muted because 2097 this output is shared with digital out */ 2098 EFX_SKIP(1, ANALOGMUTE); 2099 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2100 2101 /* (fx0+fx1)/2 to sub */ 2102 EFX_CACHE(C_SUB); 2103 emu_addefxop(sc, MACS, 2104 GPR(sc->cache_gpr[C_SUB]), 2105 GPR(sc->cache_gpr[C_SUB]), 2106 DSP_CONST(0xd), /* = 1/2 */ 2107 GPR(sc->cache_gpr[C_FRONT_L]), 2108 &pc); 2109 emu_addefxop(sc, MACS, 2110 GPR(sc->cache_gpr[C_SUB]), 2111 GPR(sc->cache_gpr[C_SUB]), 2112 DSP_CONST(0xd), /* = 1/2 */ 2113 GPR(sc->cache_gpr[C_FRONT_R]), 2114 &pc); 2115 /* XXX add lowpass filter here */ 2116 2117 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2118 2119 /* XXX in digital mode (default) this should be muted because 2120 this output is shared with digital out */ 2121 EFX_SKIP(1, ANALOGMUTE); 2122 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2123 } 2124 } /* mch_disabled */ 2125 if (sc->mch_rec) { 2126 /* MCH RECORDING, high 32 slots */ 2127 2128 /* 2129 * Stream map (in byte offsets): 2130 * 0x00..0x3E - outputs 2131 * 0x40..0x7E - FX, inputs 2132 * each substream is 2 bytes. 2133 */ 2134 /* 2135 * XXX Audigy 2 Value cards (and, possibly, 2136 * Audigy 4) write some unknown data in place of 2137 * some outputs (offsets 0x20..0x3F) and one 2138 * input (offset 0x7E). 2139 */ 2140 2141 /* PCM Playback monitoring, offsets 0x40..0x5E */ 2142 for(i = 0; i < 16; i++) 2143 EFX_COPY(FX2(i), FX(i)); 2144 2145 /* Copy of all inputs, offsets 0x60..0x7E */ 2146 for(i = 0; i < 16; i++) 2147 EFX_COPY(FX2(i+16), INP(i)); 2148 #if 0 2149 /* XXX Audigy seems to work correct and does not need this */ 2150 /* sync data (0xc0de), offset 0x7E */ 2151 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 2152 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 2153 EFX_COPY(FX2(31), GPR(sc->dummy_gpr)); 2154 #endif 2155 } /* mch_rec */ 2156 } 2157 2158 sc->routing_code_end = pc; 2159 2160 /* start DSP */ 2161 if (sc->is_emu10k1) { 2162 emu_wrptr(sc, 0, EMU_DBG, 0); 2163 } else { 2164 emu_wrptr(sc, 0, EMU_A_DBG, 0); 2165 } 2166 } 2167 2168 /* /dev/em10kx */ 2169 static d_open_t emu10kx_open; 2170 static d_close_t emu10kx_close; 2171 static d_read_t emu10kx_read; 2172 2173 static struct cdevsw emu10kx_cdevsw = { 2174 .d_open = emu10kx_open, 2175 .d_close = emu10kx_close, 2176 .d_read = emu10kx_read, 2177 .d_name = "emu10kx", 2178 .d_version = D_VERSION, 2179 }; 2180 2181 static int 2182 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2183 { 2184 int error; 2185 struct emu_sc_info *sc; 2186 2187 sc = i_dev->si_drv1; 2188 mtx_lock(&sc->emu10kx_lock); 2189 if (sc->emu10kx_isopen) { 2190 mtx_unlock(&sc->emu10kx_lock); 2191 return (EBUSY); 2192 } 2193 sc->emu10kx_isopen = 1; 2194 mtx_unlock(&sc->emu10kx_lock); 2195 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) { 2196 error = ENXIO; 2197 goto out; 2198 } 2199 sc->emu10kx_bufptr = 0; 2200 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM; 2201 out: 2202 if (error) { 2203 mtx_lock(&sc->emu10kx_lock); 2204 sc->emu10kx_isopen = 0; 2205 mtx_unlock(&sc->emu10kx_lock); 2206 } 2207 return (error); 2208 } 2209 2210 static int 2211 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2212 { 2213 struct emu_sc_info *sc; 2214 2215 sc = i_dev->si_drv1; 2216 2217 mtx_lock(&sc->emu10kx_lock); 2218 if (!(sc->emu10kx_isopen)) { 2219 mtx_unlock(&sc->emu10kx_lock); 2220 return (EBADF); 2221 } 2222 sbuf_delete(&sc->emu10kx_sbuf); 2223 sc->emu10kx_isopen = 0; 2224 mtx_unlock(&sc->emu10kx_lock); 2225 2226 return (0); 2227 } 2228 2229 static int 2230 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused) 2231 { 2232 int l, err; 2233 struct emu_sc_info *sc; 2234 2235 sc = i_dev->si_drv1; 2236 mtx_lock(&sc->emu10kx_lock); 2237 if (!(sc->emu10kx_isopen)) { 2238 mtx_unlock(&sc->emu10kx_lock); 2239 return (EBADF); 2240 } 2241 mtx_unlock(&sc->emu10kx_lock); 2242 2243 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); 2244 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0; 2245 sc->emu10kx_bufptr += l; 2246 2247 return (err); 2248 } 2249 2250 static int 2251 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s) 2252 { 2253 int i; 2254 2255 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n"); 2256 sbuf_printf(s, "\nHardware resource usage:\n"); 2257 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs); 2258 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size); 2259 sbuf_printf(s, "Card supports"); 2260 if (sc->has_ac97) { 2261 sbuf_printf(s, " AC97 codec"); 2262 } else { 2263 sbuf_printf(s, " NO AC97 codec"); 2264 } 2265 if (sc->has_51) { 2266 if (sc->has_71) 2267 sbuf_printf(s, " and 7.1 output"); 2268 else 2269 sbuf_printf(s, " and 5.1 output"); 2270 } 2271 if (sc->is_emu10k1) 2272 sbuf_printf(s, ", SBLive! DSP code"); 2273 if (sc->is_emu10k2) 2274 sbuf_printf(s, ", Audigy DSP code"); 2275 if (sc->is_ca0102) 2276 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks"); 2277 if (sc->is_ca0108) 2278 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks"); 2279 sbuf_printf(s, "\n"); 2280 if (sc->broken_digital) 2281 sbuf_printf(s, "Digital mode unsupported\n"); 2282 sbuf_printf(s, "\nInstalled devices:\n"); 2283 for (i = 0; i < RT_COUNT; i++) 2284 if (sc->pcm[i] != NULL) 2285 if (device_is_attached(sc->pcm[i])) { 2286 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i])); 2287 } 2288 if (sc->midi[0] != NULL) 2289 if (device_is_attached(sc->midi[0])) { 2290 sbuf_printf(s, "EMU10Kx MIDI Interface\n"); 2291 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0])); 2292 } 2293 if (sc->midi[1] != NULL) 2294 if (device_is_attached(sc->midi[1])) { 2295 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1])); 2296 } 2297 if (sc->midi[0] != NULL) 2298 if (device_is_attached(sc->midi[0])) { 2299 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled"); 2300 } 2301 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital"); 2302 2303 sbuf_finish(s); 2304 return (sbuf_len(s)); 2305 } 2306 2307 /* INIT & UNINIT */ 2308 static int 2309 emu10kx_dev_init(struct emu_sc_info *sc) 2310 { 2311 int unit; 2312 2313 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0); 2314 unit = device_get_unit(sc->dev); 2315 2316 sc->cdev = make_dev(&emu10kx_cdevsw, unit, UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit); 2317 if (sc->cdev != NULL) { 2318 sc->cdev->si_drv1 = sc; 2319 return (0); 2320 } 2321 return (ENXIO); 2322 } 2323 2324 static int 2325 emu10kx_dev_uninit(struct emu_sc_info *sc) 2326 { 2327 mtx_lock(&sc->emu10kx_lock); 2328 if (sc->emu10kx_isopen) { 2329 mtx_unlock(&sc->emu10kx_lock); 2330 return (EBUSY); 2331 } 2332 if (sc->cdev) 2333 destroy_dev(sc->cdev); 2334 sc->cdev = NULL; 2335 2336 mtx_destroy(&sc->emu10kx_lock); 2337 return (0); 2338 } 2339 2340 /* resource manager */ 2341 int 2342 emu_rm_init(struct emu_sc_info *sc) 2343 { 2344 int i; 2345 int maxcount; 2346 struct emu_rm *rm; 2347 2348 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO); 2349 if (rm == NULL) { 2350 return (ENOMEM); 2351 } 2352 sc->rm = rm; 2353 rm->card = sc; 2354 maxcount = sc->num_gprs; 2355 rm->num_used = 0; 2356 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF); 2357 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR); 2358 for (i = 0; i < rm->num_gprs; i++) 2359 rm->allocmap[i] = 0; 2360 /* pre-allocate gpr[0] */ 2361 rm->allocmap[0] = 1; 2362 rm->last_free_gpr = 1; 2363 2364 return (0); 2365 } 2366 2367 int 2368 emu_rm_uninit(struct emu_sc_info *sc) 2369 { 2370 int i; 2371 2372 if (sc->dbg_level > 1) { 2373 mtx_lock(&(sc->rm->gpr_lock)); 2374 for (i = 1; i < sc->rm->last_free_gpr; i++) 2375 if (sc->rm->allocmap[i] > 0) 2376 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i); 2377 mtx_unlock(&(sc->rm->gpr_lock)); 2378 } 2379 2380 mtx_destroy(&(sc->rm->gpr_lock)); 2381 free(sc->rm, M_DEVBUF); 2382 return (0); 2383 } 2384 2385 static int 2386 emu_rm_gpr_alloc(struct emu_rm *rm, int count) 2387 { 2388 int i, j; 2389 int allocated_gpr; 2390 2391 allocated_gpr = rm->num_gprs; 2392 /* try fast way first */ 2393 mtx_lock(&(rm->gpr_lock)); 2394 if (rm->last_free_gpr + count <= rm->num_gprs) { 2395 allocated_gpr = rm->last_free_gpr; 2396 rm->last_free_gpr += count; 2397 rm->allocmap[allocated_gpr] = count; 2398 for (i = 1; i < count; i++) 2399 rm->allocmap[allocated_gpr + i] = -(count - i); 2400 } else { 2401 /* longer */ 2402 i = 0; 2403 allocated_gpr = rm->num_gprs; 2404 while (i < rm->last_free_gpr - count) { 2405 if (rm->allocmap[i] > 0) { 2406 i += rm->allocmap[i]; 2407 } else { 2408 allocated_gpr = i; 2409 for (j = 1; j < count; j++) { 2410 if (rm->allocmap[i + j] != 0) 2411 allocated_gpr = rm->num_gprs; 2412 } 2413 if (allocated_gpr == i) 2414 break; 2415 } 2416 } 2417 if (allocated_gpr + count < rm->last_free_gpr) { 2418 rm->allocmap[allocated_gpr] = count; 2419 for (i = 1; i < count; i++) 2420 rm->allocmap[allocated_gpr + i] = -(count - i); 2421 } 2422 } 2423 if (allocated_gpr == rm->num_gprs) 2424 allocated_gpr = (-1); 2425 if (allocated_gpr >= 0) 2426 rm->num_used += count; 2427 mtx_unlock(&(rm->gpr_lock)); 2428 return (allocated_gpr); 2429 } 2430 2431 /* mixer */ 2432 void 2433 emumix_set_mode(struct emu_sc_info *sc, int mode) 2434 { 2435 uint32_t a_iocfg; 2436 uint32_t hcfg; 2437 uint32_t tmp; 2438 2439 switch (mode) { 2440 case MODE_DIGITAL: 2441 /* FALLTHROUGH */ 2442 case MODE_ANALOG: 2443 break; 2444 default: 2445 return; 2446 } 2447 2448 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 2449 a_iocfg = 0; 2450 2451 if (sc->rev >= 6) 2452 hcfg |= EMU_HCFG_JOYENABLE; 2453 2454 if (sc->is_emu10k1) 2455 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 2456 else 2457 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE; 2458 2459 if (mode == MODE_DIGITAL) { 2460 if (sc->broken_digital) { 2461 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n"); 2462 } 2463 a_iocfg |= EMU_A_IOCFG_GPOUT1; 2464 hcfg |= EMU_HCFG_GPOUT0; 2465 } 2466 2467 if (mode == MODE_ANALOG) 2468 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2469 2470 if (sc->is_emu10k2) 2471 a_iocfg |= 0x80; /* XXX */ 2472 2473 if ((sc->is_ca0102) || (sc->is_ca0108)) 2474 /* 2475 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things 2476 * on diffrerent cards. 2477 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108) 2478 * "disable analog outs" on Audigy (emu10k2) 2479 */ 2480 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG; 2481 2482 if (sc->is_ca0108) 2483 a_iocfg |= 0x20; /* XXX */ 2484 2485 /* Mute analog center & subwoofer before mode change */ 2486 if (mode == MODE_DIGITAL) 2487 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1); 2488 2489 emu_wr(sc, EMU_HCFG, hcfg, 4); 2490 2491 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2492 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2493 tmp = a_iocfg; 2494 emu_wr(sc, EMU_A_IOCFG, tmp, 2); 2495 } 2496 2497 /* Unmute if we have changed mode to analog. */ 2498 2499 if (mode == MODE_ANALOG) 2500 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0); 2501 2502 sc->mode = mode; 2503 } 2504 2505 void 2506 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode) 2507 { 2508 uint32_t spcs; 2509 2510 switch (mode) { 2511 case SPDIF_MODE_PCM: 2512 break; 2513 case SPDIF_MODE_AC3: 2514 device_printf(sc->dev, "AC3 mode does not work and disabled\n"); 2515 return; 2516 default: 2517 return; 2518 } 2519 2520 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 | 2521 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC | 2522 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 2523 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT; 2524 2525 mode = SPDIF_MODE_PCM; 2526 2527 emu_wrptr(sc, 0, EMU_SPCS0, spcs); 2528 emu_wrptr(sc, 0, EMU_SPCS1, spcs); 2529 emu_wrptr(sc, 0, EMU_SPCS2, spcs); 2530 } 2531 2532 #define L2L_POINTS 10 2533 2534 static int l2l_df[L2L_POINTS] = { 2535 0x572C5CA, /* 100..90 */ 2536 0x3211625, /* 90..80 */ 2537 0x1CC1A76, /* 80..70 */ 2538 0x108428F, /* 70..60 */ 2539 0x097C70A, /* 60..50 */ 2540 0x0572C5C, /* 50..40 */ 2541 0x0321162, /* 40..30 */ 2542 0x01CC1A7, /* 30..20 */ 2543 0x0108428, /* 20..10 */ 2544 0x016493D /* 10..0 */ 2545 }; 2546 2547 static int l2l_f[L2L_POINTS] = { 2548 0x4984461A, /* 90 */ 2549 0x2A3968A7, /* 80 */ 2550 0x18406003, /* 70 */ 2551 0x0DEDC66D, /* 60 */ 2552 0x07FFFFFF, /* 50 */ 2553 0x04984461, /* 40 */ 2554 0x02A3968A, /* 30 */ 2555 0x01840600, /* 20 */ 2556 0x00DEDC66, /* 10 */ 2557 0x00000000 /* 0 */ 2558 }; 2559 2560 static int 2561 log2lin(int log_t) 2562 { 2563 int lin_t; 2564 int idx, lin; 2565 2566 if (log_t <= 0) { 2567 lin_t = 0x00000000; 2568 return (lin_t); 2569 } 2570 2571 if (log_t >= 100) { 2572 lin_t = 0x7fffffff; 2573 return (lin_t); 2574 } 2575 2576 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS); 2577 lin = log_t % (L2L_POINTS); 2578 lin_t = l2l_df[idx] * lin + l2l_f[idx]; 2579 return (lin_t); 2580 } 2581 2582 void 2583 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol) 2584 { 2585 2586 vol = log2lin(vol); 2587 emumix_set_gpr(sc, gpr, vol); 2588 } 2589 2590 void 2591 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val) 2592 { 2593 if (sc->dbg_level > 1) 2594 if (gpr == 0) { 2595 device_printf(sc->dev, "Zero gpr write access\n"); 2596 #ifdef KDB 2597 kdb_backtrace(); 2598 #endif 2599 return; 2600 } 2601 2602 emu_wrptr(sc, 0, GPR(gpr), val); 2603 } 2604 2605 void 2606 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume) 2607 { 2608 2609 RANGE(volume, 0, 100); 2610 if (mixer_idx < NUM_MIXERS) { 2611 sc->mixer_volcache[mixer_idx] = volume; 2612 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume); 2613 } 2614 } 2615 2616 int 2617 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx) 2618 { 2619 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0)) 2620 return (sc->mixer_volcache[mixer_idx]); 2621 return (-1); 2622 } 2623 2624 /* Init CardBus part */ 2625 static int 2626 emu_cardbus_init(struct emu_sc_info *sc) 2627 { 2628 2629 /* 2630 * XXX May not need this if we have EMU_IPR3 handler. 2631 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments? 2632 * Looks much like "(data << 16) | register". 2633 */ 2634 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000); 2635 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001); 2636 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f); 2637 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f); 2638 2639 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f); 2640 2641 return (0); 2642 } 2643 2644 /* Probe and attach the card */ 2645 static int 2646 emu_init(struct emu_sc_info *sc) 2647 { 2648 uint32_t ch, tmp; 2649 uint32_t spdif_sr; 2650 uint32_t ac97slot; 2651 int def_mode; 2652 int i; 2653 2654 /* disable audio and lock cache */ 2655 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2656 2657 /* reset recording buffers */ 2658 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2659 emu_wrptr(sc, 0, EMU_MICBA, 0); 2660 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2661 emu_wrptr(sc, 0, EMU_FXBA, 0); 2662 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2663 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2664 2665 /* disable channel interrupt */ 2666 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4); 2667 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2668 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2669 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2670 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2671 2672 /* disable P16V and S/PDIF interrupts */ 2673 if ((sc->is_ca0102) || (sc->is_ca0108)) 2674 emu_wr(sc, EMU_INTE2, 0, 4); 2675 2676 if (sc->is_ca0102) 2677 emu_wr(sc, EMU_INTE3, 0, 4); 2678 2679 /* init phys inputs and outputs */ 2680 ac97slot = 0; 2681 if (sc->has_51) 2682 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE; 2683 if (sc->has_71) 2684 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; 2685 if (sc->is_emu10k2) 2686 ac97slot |= 0x40; 2687 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot); 2688 2689 if (sc->is_emu10k2) /* XXX for later cards? */ 2690 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if 2691 * we write 1 here? */ 2692 2693 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev), 2694 /* alignment */ 2, /* boundary */ 0, 2695 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ 2696 /* highaddr */ BUS_SPACE_MAXADDR, 2697 /* filter */ NULL, /* filterarg */ NULL, 2698 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff, 2699 /* flags */ 0, /* lockfunc */NULL, /* lockarg */NULL, 2700 &sc->mem.dmat) != 0) { 2701 device_printf(sc->dev, "unable to create dma tag\n"); 2702 bus_dma_tag_destroy(sc->mem.dmat); 2703 return (ENOMEM); 2704 } 2705 2706 sc->mem.card = sc; 2707 SLIST_INIT(&sc->mem.blocks); 2708 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map); 2709 if (sc->mem.ptb_pages == NULL) 2710 return (ENOMEM); 2711 2712 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map); 2713 if (sc->mem.silent_page == NULL) { 2714 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2715 return (ENOMEM); 2716 } 2717 /* Clear page with silence & setup all pointers to this page */ 2718 bzero(sc->mem.silent_page, EMUPAGESIZE); 2719 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1; 2720 for (i = 0; i < EMU_MAXPAGES; i++) 2721 sc->mem.ptb_pages[i] = tmp | i; 2722 2723 for (ch = 0; ch < NUM_G; ch++) { 2724 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK); 2725 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK); 2726 } 2727 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); 2728 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ 2729 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ 2730 2731 /* init envelope engine */ 2732 for (ch = 0; ch < NUM_G; ch++) { 2733 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2734 emu_wrptr(sc, ch, EMU_CHAN_IP, 0); 2735 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff); 2736 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff); 2737 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2738 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2739 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0); 2740 2741 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0); 2742 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10); 2743 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0); 2744 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0); 2745 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0); 2746 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000); 2747 2748 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0); 2749 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0); 2750 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); 2751 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); 2752 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); 2753 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ 2754 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ 2755 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); 2756 2757 /*** these are last so OFF prevents writing ***/ 2758 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0); 2759 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0); 2760 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0); 2761 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0); 2762 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0); 2763 2764 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2765 emu_wrptr(sc, ch, 0x4c, 0x0); 2766 emu_wrptr(sc, ch, 0x4d, 0x0); 2767 emu_wrptr(sc, ch, 0x4e, 0x0); 2768 emu_wrptr(sc, ch, 0x4f, 0x0); 2769 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f); 2770 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f); 2771 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0); 2772 } 2773 } 2774 2775 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2776 2777 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2778 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000); 2779 2780 /* 2781 * CAxxxx cards needs additional setup: 2782 * 1. Set I2S capture sample rate to 96000 2783 * 2. Disable P16v / P17v proceesing 2784 * 3. Allow EMU10K DSP inputs 2785 */ 2786 if ((sc->is_ca0102) || (sc->is_ca0108)) { 2787 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE); 2788 spdif_sr &= 0xfffff1ff; 2789 spdif_sr |= EMU_A_I2S_CAPTURE_96000; 2790 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr); 2791 2792 /* Disable P16v processing */ 2793 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14); 2794 2795 /* Setup P16v/P17v sound routing */ 2796 if (sc->is_ca0102) 2797 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00); 2798 else { 2799 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000); 2800 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000); 2801 2802 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2803 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2); 2804 } 2805 } 2806 emu_initefx(sc); 2807 2808 def_mode = MODE_ANALOG; 2809 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2810 def_mode = MODE_DIGITAL; 2811 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) { 2812 device_printf(sc->dev, "Audigy card initialized in analog mode.\n"); 2813 def_mode = MODE_ANALOG; 2814 } 2815 emumix_set_mode(sc, def_mode); 2816 2817 if (bootverbose) { 2818 tmp = emu_rd(sc, EMU_HCFG, 4); 2819 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp); 2820 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", 2821 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""), 2822 (tmp & 0x40000000 ? "[0x40] " : ""), 2823 (tmp & 0x20000000 ? "[0x20] " : ""), 2824 (tmp & 0x10000000 ? "[0x10] " : ""), 2825 (tmp & 0x08000000 ? "[0x08] " : ""), 2826 (tmp & 0x04000000 ? "[0x04] " : ""), 2827 (tmp & 0x02000000 ? "[0x02] " : ""), 2828 (tmp & 0x01000000 ? "[0x01]" : " ")); 2829 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", 2830 (tmp & 0x00800000 ? "[0x80] " : ""), 2831 (tmp & 0x00400000 ? "[0x40] " : ""), 2832 (tmp & 0x00200000 ? "[Legacy INT] " : ""), 2833 (tmp & 0x00100000 ? "[0x10] " : ""), 2834 (tmp & 0x00080000 ? "[0x08] " : ""), 2835 (tmp & 0x00040000 ? "[Codec4] " : ""), 2836 (tmp & 0x00020000 ? "[Codec2] " : ""), 2837 (tmp & 0x00010000 ? "[I2S Codec]" : " ")); 2838 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", 2839 (tmp & 0x00008000 ? "[0x80] " : ""), 2840 (tmp & 0x00004000 ? "[GPINPUT0] " : ""), 2841 (tmp & 0x00002000 ? "[GPINPUT1] " : ""), 2842 (tmp & 0x00001000 ? "[GPOUT0] " : ""), 2843 (tmp & 0x00000800 ? "[GPOUT1] " : ""), 2844 (tmp & 0x00000400 ? "[GPOUT2] " : ""), 2845 (tmp & 0x00000200 ? "[Joystick] " : ""), 2846 (tmp & 0x00000100 ? "[0x01]" : " ")); 2847 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", 2848 (tmp & 0x00000080 ? "[0x80] " : ""), 2849 (tmp & 0x00000040 ? "[0x40] " : ""), 2850 (tmp & 0x00000020 ? "[0x20] " : ""), 2851 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""), 2852 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""), 2853 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""), 2854 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""), 2855 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " ")); 2856 2857 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2858 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2859 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp); 2860 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )"); 2861 printf(" : %s%s%s%s%s%s%s%s\n", 2862 (tmp & 0x8000 ? "[Rear Speakers] " : ""), 2863 (tmp & 0x4000 ? "[Front Speakers] " : ""), 2864 (tmp & 0x2000 ? "[0x20] " : ""), 2865 (tmp & 0x1000 ? "[0x10] " : ""), 2866 (tmp & 0x0800 ? "[0x08] " : ""), 2867 (tmp & 0x0400 ? "[0x04] " : ""), 2868 (tmp & 0x0200 ? "[0x02] " : ""), 2869 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " ")); 2870 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )"); 2871 printf(" : %s%s%s%s%s%s%s%s\n", 2872 (tmp & 0x0080 ? "[0x80] " : ""), 2873 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""), 2874 (tmp & 0x0020 ? "[0x20] " : ""), 2875 (tmp & 0x0010 ? "[0x10] " : ""), 2876 (tmp & 0x0008 ? "[0x08] " : ""), 2877 (tmp & 0x0004 ? "[GPOUT0] " : ""), 2878 (tmp & 0x0002 ? "[GPOUT1] " : ""), 2879 (tmp & 0x0001 ? "[GPOUT2]" : " ")); 2880 } /* is_emu10k2 or ca* */ 2881 } /* bootverbose */ 2882 return (0); 2883 } 2884 2885 static int 2886 emu_uninit(struct emu_sc_info *sc) 2887 { 2888 uint32_t ch; 2889 struct emu_memblk *blk; 2890 2891 emu_wr(sc, EMU_INTE, 0, 4); 2892 for (ch = 0; ch < NUM_G; ch++) 2893 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2894 for (ch = 0; ch < NUM_G; ch++) { 2895 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0); 2896 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0); 2897 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2898 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2899 } 2900 2901 /* disable audio and lock cache */ 2902 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2903 2904 emu_wrptr(sc, 0, EMU_PTB, 0); 2905 /* reset recording buffers */ 2906 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2907 emu_wrptr(sc, 0, EMU_MICBA, 0); 2908 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2909 emu_wrptr(sc, 0, EMU_FXBA, 0); 2910 emu_wrptr(sc, 0, EMU_FXWC, 0); 2911 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2912 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2913 emu_wrptr(sc, 0, EMU_TCB, 0); 2914 emu_wrptr(sc, 0, EMU_TCBS, 0); 2915 2916 /* disable channel interrupt */ 2917 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2918 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2919 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2920 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2921 2922 if (!SLIST_EMPTY(&sc->mem.blocks)) 2923 device_printf(sc->dev, "warning: memblock list not empty\n"); 2924 2925 SLIST_FOREACH(blk, &sc->mem.blocks, link) 2926 if (blk != NULL) 2927 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner); 2928 2929 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2930 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map); 2931 2932 return (0); 2933 } 2934 2935 static int 2936 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result) 2937 { 2938 struct sndcard_func *func = device_get_ivars(dev); 2939 struct emu_sc_info *sc = device_get_softc(bus); 2940 2941 if (func==NULL) 2942 return (ENOMEM); 2943 if (sc == NULL) 2944 return (ENOMEM); 2945 2946 switch (ivar_index) { 2947 case EMU_VAR_FUNC: 2948 *result = func->func; 2949 break; 2950 case EMU_VAR_ROUTE: 2951 if (func->varinfo == NULL) 2952 return (ENOMEM); 2953 *result = ((struct emu_pcminfo *)func->varinfo)->route; 2954 break; 2955 case EMU_VAR_ISEMU10K1: 2956 *result = sc->is_emu10k1; 2957 break; 2958 case EMU_VAR_MCH_DISABLED: 2959 *result = sc->mch_disabled; 2960 break; 2961 case EMU_VAR_MCH_REC: 2962 *result = sc->mch_rec; 2963 break; 2964 default: 2965 return (ENOENT); 2966 } 2967 2968 return (0); 2969 } 2970 2971 static int 2972 emu_write_ivar(device_t bus __unused, device_t dev __unused, 2973 int ivar_index, uintptr_t value __unused) 2974 { 2975 2976 switch (ivar_index) { 2977 case 0: 2978 return (EINVAL); 2979 2980 default: 2981 return (ENOENT); 2982 } 2983 } 2984 2985 static int 2986 emu_pci_probe(device_t dev) 2987 { 2988 unsigned int thiscard = 0; 2989 uint16_t vendor; 2990 2991 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2); 2992 if (vendor != 0x1102) 2993 return (ENXIO); /* Not Creative */ 2994 2995 thiscard = emu_getcard(dev); 2996 if (thiscard == 0) 2997 return (ENXIO); 2998 2999 device_set_descf(dev, "Creative %s [%s]", 3000 emu_cards[thiscard].desc, emu_cards[thiscard].SBcode); 3001 3002 return (BUS_PROBE_DEFAULT); 3003 } 3004 3005 static int 3006 emu_pci_attach(device_t dev) 3007 { 3008 struct sndcard_func *func; 3009 struct emu_sc_info *sc; 3010 struct emu_pcminfo *pcminfo; 3011 #if 0 3012 struct emu_midiinfo *midiinfo; 3013 #endif 3014 int i; 3015 int device_flags; 3016 char status[255]; 3017 int error = ENXIO; 3018 int unit; 3019 3020 sc = device_get_softc(dev); 3021 unit = device_get_unit(dev); 3022 3023 /* Get configuration */ 3024 3025 sc->ctx = device_get_sysctl_ctx(dev); 3026 if (sc->ctx == NULL) 3027 goto bad; 3028 sc->root = device_get_sysctl_tree(dev); 3029 if (sc->root == NULL) 3030 goto bad; 3031 3032 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled))) 3033 RANGE(sc->mch_disabled, 0, 1); 3034 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3035 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3036 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting"); 3037 3038 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec))) 3039 RANGE(sc->mch_rec, 0, 1); 3040 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3041 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3042 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting"); 3043 3044 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level))) 3045 RANGE(sc->mch_rec, 0, 2); 3046 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3047 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3048 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); 3049 3050 /* Fill in the softc. */ 3051 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF); 3052 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF); 3053 sc->dev = dev; 3054 sc->type = pci_get_devid(dev); 3055 sc->rev = pci_get_revid(dev); 3056 sc->enable_ir = 0; 3057 sc->has_ac97 = 0; 3058 sc->has_51 = 0; 3059 sc->has_71 = 0; 3060 sc->broken_digital = 0; 3061 sc->is_emu10k1 = 0; 3062 sc->is_emu10k2 = 0; 3063 sc->is_ca0102 = 0; 3064 sc->is_ca0108 = 0; 3065 sc->is_cardbus = 0; 3066 3067 device_flags = emu_cards[emu_getcard(dev)].flags; 3068 if (device_flags & HAS_51) 3069 sc->has_51 = 1; 3070 if (device_flags & HAS_71) { 3071 sc->has_51 = 1; 3072 sc->has_71 = 1; 3073 } 3074 if (device_flags & IS_EMU10K1) 3075 sc->is_emu10k1 = 1; 3076 if (device_flags & IS_EMU10K2) 3077 sc->is_emu10k2 = 1; 3078 if (device_flags & IS_CA0102) 3079 sc->is_ca0102 = 1; 3080 if (device_flags & IS_CA0108) 3081 sc->is_ca0108 = 1; 3082 if ((sc->is_emu10k2) && (sc->rev == 4)) { 3083 sc->is_emu10k2 = 0; 3084 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ 3085 } 3086 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1)) 3087 if (device_flags & IS_CARDBUS) 3088 sc->is_cardbus = 1; 3089 3090 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) { 3091 device_printf(sc->dev, "Unable to detect HW chipset\n"); 3092 goto bad; 3093 } 3094 if (device_flags & BROKEN_DIGITAL) 3095 sc->broken_digital = 1; 3096 if (device_flags & HAS_AC97) 3097 sc->has_ac97 = 1; 3098 3099 sc->opcode_shift = 0; 3100 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 3101 sc->opcode_shift = 24; 3102 sc->high_operand_shift = 12; 3103 3104 /* DSP map */ 3105 /* sc->fx_base = 0x0 */ 3106 sc->input_base = 0x40; 3107 /* sc->p16vinput_base = 0x50; */ 3108 sc->output_base = 0x60; 3109 sc->efxc_base = 0x80; 3110 /* sc->output32h_base = 0xa0; */ 3111 /* sc->output32l_base = 0xb0; */ 3112 sc->dsp_zero = 0xc0; 3113 /* 0xe0...0x100 are unknown */ 3114 /* sc->tram_base = 0x200 */ 3115 /* sc->tram_addr_base = 0x300 */ 3116 sc->gpr_base = EMU_A_FXGPREGBASE; 3117 sc->num_gprs = 0x200; 3118 sc->code_base = EMU_A_MICROCODEBASE; 3119 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, 3120 * 1024 instructions */ 3121 3122 sc->mchannel_fx = 8; 3123 sc->num_fxbuses = 16; 3124 sc->num_inputs = 8; 3125 sc->num_outputs = 16; 3126 sc->address_mask = EMU_A_PTR_ADDR_MASK; 3127 } 3128 if (sc->is_emu10k1) { 3129 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ 3130 sc->opcode_shift = 20; 3131 sc->high_operand_shift = 10; 3132 sc->code_base = EMU_MICROCODEBASE; 3133 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, 3134 * 512 instructions */ 3135 sc->gpr_base = EMU_FXGPREGBASE; 3136 sc->num_gprs = 0x100; 3137 sc->input_base = 0x10; 3138 sc->output_base = 0x20; 3139 /* 3140 * XXX 5.1 Analog outputs are inside efxc address space! 3141 * They use output+0x11/+0x12 (=efxc+1/+2). 3142 * Don't use this efx registers for recording on SB Live! 5.1! 3143 */ 3144 sc->efxc_base = 0x30; 3145 sc->dsp_zero = 0x40; 3146 sc->mchannel_fx = 0; 3147 sc->num_fxbuses = 8; 3148 sc->num_inputs = 8; 3149 sc->num_outputs = 16; 3150 sc->address_mask = EMU_PTR_ADDR_MASK; 3151 } 3152 if (sc->opcode_shift == 0) 3153 goto bad; 3154 3155 pci_enable_busmaster(dev); 3156 3157 i = PCIR_BAR(0); 3158 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 3159 if (sc->reg == NULL) { 3160 device_printf(dev, "unable to map register space\n"); 3161 goto bad; 3162 } 3163 sc->st = rman_get_bustag(sc->reg); 3164 sc->sh = rman_get_bushandle(sc->reg); 3165 3166 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 3167 sc->timer[i] = 0; /* disable it */ 3168 3169 i = 0; 3170 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE); 3171 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, 3172 NULL, 3173 emu_intr, sc, &sc->ih)) { 3174 device_printf(dev, "unable to map interrupt\n"); 3175 goto bad; 3176 } 3177 if (emu_rm_init(sc) != 0) { 3178 device_printf(dev, "unable to create resource manager\n"); 3179 goto bad; 3180 } 3181 if (sc->is_cardbus) 3182 if (emu_cardbus_init(sc) != 0) { 3183 device_printf(dev, "unable to initialize CardBus interface\n"); 3184 goto bad; 3185 } 3186 if (emu_init(sc) != 0) { 3187 device_printf(dev, "unable to initialize the card\n"); 3188 goto bad; 3189 } 3190 if (emu10kx_dev_init(sc) != 0) { 3191 device_printf(dev, "unable to create control device\n"); 3192 goto bad; 3193 } 3194 snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq)); 3195 3196 /* Voices */ 3197 for (i = 0; i < NUM_G; i++) { 3198 sc->voice[i].vnum = i; 3199 sc->voice[i].slave = NULL; 3200 sc->voice[i].busy = 0; 3201 sc->voice[i].ismaster = 0; 3202 sc->voice[i].running = 0; 3203 sc->voice[i].b16 = 0; 3204 sc->voice[i].stereo = 0; 3205 sc->voice[i].speed = 0; 3206 sc->voice[i].start = 0; 3207 sc->voice[i].end = 0; 3208 } 3209 3210 /* PCM Audio */ 3211 for (i = 0; i < RT_COUNT; i++) 3212 sc->pcm[i] = NULL; 3213 3214 /* FRONT */ 3215 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3216 if (func == NULL) { 3217 error = ENOMEM; 3218 goto bad; 3219 } 3220 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3221 if (pcminfo == NULL) { 3222 error = ENOMEM; 3223 goto bad; 3224 } 3225 pcminfo->card = sc; 3226 pcminfo->route = RT_FRONT; 3227 3228 func->func = SCF_PCM; 3229 func->varinfo = pcminfo; 3230 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1); 3231 device_set_ivars(sc->pcm[RT_FRONT], func); 3232 3233 if (!(sc->mch_disabled)) { 3234 /* REAR */ 3235 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3236 if (func == NULL) { 3237 error = ENOMEM; 3238 goto bad; 3239 } 3240 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3241 if (pcminfo == NULL) { 3242 error = ENOMEM; 3243 goto bad; 3244 } 3245 pcminfo->card = sc; 3246 pcminfo->route = RT_REAR; 3247 3248 func->func = SCF_PCM; 3249 func->varinfo = pcminfo; 3250 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1); 3251 device_set_ivars(sc->pcm[RT_REAR], func); 3252 if (sc->has_51) { 3253 /* CENTER */ 3254 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3255 if (func == NULL) { 3256 error = ENOMEM; 3257 goto bad; 3258 } 3259 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3260 if (pcminfo == NULL) { 3261 error = ENOMEM; 3262 goto bad; 3263 } 3264 pcminfo->card = sc; 3265 pcminfo->route = RT_CENTER; 3266 3267 func->func = SCF_PCM; 3268 func->varinfo = pcminfo; 3269 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1); 3270 device_set_ivars(sc->pcm[RT_CENTER], func); 3271 /* SUB */ 3272 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3273 if (func == NULL) { 3274 error = ENOMEM; 3275 goto bad; 3276 } 3277 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3278 if (pcminfo == NULL) { 3279 error = ENOMEM; 3280 goto bad; 3281 } 3282 pcminfo->card = sc; 3283 pcminfo->route = RT_SUB; 3284 3285 func->func = SCF_PCM; 3286 func->varinfo = pcminfo; 3287 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1); 3288 device_set_ivars(sc->pcm[RT_SUB], func); 3289 } 3290 if (sc->has_71) { 3291 /* SIDE */ 3292 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3293 if (func == NULL) { 3294 error = ENOMEM; 3295 goto bad; 3296 } 3297 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3298 if (pcminfo == NULL) { 3299 error = ENOMEM; 3300 goto bad; 3301 } 3302 pcminfo->card = sc; 3303 pcminfo->route = RT_SIDE; 3304 3305 func->func = SCF_PCM; 3306 func->varinfo = pcminfo; 3307 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1); 3308 device_set_ivars(sc->pcm[RT_SIDE], func); 3309 } 3310 } /* mch_disabled */ 3311 3312 if (sc->mch_rec) { 3313 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3314 if (func == NULL) { 3315 error = ENOMEM; 3316 goto bad; 3317 } 3318 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3319 if (pcminfo == NULL) { 3320 error = ENOMEM; 3321 goto bad; 3322 } 3323 pcminfo->card = sc; 3324 pcminfo->route = RT_MCHRECORD; 3325 3326 func->func = SCF_PCM; 3327 func->varinfo = pcminfo; 3328 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1); 3329 device_set_ivars(sc->pcm[RT_MCHRECORD], func); 3330 } /*mch_rec */ 3331 3332 for (i = 0; i < 2; i++) 3333 sc->midi[i] = NULL; 3334 3335 /* MIDI has some memory mangament and (possible) locking problems */ 3336 #if 0 3337 /* Midi Interface 1: Live!, Audigy, Audigy 2 */ 3338 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) { 3339 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3340 if (func == NULL) { 3341 error = ENOMEM; 3342 goto bad; 3343 } 3344 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3345 if (midiinfo == NULL) { 3346 error = ENOMEM; 3347 goto bad; 3348 } 3349 midiinfo->card = sc; 3350 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3351 midiinfo->port = EMU_A_MUDATA1; 3352 midiinfo->portnr = 1; 3353 } 3354 if (sc->is_emu10k1) { 3355 midiinfo->port = MUDATA; 3356 midiinfo->portnr = 1; 3357 } 3358 func->func = SCF_MIDI; 3359 func->varinfo = midiinfo; 3360 sc->midi[0] = device_add_child(dev, "midi", -1); 3361 device_set_ivars(sc->midi[0], func); 3362 } 3363 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */ 3364 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3365 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3366 if (func == NULL) { 3367 error = ENOMEM; 3368 goto bad; 3369 } 3370 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3371 if (midiinfo == NULL) { 3372 error = ENOMEM; 3373 goto bad; 3374 } 3375 midiinfo->card = sc; 3376 3377 midiinfo->port = EMU_A_MUDATA2; 3378 midiinfo->portnr = 2; 3379 3380 func->func = SCF_MIDI; 3381 func->varinfo = midiinfo; 3382 sc->midi[1] = device_add_child(dev, "midi", -1); 3383 device_set_ivars(sc->midi[1], func); 3384 } 3385 #endif 3386 return (bus_generic_attach(dev)); 3387 3388 bad: 3389 /* XXX can we just call emu_pci_detach here? */ 3390 if (sc->cdev) 3391 emu10kx_dev_uninit(sc); 3392 if (sc->rm != NULL) 3393 emu_rm_uninit(sc); 3394 if (sc->reg) 3395 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3396 if (sc->ih) 3397 bus_teardown_intr(dev, sc->irq, sc->ih); 3398 if (sc->irq) 3399 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3400 mtx_destroy(&sc->rw); 3401 mtx_destroy(&sc->lock); 3402 return (error); 3403 } 3404 3405 static int 3406 emu_pci_detach(device_t dev) 3407 { 3408 struct emu_sc_info *sc; 3409 struct sndcard_func *func; 3410 int devcount, i; 3411 device_t *childlist; 3412 int r = 0; 3413 3414 sc = device_get_softc(dev); 3415 3416 for (i = 0; i < RT_COUNT; i++) { 3417 if (sc->pcm[i] != NULL) { 3418 func = device_get_ivars(sc->pcm[i]); 3419 if (func != NULL && func->func == SCF_PCM) { 3420 device_set_ivars(sc->pcm[i], NULL); 3421 free(func->varinfo, M_DEVBUF); 3422 free(func, M_DEVBUF); 3423 } 3424 r = device_delete_child(dev, sc->pcm[i]); 3425 if (r) return (r); 3426 } 3427 } 3428 3429 if (sc->midi[0] != NULL) { 3430 func = device_get_ivars(sc->midi[0]); 3431 if (func != NULL && func->func == SCF_MIDI) { 3432 device_set_ivars(sc->midi[0], NULL); 3433 free(func->varinfo, M_DEVBUF); 3434 free(func, M_DEVBUF); 3435 } 3436 r = device_delete_child(dev, sc->midi[0]); 3437 if (r) return (r); 3438 } 3439 3440 if (sc->midi[1] != NULL) { 3441 func = device_get_ivars(sc->midi[1]); 3442 if (func != NULL && func->func == SCF_MIDI) { 3443 device_set_ivars(sc->midi[1], NULL); 3444 free(func->varinfo, M_DEVBUF); 3445 free(func, M_DEVBUF); 3446 } 3447 r = device_delete_child(dev, sc->midi[1]); 3448 if (r) return (r); 3449 } 3450 3451 if (device_get_children(dev, &childlist, &devcount) == 0) 3452 for (i = 0; i < devcount - 1; i++) { 3453 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i])); 3454 func = device_get_ivars(childlist[i]); 3455 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) { 3456 device_set_ivars(childlist[i], NULL); 3457 free(func->varinfo, M_DEVBUF); 3458 free(func, M_DEVBUF); 3459 } 3460 device_delete_child(dev, childlist[i]); 3461 } 3462 if (childlist != NULL) 3463 free(childlist, M_TEMP); 3464 3465 r = emu10kx_dev_uninit(sc); 3466 if (r) 3467 return (r); 3468 3469 /* shutdown chip */ 3470 emu_uninit(sc); 3471 emu_rm_uninit(sc); 3472 3473 if (sc->mem.dmat) 3474 bus_dma_tag_destroy(sc->mem.dmat); 3475 3476 if (sc->reg) 3477 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3478 bus_teardown_intr(dev, sc->irq, sc->ih); 3479 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3480 mtx_destroy(&sc->rw); 3481 mtx_destroy(&sc->lock); 3482 3483 return (bus_generic_detach(dev)); 3484 } 3485 /* add suspend, resume */ 3486 static device_method_t emu_methods[] = { 3487 /* Device interface */ 3488 DEVMETHOD(device_probe, emu_pci_probe), 3489 DEVMETHOD(device_attach, emu_pci_attach), 3490 DEVMETHOD(device_detach, emu_pci_detach), 3491 /* Bus methods */ 3492 DEVMETHOD(bus_read_ivar, emu_read_ivar), 3493 DEVMETHOD(bus_write_ivar, emu_write_ivar), 3494 3495 DEVMETHOD_END 3496 }; 3497 3498 static driver_t emu_driver = { 3499 "emu10kx", 3500 emu_methods, 3501 sizeof(struct emu_sc_info), 3502 NULL, 3503 0, 3504 NULL 3505 }; 3506 3507 static int 3508 emu_modevent(module_t mod __unused, int cmd, void *data __unused) 3509 { 3510 int err = 0; 3511 3512 switch (cmd) { 3513 case MOD_LOAD: 3514 break; /* Success */ 3515 3516 case MOD_UNLOAD: 3517 case MOD_SHUTDOWN: 3518 3519 /* XXX Should we check state of pcm & midi subdevices here? */ 3520 3521 break; /* Success */ 3522 3523 default: 3524 err = EINVAL; 3525 break; 3526 } 3527 3528 return (err); 3529 3530 } 3531 3532 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_modevent, NULL); 3533 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER); 3534