1 /* 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <dev/sound/pcm/sound.h> 30 #include <dev/sound/pcm/ac97.h> 31 #include <gnu/dev/sound/pci/emu10k1.h> 32 33 #include <pci/pcireg.h> 34 #include <pci/pcivar.h> 35 #include <sys/queue.h> 36 37 /* -------------------------------------------------------------------- */ 38 39 #define EMU10K1_PCI_ID 0x00021102 40 #define EMU_BUFFSIZE 4096 41 #define EMU_CHANS 4 42 #undef EMUDEBUG 43 44 struct emu_memblk { 45 SLIST_ENTRY(emu_memblk) link; 46 void *buf; 47 u_int32_t pte_start, pte_size; 48 }; 49 50 struct emu_mem { 51 u_int8_t bmap[MAXPAGES / 8]; 52 u_int32_t *ptb_pages; 53 void *silent_page; 54 SLIST_HEAD(, emu_memblk) blocks; 55 }; 56 57 struct emu_voice { 58 int vnum; 59 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 60 int speed; 61 int start, end, vol; 62 u_int32_t buf; 63 struct emu_voice *slave; 64 pcm_channel *channel; 65 }; 66 67 struct sc_info; 68 69 /* channel registers */ 70 struct sc_pchinfo { 71 int spd, fmt, run; 72 struct emu_voice *master, *slave; 73 snd_dbuf *buffer; 74 pcm_channel *channel; 75 struct sc_info *parent; 76 }; 77 78 struct sc_rchinfo { 79 int spd, fmt, run, num; 80 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 81 snd_dbuf *buffer; 82 pcm_channel *channel; 83 struct sc_info *parent; 84 }; 85 86 /* device private data */ 87 struct sc_info { 88 device_t dev; 89 u_int32_t type, rev; 90 u_int32_t tos_link:1, APS:1; 91 92 bus_space_tag_t st; 93 bus_space_handle_t sh; 94 bus_dma_tag_t parent_dmat; 95 96 struct resource *reg, *irq; 97 int regtype, regid, irqid; 98 void *ih; 99 100 int timer; 101 int pnum, rnum; 102 struct emu_mem mem; 103 struct emu_voice voice[64]; 104 struct sc_pchinfo pch[EMU_CHANS]; 105 struct sc_rchinfo rch[3]; 106 }; 107 108 /* -------------------------------------------------------------------- */ 109 110 /* 111 * prototypes 112 */ 113 114 /* channel interface */ 115 static void *emupchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 116 static int emupchan_free(void *data); 117 static int emupchan_setdir(void *data, int dir); 118 static int emupchan_setformat(void *data, u_int32_t format); 119 static int emupchan_setspeed(void *data, u_int32_t speed); 120 static int emupchan_setblocksize(void *data, u_int32_t blocksize); 121 static int emupchan_trigger(void *data, int go); 122 static int emupchan_getptr(void *data); 123 static pcmchan_caps *emupchan_getcaps(void *data); 124 125 /* channel interface */ 126 static void *emurchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 127 static int emurchan_setdir(void *data, int dir); 128 static int emurchan_setformat(void *data, u_int32_t format); 129 static int emurchan_setspeed(void *data, u_int32_t speed); 130 static int emurchan_setblocksize(void *data, u_int32_t blocksize); 131 static int emurchan_trigger(void *data, int go); 132 static int emurchan_getptr(void *data); 133 static pcmchan_caps *emurchan_getcaps(void *data); 134 135 /* talk to the codec - called from ac97.c */ 136 static u_int32_t emu_rdcd(void *, int); 137 static void emu_wrcd(void *, int, u_int32_t); 138 139 /* stuff */ 140 static int emu_init(struct sc_info *); 141 static void emu_intr(void *); 142 static void *emu_malloc(struct sc_info *sc, u_int32_t sz); 143 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz); 144 static int emu_memfree(struct sc_info *sc, void *buf); 145 static int emu_memstart(struct sc_info *sc, void *buf); 146 #ifdef EMUDEBUG 147 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 148 #endif 149 150 /* talk to the card */ 151 static u_int32_t emu_rd(struct sc_info *, int, int); 152 static void emu_wr(struct sc_info *, int, u_int32_t, int); 153 154 /* -------------------------------------------------------------------- */ 155 156 static u_int32_t emu_rfmt_ac97[] = { 157 AFMT_S16_LE, 158 AFMT_STEREO | AFMT_S16_LE, 159 0 160 }; 161 162 static u_int32_t emu_rfmt_mic[] = { 163 AFMT_U8, 164 0 165 }; 166 167 static u_int32_t emu_rfmt_efx[] = { 168 AFMT_STEREO | AFMT_S16_LE, 169 0 170 }; 171 172 static pcmchan_caps emu_reccaps[3] = { 173 {8000, 48000, emu_rfmt_ac97, 0}, 174 {8000, 8000, emu_rfmt_mic, 0}, 175 {48000, 48000, emu_rfmt_efx, 0}, 176 }; 177 178 static u_int32_t emu_pfmt[] = { 179 AFMT_U8, 180 AFMT_STEREO | AFMT_U8, 181 AFMT_S16_LE, 182 AFMT_STEREO | AFMT_S16_LE, 183 0 184 }; 185 186 static pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 187 188 static pcm_channel emu_chantemplate = { 189 emupchan_init, 190 emupchan_setdir, 191 emupchan_setformat, 192 emupchan_setspeed, 193 emupchan_setblocksize, 194 emupchan_trigger, 195 emupchan_getptr, 196 emupchan_getcaps, 197 emupchan_free, /* free */ 198 NULL, /* nop1 */ 199 NULL, /* nop2 */ 200 NULL, /* nop3 */ 201 NULL, /* nop4 */ 202 NULL, /* nop5 */ 203 NULL, /* nop6 */ 204 NULL, /* nop7 */ 205 }; 206 207 static pcm_channel emur_chantemplate = { 208 emurchan_init, 209 emurchan_setdir, 210 emurchan_setformat, 211 emurchan_setspeed, 212 emurchan_setblocksize, 213 emurchan_trigger, 214 emurchan_getptr, 215 emurchan_getcaps, 216 NULL, /* free */ 217 NULL, /* nop1 */ 218 NULL, /* nop2 */ 219 NULL, /* nop3 */ 220 NULL, /* nop4 */ 221 NULL, /* nop5 */ 222 NULL, /* nop6 */ 223 NULL, /* nop7 */ 224 }; 225 226 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 227 228 /* -------------------------------------------------------------------- */ 229 /* Hardware */ 230 static u_int32_t 231 emu_rd(struct sc_info *sc, int regno, int size) 232 { 233 switch (size) { 234 case 1: 235 return bus_space_read_1(sc->st, sc->sh, regno); 236 case 2: 237 return bus_space_read_2(sc->st, sc->sh, regno); 238 case 4: 239 return bus_space_read_4(sc->st, sc->sh, regno); 240 default: 241 return 0xffffffff; 242 } 243 } 244 245 static void 246 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 247 { 248 switch (size) { 249 case 1: 250 bus_space_write_1(sc->st, sc->sh, regno, data); 251 break; 252 case 2: 253 bus_space_write_2(sc->st, sc->sh, regno, data); 254 break; 255 case 4: 256 bus_space_write_4(sc->st, sc->sh, regno, data); 257 break; 258 } 259 } 260 261 static u_int32_t 262 emu_rdptr(struct sc_info *sc, int chn, int reg) 263 { 264 u_int32_t ptr, val, mask, size, offset; 265 266 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 267 emu_wr(sc, PTR, ptr, 4); 268 val = emu_rd(sc, DATA, 4); 269 if (reg & 0xff000000) { 270 size = (reg >> 24) & 0x3f; 271 offset = (reg >> 16) & 0x1f; 272 mask = ((1 << size) - 1) << offset; 273 val &= mask; 274 val >>= offset; 275 } 276 return val; 277 } 278 279 static void 280 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 281 { 282 u_int32_t ptr, mask, size, offset; 283 284 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 285 emu_wr(sc, PTR, ptr, 4); 286 if (reg & 0xff000000) { 287 size = (reg >> 24) & 0x3f; 288 offset = (reg >> 16) & 0x1f; 289 mask = ((1 << size) - 1) << offset; 290 data <<= offset; 291 data &= mask; 292 data |= emu_rd(sc, DATA, 4) & ~mask; 293 } 294 emu_wr(sc, DATA, data, 4); 295 } 296 297 static void 298 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 299 { 300 emu_wrptr(sc, 0, MICROCODEBASE + pc, data); 301 } 302 303 /* ac97 codec */ 304 static u_int32_t 305 emu_rdcd(void *devinfo, int regno) 306 { 307 struct sc_info *sc = (struct sc_info *)devinfo; 308 309 emu_wr(sc, AC97ADDRESS, regno, 1); 310 return emu_rd(sc, AC97DATA, 2); 311 } 312 313 static void 314 emu_wrcd(void *devinfo, int regno, u_int32_t data) 315 { 316 struct sc_info *sc = (struct sc_info *)devinfo; 317 318 emu_wr(sc, AC97ADDRESS, regno, 1); 319 emu_wr(sc, AC97DATA, data, 2); 320 } 321 322 #if 0 323 /* playback channel interrupts */ 324 static u_int32_t 325 emu_testint(struct sc_info *sc, char channel) 326 { 327 int reg = (channel & 0x20)? CLIPH : CLIPL; 328 channel &= 0x1f; 329 reg |= 1 << 24; 330 reg |= channel << 16; 331 return emu_rdptr(sc, 0, reg); 332 } 333 334 static void 335 emu_clrint(struct sc_info *sc, char channel) 336 { 337 int reg = (channel & 0x20)? CLIPH : CLIPL; 338 channel &= 0x1f; 339 reg |= 1 << 24; 340 reg |= channel << 16; 341 emu_wrptr(sc, 0, reg, 1); 342 } 343 344 static void 345 emu_enaint(struct sc_info *sc, char channel, int enable) 346 { 347 int reg = (channel & 0x20)? CLIEH : CLIEL; 348 channel &= 0x1f; 349 reg |= 1 << 24; 350 reg |= channel << 16; 351 emu_wrptr(sc, 0, reg, enable); 352 } 353 #endif 354 355 /* stuff */ 356 static int 357 emu_enatimer(struct sc_info *sc, int go) 358 { 359 u_int32_t x; 360 if (go) { 361 if (sc->timer++ == 0) { 362 emu_wr(sc, TIMER, 256, 2); 363 x = emu_rd(sc, INTE, 4); 364 x |= INTE_INTERVALTIMERENB; 365 emu_wr(sc, INTE, x, 4); 366 } 367 } else { 368 sc->timer = 0; 369 x = emu_rd(sc, INTE, 4); 370 x &= ~INTE_INTERVALTIMERENB; 371 emu_wr(sc, INTE, x, 4); 372 } 373 return 0; 374 } 375 376 static void 377 emu_enastop(struct sc_info *sc, char channel, int enable) 378 { 379 int reg = (channel & 0x20)? SOLEH : SOLEL; 380 channel &= 0x1f; 381 reg |= 1 << 24; 382 reg |= channel << 16; 383 emu_wrptr(sc, 0, reg, enable); 384 } 385 386 static int 387 emu_recval(int speed) { 388 int val; 389 390 val = 0; 391 while (val < 7 && speed < adcspeed[val]) 392 val++; 393 return val; 394 } 395 396 static u_int32_t 397 emu_rate_to_pitch(u_int32_t rate) 398 { 399 static u_int32_t logMagTable[128] = { 400 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 401 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 402 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 403 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 404 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 405 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 406 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 407 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 408 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 409 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 410 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 411 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 412 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 413 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 414 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 415 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 416 }; 417 static char logSlopeTable[128] = { 418 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 419 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 420 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 421 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 422 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 423 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 424 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 425 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 426 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 427 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 428 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 429 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 430 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 431 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 432 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 433 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 434 }; 435 int i; 436 437 if (rate == 0) 438 return 0; /* Bail out if no leading "1" */ 439 rate *= 11185; /* Scale 48000 to 0x20002380 */ 440 for (i = 31; i > 0; i--) { 441 if (rate & 0x80000000) { /* Detect leading "1" */ 442 return (((u_int32_t) (i - 15) << 20) + 443 logMagTable[0x7f & (rate >> 24)] + 444 (0x7f & (rate >> 17)) * 445 logSlopeTable[0x7f & (rate >> 24)]); 446 } 447 rate <<= 1; 448 } 449 450 return 0; /* Should never reach this point */ 451 } 452 453 static u_int32_t 454 emu_rate_to_linearpitch(u_int32_t rate) 455 { 456 rate = (rate << 8) / 375; 457 return (rate >> 1) + (rate & 1); 458 } 459 460 static struct emu_voice * 461 emu_valloc(struct sc_info *sc) 462 { 463 struct emu_voice *v; 464 int i; 465 466 v = NULL; 467 for (i = 0; i < 64 && sc->voice[i].busy; i++); 468 if (i < 64) { 469 v = &sc->voice[i]; 470 v->busy = 1; 471 } 472 return v; 473 } 474 475 static int 476 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 477 u_int32_t sz, pcm_channel *c) 478 { 479 void *buf; 480 481 buf = emu_memalloc(sc, sz); 482 if (buf == NULL) 483 return -1; 484 if (c != NULL) { 485 c->buffer.buf = buf; 486 c->buffer.bufsize = sz; 487 } 488 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 489 m->end = m->start + sz; 490 m->channel = NULL; 491 m->speed = 0; 492 m->b16 = 0; 493 m->stereo = 0; 494 m->running = 0; 495 m->ismaster = 1; 496 m->vol = 0xff; 497 m->buf = vtophys(buf); 498 m->slave = s; 499 if (s != NULL) { 500 s->start = m->start; 501 s->end = m->end; 502 s->channel = NULL; 503 s->speed = 0; 504 s->b16 = 0; 505 s->stereo = 0; 506 s->running = 0; 507 s->ismaster = 0; 508 s->vol = m->vol; 509 s->buf = m->buf; 510 s->slave = NULL; 511 } 512 return 0; 513 } 514 515 static void 516 emu_vsetup(struct sc_pchinfo *ch) 517 { 518 struct emu_voice *v = ch->master; 519 520 if (ch->fmt) { 521 v->b16 = (ch->fmt & AFMT_16BIT)? 1 : 0; 522 v->stereo = (ch->fmt & AFMT_STEREO)? 1 : 0; 523 if (v->slave != NULL) { 524 v->slave->b16 = v->b16; 525 v->slave->stereo = v->stereo; 526 } 527 } 528 if (ch->spd) { 529 v->speed = ch->spd; 530 if (v->slave != NULL) 531 v->slave->speed = v->speed; 532 } 533 } 534 535 static void 536 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 537 { 538 int s; 539 int l, r, x, y; 540 u_int32_t sa, ea, start, val, silent_page; 541 542 s = (v->stereo? 1 : 0) + (v->b16? 1 : 0); 543 544 sa = v->start >> s; 545 ea = v->end >> s; 546 547 l = r = x = y = v->vol; 548 if (v->stereo) { 549 l = v->ismaster? l : 0; 550 r = v->ismaster? 0 : r; 551 } 552 553 emu_wrptr(sc, v->vnum, CPF, v->stereo? CPF_STEREO_MASK : 0); 554 val = v->stereo? 28 : 30; 555 val *= v->b16? 1 : 2; 556 start = sa + val; 557 558 emu_wrptr(sc, v->vnum, FXRT, 0xd01c0000); 559 560 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 561 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 562 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 563 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16? 0 : CCCA_8BITSELECT)); 564 565 emu_wrptr(sc, v->vnum, Z1, 0); 566 emu_wrptr(sc, v->vnum, Z2, 0); 567 568 silent_page = ((u_int32_t)vtophys(sc->mem.silent_page) << 1) | MAP_PTI_MASK; 569 emu_wrptr(sc, v->vnum, MAPA, silent_page); 570 emu_wrptr(sc, v->vnum, MAPB, silent_page); 571 572 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 573 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 574 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 575 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 576 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 577 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 578 emu_wrptr(sc, v->vnum, FMMOD, 0); 579 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 580 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 581 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 582 583 emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 584 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 585 586 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 587 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 588 589 if (v->slave != NULL) 590 emu_vwrite(sc, v->slave); 591 } 592 593 static void 594 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 595 { 596 u_int32_t pitch_target, initial_pitch; 597 u_int32_t cra, cs, ccis; 598 u_int32_t sample, i; 599 600 if (go) { 601 cra = 64; 602 cs = v->stereo? 4 : 2; 603 ccis = v->stereo? 28 : 30; 604 ccis *= v->b16? 1 : 2; 605 sample = v->b16? 0x00000000 : 0x80808080; 606 607 for (i = 0; i < cs; i++) 608 emu_wrptr(sc, v->vnum, CD0 + i, sample); 609 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 610 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 611 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 612 613 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 614 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 615 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 616 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 617 emu_enastop(sc, v->vnum, 0); 618 619 pitch_target = emu_rate_to_linearpitch(v->speed); 620 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 621 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 622 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 623 emu_wrptr(sc, v->vnum, IP, initial_pitch); 624 } else { 625 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 626 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 627 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 628 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 629 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 630 emu_wrptr(sc, v->vnum, IP, 0); 631 emu_enastop(sc, v->vnum, 1); 632 } 633 if (v->slave != NULL) 634 emu_vtrigger(sc, v->slave, go); 635 } 636 637 static int 638 emu_vpos(struct sc_info *sc, struct emu_voice *v) 639 { 640 int s, ptr; 641 642 s = (v->b16? 1 : 0) + (v->stereo? 1 : 0); 643 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 644 return ptr & ~0x0000001f; 645 } 646 647 #ifdef EMUDEBUG 648 static void 649 emu_vdump(struct sc_info *sc, struct emu_voice *v) 650 { 651 char *regname[] = { "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 652 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 653 "envvol", "atkhldv", "dcysusv", "lfoval1", 654 "envval", "atkhldm", "dcysusm", "lfoval2", 655 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 656 "tempenv" }; 657 int i, x; 658 659 printf("voice number %d\n", v->vnum); 660 for (i = 0, x = 0; i <= 0x1e; i++) { 661 if (regname[i] == NULL) 662 continue; 663 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 664 printf("%s", (x == 2)? "\n" : "\t"); 665 x++; 666 if (x > 2) 667 x = 0; 668 } 669 printf("\n\n"); 670 } 671 #endif 672 673 /* channel interface */ 674 void * 675 emupchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 676 { 677 struct sc_info *sc = devinfo; 678 struct sc_pchinfo *ch; 679 680 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 681 ch = &sc->pch[sc->pnum++]; 682 ch->buffer = b; 683 ch->parent = sc; 684 ch->channel = c; 685 ch->master = emu_valloc(sc); 686 ch->slave = emu_valloc(sc); 687 if (emu_vinit(sc, ch->master, ch->slave, EMU_BUFFSIZE, ch->channel)) 688 return NULL; 689 else 690 return ch; 691 } 692 693 static int 694 emupchan_free(void *data) 695 { 696 struct sc_pchinfo *ch = data; 697 struct sc_info *sc = ch->parent; 698 699 return emu_memfree(sc, ch->buffer->buf); 700 } 701 702 static int 703 emupchan_setdir(void *data, int dir) 704 { 705 return 0; 706 } 707 708 static int 709 emupchan_setformat(void *data, u_int32_t format) 710 { 711 struct sc_pchinfo *ch = data; 712 713 ch->fmt = format; 714 return 0; 715 } 716 717 static int 718 emupchan_setspeed(void *data, u_int32_t speed) 719 { 720 struct sc_pchinfo *ch = data; 721 722 ch->spd = speed; 723 return ch->spd; 724 } 725 726 static int 727 emupchan_setblocksize(void *data, u_int32_t blocksize) 728 { 729 return blocksize; 730 } 731 732 static int 733 emupchan_trigger(void *data, int go) 734 { 735 struct sc_pchinfo *ch = data; 736 struct sc_info *sc = ch->parent; 737 738 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 739 return 0; 740 741 if (go == PCMTRIG_START) { 742 emu_vsetup(ch); 743 emu_vwrite(sc, ch->master); 744 emu_enatimer(sc, 1); 745 #ifdef EMUDEBUG 746 printf("start [%d bit, %s, %d hz]\n", 747 ch->master->b16? 16 : 8, 748 ch->master->stereo? "stereo" : "mono", 749 ch->master->speed); 750 emu_vdump(sc, ch->master); 751 emu_vdump(sc, ch->slave); 752 #endif 753 } 754 ch->run = (go == PCMTRIG_START)? 1 : 0; 755 emu_vtrigger(sc, ch->master, ch->run); 756 return 0; 757 } 758 759 static int 760 emupchan_getptr(void *data) 761 { 762 struct sc_pchinfo *ch = data; 763 struct sc_info *sc = ch->parent; 764 765 return emu_vpos(sc, ch->master); 766 } 767 768 static pcmchan_caps * 769 emupchan_getcaps(void *data) 770 { 771 return &emu_playcaps; 772 } 773 774 /* channel interface */ 775 static void * 776 emurchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 777 { 778 struct sc_info *sc = devinfo; 779 struct sc_rchinfo *ch; 780 781 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 782 ch = &sc->rch[sc->rnum]; 783 ch->buffer = b; 784 ch->buffer->bufsize = EMU_BUFFSIZE; 785 ch->parent = sc; 786 ch->channel = c; 787 ch->fmt = AFMT_U8; 788 ch->spd = 8000; 789 ch->num = sc->rnum; 790 switch(sc->rnum) { 791 case 0: 792 ch->idxreg = ADCIDX; 793 ch->basereg = ADCBA; 794 ch->sizereg = ADCBS; 795 ch->setupreg = ADCCR; 796 ch->irqmask = INTE_ADCBUFENABLE; 797 break; 798 799 case 1: 800 ch->idxreg = MICIDX; 801 ch->basereg = MICBA; 802 ch->sizereg = MICBS; 803 ch->setupreg = 0; 804 ch->irqmask = INTE_MICBUFENABLE; 805 break; 806 807 case 2: 808 ch->idxreg = FXIDX; 809 ch->basereg = FXBA; 810 ch->sizereg = FXBS; 811 ch->setupreg = FXWC; 812 ch->irqmask = INTE_EFXBUFENABLE; 813 break; 814 } 815 sc->rnum++; 816 if (chn_allocbuf(ch->buffer, sc->parent_dmat) == -1) 817 return NULL; 818 else { 819 emu_wrptr(sc, 0, ch->basereg, vtophys(ch->buffer->buf)); 820 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 821 return ch; 822 } 823 } 824 825 static int 826 emurchan_setdir(void *data, int dir) 827 { 828 return 0; 829 } 830 831 static int 832 emurchan_setformat(void *data, u_int32_t format) 833 { 834 struct sc_rchinfo *ch = data; 835 836 ch->fmt = format; 837 return 0; 838 } 839 840 static int 841 emurchan_setspeed(void *data, u_int32_t speed) 842 { 843 struct sc_rchinfo *ch = data; 844 845 if (ch->num == 0) 846 speed = adcspeed[emu_recval(speed)]; 847 if (ch->num == 1) 848 speed = 8000; 849 if (ch->num == 2) 850 speed = 48000; 851 ch->spd = speed; 852 return ch->spd; 853 } 854 855 static int 856 emurchan_setblocksize(void *data, u_int32_t blocksize) 857 { 858 return blocksize; 859 } 860 861 /* semantic note: must start at beginning of buffer */ 862 static int 863 emurchan_trigger(void *data, int go) 864 { 865 struct sc_rchinfo *ch = data; 866 struct sc_info *sc = ch->parent; 867 u_int32_t val; 868 869 switch(go) { 870 case PCMTRIG_START: 871 ch->run = 1; 872 emu_wrptr(sc, 0, ch->sizereg, ADCBS_BUFSIZE_4096); 873 if (ch->num == 0) { 874 val = ADCCR_LCHANENABLE; 875 if (ch->fmt & AFMT_STEREO) 876 val |= ADCCR_RCHANENABLE; 877 val |= emu_recval(ch->spd); 878 emu_wrptr(sc, 0, ch->setupreg, val); 879 } 880 val = emu_rd(sc, INTE, 4); 881 val |= ch->irqmask; 882 emu_wr(sc, INTE, val, 4); 883 break; 884 885 case PCMTRIG_STOP: 886 case PCMTRIG_ABORT: 887 ch->run = 0; 888 emu_wrptr(sc, 0, ch->sizereg, 0); 889 if (ch->setupreg) 890 emu_wrptr(sc, 0, ch->setupreg, 0); 891 val = emu_rd(sc, INTE, 4); 892 val &= ~ch->irqmask; 893 emu_wr(sc, INTE, val, 4); 894 break; 895 896 case PCMTRIG_EMLDMAWR: 897 case PCMTRIG_EMLDMARD: 898 default: 899 break; 900 } 901 902 return 0; 903 } 904 905 static int 906 emurchan_getptr(void *data) 907 { 908 struct sc_rchinfo *ch = data; 909 struct sc_info *sc = ch->parent; 910 911 return emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 912 } 913 914 static pcmchan_caps * 915 emurchan_getcaps(void *data) 916 { 917 struct sc_rchinfo *ch = data; 918 919 return &emu_reccaps[ch->num]; 920 } 921 922 /* The interrupt handler */ 923 static void 924 emu_intr(void *p) 925 { 926 struct sc_info *sc = (struct sc_info *)p; 927 u_int32_t stat, ack, i, x; 928 929 while (1) { 930 stat = emu_rd(sc, IPR, 4); 931 if (stat == 0) 932 break; 933 ack = 0; 934 935 /* process irq */ 936 if (stat & IPR_INTERVALTIMER) { 937 ack |= IPR_INTERVALTIMER; 938 x = 0; 939 for (i = 0; i < EMU_CHANS; i++) { 940 if (sc->pch[i].run) { 941 x = 1; 942 chn_intr(sc->pch[i].channel); 943 } 944 } 945 if (x == 0) 946 emu_enatimer(sc, 0); 947 } 948 949 950 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 951 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 952 if (sc->rch[0].channel) 953 chn_intr(sc->rch[0].channel); 954 } 955 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 956 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 957 if (sc->rch[1].channel) 958 chn_intr(sc->rch[1].channel); 959 } 960 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 961 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 962 if (sc->rch[2].channel) 963 chn_intr(sc->rch[2].channel); 964 } 965 if (stat & IPR_PCIERROR) { 966 ack |= IPR_PCIERROR; 967 device_printf(sc->dev, "pci error\n"); 968 /* we still get an nmi with ecc ram even if we ack this */ 969 } 970 if (stat & IPR_SAMPLERATETRACKER) { 971 ack |= IPR_SAMPLERATETRACKER; 972 device_printf(sc->dev, "sample rate tracker lock status change\n"); 973 } 974 975 if (stat & ~ack) 976 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", stat & ~ack); 977 978 emu_wr(sc, IPR, stat, 4); 979 } 980 } 981 982 /* -------------------------------------------------------------------- */ 983 984 static void 985 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 986 { 987 void **phys = arg; 988 989 *phys = error? 0 : (void *)segs->ds_addr; 990 991 if (bootverbose) { 992 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 993 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 994 nseg, error); 995 } 996 } 997 998 static void * 999 emu_malloc(struct sc_info *sc, u_int32_t sz) 1000 { 1001 void *buf, *phys = 0; 1002 bus_dmamap_t map; 1003 1004 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1005 return NULL; 1006 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, &phys, 0) 1007 || !phys) 1008 return NULL; 1009 return buf; 1010 } 1011 1012 static void 1013 emu_free(struct sc_info *sc, void *buf) 1014 { 1015 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1016 } 1017 1018 static void * 1019 emu_memalloc(struct sc_info *sc, u_int32_t sz) 1020 { 1021 u_int32_t blksz, start, idx, ofs, tmp, found; 1022 struct emu_mem *mem = &sc->mem; 1023 struct emu_memblk *blk; 1024 void *buf; 1025 1026 blksz = sz / EMUPAGESIZE; 1027 if (sz > (blksz * EMUPAGESIZE)) 1028 blksz++; 1029 /* find a free block in the bitmap */ 1030 found = 0; 1031 start = 1; 1032 while (!found && start + blksz < MAXPAGES) { 1033 found = 1; 1034 for (idx = start; idx < start + blksz; idx++) 1035 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1036 found = 0; 1037 if (!found) 1038 start++; 1039 } 1040 if (!found) 1041 return NULL; 1042 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1043 if (blk == NULL) 1044 return NULL; 1045 buf = emu_malloc(sc, sz); 1046 if (buf == NULL) { 1047 free(blk, M_DEVBUF); 1048 return NULL; 1049 } 1050 blk->buf = buf; 1051 blk->pte_start = start; 1052 blk->pte_size = blksz; 1053 /* printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, blk->pte_start, blk->pte_size); */ 1054 ofs = 0; 1055 for (idx = start; idx < start + blksz; idx++) { 1056 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1057 tmp = (u_int32_t)vtophys((u_int8_t *)buf + ofs); 1058 /* printf("pte[%d] -> %x phys, %x virt\n", idx, tmp, ((u_int32_t)buf) + ofs); */ 1059 mem->ptb_pages[idx] = (tmp << 1) | idx; 1060 ofs += EMUPAGESIZE; 1061 } 1062 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1063 return buf; 1064 } 1065 1066 static int 1067 emu_memfree(struct sc_info *sc, void *buf) 1068 { 1069 u_int32_t idx, tmp; 1070 struct emu_mem *mem = &sc->mem; 1071 struct emu_memblk *blk, *i; 1072 1073 blk = NULL; 1074 SLIST_FOREACH(i, &mem->blocks, link) { 1075 if (i->buf == buf) 1076 blk = i; 1077 } 1078 if (blk == NULL) 1079 return EINVAL; 1080 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1081 emu_free(sc, buf); 1082 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1083 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1084 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1085 mem->ptb_pages[idx] = tmp | idx; 1086 } 1087 free(blk, M_DEVBUF); 1088 return 0; 1089 } 1090 1091 static int 1092 emu_memstart(struct sc_info *sc, void *buf) 1093 { 1094 struct emu_mem *mem = &sc->mem; 1095 struct emu_memblk *blk, *i; 1096 1097 blk = NULL; 1098 SLIST_FOREACH(i, &mem->blocks, link) { 1099 if (i->buf == buf) 1100 blk = i; 1101 } 1102 if (blk == NULL) 1103 return -EINVAL; 1104 return blk->pte_start; 1105 } 1106 1107 static void 1108 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, u_int32_t *pc) 1109 { 1110 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1111 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1112 (*pc)++; 1113 } 1114 1115 static void 1116 emu_initefx(struct sc_info *sc) 1117 { 1118 int i; 1119 u_int32_t pc = 16; 1120 1121 for (i = 0; i < 512; i++) { 1122 emu_wrefx(sc, i * 2, 0x10040); 1123 emu_wrefx(sc, i * 2 + 1, 0x610040); 1124 } 1125 1126 for (i = 0; i < 256; i++) 1127 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1128 1129 /* FX-8010 DSP Registers: 1130 FX Bus 1131 0x000-0x00f : 16 registers 1132 Input 1133 0x010/0x011 : AC97 Codec (l/r) 1134 0x012/0x013 : ADC, S/PDIF (l/r) 1135 0x014/0x015 : Mic(left), Zoom (l/r) 1136 0x016/0x017 : APS S/PDIF?? (l/r) 1137 Output 1138 0x020/0x021 : AC97 Output (l/r) 1139 0x022/0x023 : TOS link out (l/r) 1140 0x024/0x025 : ??? (l/r) 1141 0x026/0x027 : LiveDrive Headphone (l/r) 1142 0x028/0x029 : Rear Channel (l/r) 1143 0x02a/0x02b : ADC Recording Buffer (l/r) 1144 Constants 1145 0x040 - 0x044 = 0 - 4 1146 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1147 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1148 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1149 0x04e = 0x80000000, 0x04f = 0x7fffffff 1150 Temporary Values 1151 0x056 : Accumulator 1152 0x058 : Noise source? 1153 0x059 : Noise source? 1154 General Purpose Registers 1155 0x100 - 0x1ff 1156 Tank Memory Data Registers 1157 0x200 - 0x2ff 1158 Tank Memory Address Registers 1159 0x300 - 0x3ff 1160 */ 1161 1162 /* Operators: 1163 0 : z := w + (x * y >> 31) 1164 4 : z := w + x * y 1165 6 : z := w + x + y 1166 */ 1167 1168 /* Routing - this will be configurable in later version */ 1169 1170 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1171 emu_addefxop(sc, 4, 0x100, 0x12, 0, 0x44, &pc); 1172 emu_addefxop(sc, 4, 0x101, 0x13, 1, 0x44, &pc); 1173 /* GPR[0/1] += APS-input */ 1174 emu_addefxop(sc, 6, 0x100, 0x100, 0x40, sc->APS ? 0x16 : 0x40, &pc); 1175 emu_addefxop(sc, 6, 0x101, 0x101, 0x40, sc->APS ? 0x17 : 0x40, &pc); 1176 /* FrontOut (AC97) = GPR[0/1] */ 1177 emu_addefxop(sc, 6, 0x20, 0x40, 0x40, 0x100, &pc); 1178 emu_addefxop(sc, 6, 0x21, 0x40, 0x41, 0x101, &pc); 1179 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1180 /* RearVolume = GRP[0x10/0x11] */ 1181 emu_addefxop(sc, 0, 0x28, 0x40, 0x110, 0x100, &pc); 1182 emu_addefxop(sc, 0, 0x29, 0x40, 0x111, 0x101, &pc); 1183 /* TOS out = GPR[0/1] */ 1184 emu_addefxop(sc, 6, 0x22, 0x40, 0x40, 0x100, &pc); 1185 emu_addefxop(sc, 6, 0x23, 0x40, 0x40, 0x101, &pc); 1186 /* Mute Out2 */ 1187 emu_addefxop(sc, 6, 0x24, 0x40, 0x40, 0x40, &pc); 1188 emu_addefxop(sc, 6, 0x25, 0x40, 0x40, 0x40, &pc); 1189 /* Mute Out3 */ 1190 emu_addefxop(sc, 6, 0x26, 0x40, 0x40, 0x40, &pc); 1191 emu_addefxop(sc, 6, 0x27, 0x40, 0x40, 0x40, &pc); 1192 /* Input0 (AC97) -> Record */ 1193 emu_addefxop(sc, 6, 0x2a, 0x40, 0x40, 0x10, &pc); 1194 emu_addefxop(sc, 6, 0x2b, 0x40, 0x40, 0x11, &pc); 1195 1196 emu_wrptr(sc, 0, DBG, 0); 1197 } 1198 1199 /* Probe and attach the card */ 1200 static int 1201 emu_init(struct sc_info *sc) 1202 { 1203 u_int32_t spcs, ch, tmp, i; 1204 1205 /* disable audio and lock cache */ 1206 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1207 1208 /* reset recording buffers */ 1209 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1210 emu_wrptr(sc, 0, MICBA, 0); 1211 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1212 emu_wrptr(sc, 0, FXBA, 0); 1213 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1214 emu_wrptr(sc, 0, ADCBA, 0); 1215 1216 /* disable channel interrupt */ 1217 emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4); 1218 emu_wrptr(sc, 0, CLIEL, 0); 1219 emu_wrptr(sc, 0, CLIEH, 0); 1220 emu_wrptr(sc, 0, SOLEL, 0); 1221 emu_wrptr(sc, 0, SOLEH, 0); 1222 1223 /* init envelope engine */ 1224 for (ch = 0; ch < NUM_G; ch++) { 1225 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1226 emu_wrptr(sc, ch, IP, 0); 1227 emu_wrptr(sc, ch, VTFT, 0xffff); 1228 emu_wrptr(sc, ch, CVCF, 0xffff); 1229 emu_wrptr(sc, ch, PTRX, 0); 1230 emu_wrptr(sc, ch, CPF, 0); 1231 emu_wrptr(sc, ch, CCR, 0); 1232 1233 emu_wrptr(sc, ch, PSST, 0); 1234 emu_wrptr(sc, ch, DSL, 0x10); 1235 emu_wrptr(sc, ch, CCCA, 0); 1236 emu_wrptr(sc, ch, Z1, 0); 1237 emu_wrptr(sc, ch, Z2, 0); 1238 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1239 1240 emu_wrptr(sc, ch, ATKHLDM, 0); 1241 emu_wrptr(sc, ch, DCYSUSM, 0); 1242 emu_wrptr(sc, ch, IFATN, 0xffff); 1243 emu_wrptr(sc, ch, PEFE, 0); 1244 emu_wrptr(sc, ch, FMMOD, 0); 1245 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1246 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1247 emu_wrptr(sc, ch, TEMPENV, 0); 1248 1249 /*** these are last so OFF prevents writing ***/ 1250 emu_wrptr(sc, ch, LFOVAL2, 0); 1251 emu_wrptr(sc, ch, LFOVAL1, 0); 1252 emu_wrptr(sc, ch, ATKHLDV, 0); 1253 emu_wrptr(sc, ch, ENVVOL, 0); 1254 emu_wrptr(sc, ch, ENVVAL, 0); 1255 1256 sc->voice[ch].vnum = ch; 1257 sc->voice[ch].slave = NULL; 1258 sc->voice[ch].busy = 0; 1259 sc->voice[ch].ismaster = 0; 1260 sc->voice[ch].running = 0; 1261 sc->voice[ch].b16 = 0; 1262 sc->voice[ch].stereo = 0; 1263 sc->voice[ch].speed = 0; 1264 sc->voice[ch].start = 0; 1265 sc->voice[ch].end = 0; 1266 sc->voice[ch].channel = NULL; 1267 } 1268 sc->pnum = sc->rnum = 0; 1269 1270 /* 1271 * Init to 0x02109204 : 1272 * Clock accuracy = 0 (1000ppm) 1273 * Sample Rate = 2 (48kHz) 1274 * Audio Channel = 1 (Left of 2) 1275 * Source Number = 0 (Unspecified) 1276 * Generation Status = 1 (Original for Cat Code 12) 1277 * Cat Code = 12 (Digital Signal Mixer) 1278 * Mode = 0 (Mode 0) 1279 * Emphasis = 0 (None) 1280 * CP = 1 (Copyright unasserted) 1281 * AN = 0 (Audio data) 1282 * P = 0 (Consumer) 1283 */ 1284 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1285 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1286 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1287 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1288 emu_wrptr(sc, 0, SPCS0, spcs); 1289 emu_wrptr(sc, 0, SPCS1, spcs); 1290 emu_wrptr(sc, 0, SPCS2, spcs); 1291 1292 emu_initefx(sc); 1293 1294 SLIST_INIT(&sc->mem.blocks); 1295 sc->mem.ptb_pages = emu_malloc(sc, MAXPAGES * sizeof(u_int32_t)); 1296 if (sc->mem.ptb_pages == NULL) 1297 return -1; 1298 1299 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE); 1300 if (sc->mem.silent_page == NULL) { 1301 emu_free(sc, sc->mem.ptb_pages); 1302 return -1; 1303 } 1304 /* Clear page with silence & setup all pointers to this page */ 1305 bzero(sc->mem.silent_page, EMUPAGESIZE); 1306 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1307 for (i = 0; i < MAXPAGES; i++) 1308 sc->mem.ptb_pages[i] = tmp | i; 1309 1310 emu_wrptr(sc, 0, PTB, vtophys(sc->mem.ptb_pages)); 1311 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1312 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1313 1314 for (ch = 0; ch < NUM_G; ch++) { 1315 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1316 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1317 } 1318 1319 /* emu_memalloc(sc, EMUPAGESIZE); */ 1320 /* 1321 * Hokay, now enable the AUD bit 1322 * Enable Audio = 1 1323 * Mute Disable Audio = 0 1324 * Lock Tank Memory = 1 1325 * Lock Sound Memory = 0 1326 * Auto Mute = 1 1327 */ 1328 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE | HCFG_AUTOMUTE; 1329 if (sc->rev >= 6) 1330 tmp |= HCFG_JOYENABLE; 1331 emu_wr(sc, HCFG, tmp, 4); 1332 1333 /* TOSLink detection */ 1334 sc->tos_link = 0; 1335 tmp = emu_rd(sc, HCFG, 4); 1336 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1337 emu_wr(sc, HCFG, tmp | 0x800, 4); 1338 DELAY(50); 1339 if (tmp != (emu_rd(sc, HCFG, 4) & ~0x800)) { 1340 sc->tos_link = 1; 1341 emu_wr(sc, HCFG, tmp, 4); 1342 } 1343 } 1344 1345 return 0; 1346 } 1347 1348 static int 1349 emu_uninit(struct sc_info *sc) 1350 { 1351 u_int32_t ch; 1352 1353 emu_wr(sc, INTE, 0, 4); 1354 for (ch = 0; ch < NUM_G; ch++) 1355 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1356 for (ch = 0; ch < NUM_G; ch++) { 1357 emu_wrptr(sc, ch, VTFT, 0); 1358 emu_wrptr(sc, ch, CVCF, 0); 1359 emu_wrptr(sc, ch, PTRX, 0); 1360 emu_wrptr(sc, ch, CPF, 0); 1361 } 1362 1363 /* disable audio and lock cache */ 1364 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1365 1366 emu_wrptr(sc, 0, PTB, 0); 1367 /* reset recording buffers */ 1368 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1369 emu_wrptr(sc, 0, MICBA, 0); 1370 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1371 emu_wrptr(sc, 0, FXBA, 0); 1372 emu_wrptr(sc, 0, FXWC, 0); 1373 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1374 emu_wrptr(sc, 0, ADCBA, 0); 1375 emu_wrptr(sc, 0, TCB, 0); 1376 emu_wrptr(sc, 0, TCBS, 0); 1377 1378 /* disable channel interrupt */ 1379 emu_wrptr(sc, 0, CLIEL, 0); 1380 emu_wrptr(sc, 0, CLIEH, 0); 1381 emu_wrptr(sc, 0, SOLEL, 0); 1382 emu_wrptr(sc, 0, SOLEH, 0); 1383 1384 /* init envelope engine */ 1385 if (!SLIST_EMPTY(&sc->mem.blocks)) 1386 device_printf(sc->dev, "warning: memblock list not empty\n"); 1387 emu_free(sc, sc->mem.ptb_pages); 1388 emu_free(sc, sc->mem.silent_page); 1389 1390 return 0; 1391 } 1392 1393 static int 1394 emu_pci_probe(device_t dev) 1395 { 1396 char *s = NULL; 1397 1398 switch (pci_get_devid(dev)) { 1399 case EMU10K1_PCI_ID: 1400 s = "Creative EMU10K1"; 1401 break; 1402 } 1403 1404 if (s) device_set_desc(dev, s); 1405 return s? 0 : ENXIO; 1406 } 1407 1408 static int 1409 emu_pci_attach(device_t dev) 1410 { 1411 u_int32_t data; 1412 struct sc_info *sc; 1413 struct ac97_info *codec = NULL; 1414 int i, mapped; 1415 char status[SND_STATUSLEN]; 1416 1417 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT)) == NULL) { 1418 device_printf(dev, "cannot allocate softc\n"); 1419 return ENXIO; 1420 } 1421 1422 bzero(sc, sizeof(*sc)); 1423 sc->dev = dev; 1424 sc->type = pci_get_devid(dev); 1425 sc->rev = pci_get_revid(dev); 1426 1427 data = pci_read_config(dev, PCIR_COMMAND, 2); 1428 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 1429 pci_write_config(dev, PCIR_COMMAND, data, 2); 1430 data = pci_read_config(dev, PCIR_COMMAND, 2); 1431 1432 mapped = 0; 1433 for (i = 0; (mapped == 0) && (i < PCI_MAXMAPS_0); i++) { 1434 sc->regid = PCIR_MAPS + i*4; 1435 sc->regtype = SYS_RES_MEMORY; 1436 sc->reg = bus_alloc_resource(dev, sc->regtype, &sc->regid, 1437 0, ~0, 1, RF_ACTIVE); 1438 if (!sc->reg) { 1439 sc->regtype = SYS_RES_IOPORT; 1440 sc->reg = bus_alloc_resource(dev, sc->regtype, 1441 &sc->regid, 0, ~0, 1, 1442 RF_ACTIVE); 1443 } 1444 if (sc->reg) { 1445 sc->st = rman_get_bustag(sc->reg); 1446 sc->sh = rman_get_bushandle(sc->reg); 1447 mapped++; 1448 } 1449 } 1450 1451 if (mapped == 0) { 1452 device_printf(dev, "unable to map register space\n"); 1453 goto bad; 1454 } 1455 1456 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1457 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1458 /*highaddr*/BUS_SPACE_MAXADDR, 1459 /*filter*/NULL, /*filterarg*/NULL, 1460 /*maxsize*/262144, /*nsegments*/1, /*maxsegz*/0x3ffff, 1461 /*flags*/0, &sc->parent_dmat) != 0) { 1462 device_printf(dev, "unable to create dma tag\n"); 1463 goto bad; 1464 } 1465 1466 if (emu_init(sc) == -1) { 1467 device_printf(dev, "unable to initialize the card\n"); 1468 goto bad; 1469 } 1470 1471 codec = ac97_create(dev, sc, NULL, emu_rdcd, emu_wrcd); 1472 if (codec == NULL) goto bad; 1473 if (mixer_init(dev, &ac97_mixer, codec) == -1) goto bad; 1474 1475 sc->irqid = 0; 1476 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid, 1477 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 1478 if (!sc->irq || 1479 bus_setup_intr(dev, sc->irq, INTR_TYPE_TTY, emu_intr, sc, &sc->ih)) { 1480 device_printf(dev, "unable to map interrupt\n"); 1481 goto bad; 1482 } 1483 1484 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 1485 (sc->regtype == SYS_RES_IOPORT)? "io" : "memory", 1486 rman_get_start(sc->reg), rman_get_start(sc->irq)); 1487 1488 if (pcm_register(dev, sc, EMU_CHANS, 3)) goto bad; 1489 for (i = 0; i < EMU_CHANS; i++) 1490 pcm_addchan(dev, PCMDIR_PLAY, &emu_chantemplate, sc); 1491 for (i = 0; i < 3; i++) 1492 pcm_addchan(dev, PCMDIR_REC, &emur_chantemplate, sc); 1493 1494 pcm_setstatus(dev, status); 1495 1496 return 0; 1497 1498 bad: 1499 if (codec) ac97_destroy(codec); 1500 if (sc->reg) bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); 1501 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1502 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 1503 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1504 free(sc, M_DEVBUF); 1505 return ENXIO; 1506 } 1507 1508 static int 1509 emu_pci_detach(device_t dev) 1510 { 1511 int r; 1512 struct sc_info *sc; 1513 1514 r = pcm_unregister(dev); 1515 if (r) 1516 return r; 1517 1518 sc = pcm_getdevinfo(dev); 1519 /* shutdown chip */ 1520 emu_uninit(sc); 1521 1522 bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); 1523 bus_teardown_intr(dev, sc->irq, sc->ih); 1524 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 1525 bus_dma_tag_destroy(sc->parent_dmat); 1526 free(sc, M_DEVBUF); 1527 1528 return 0; 1529 } 1530 1531 /* add suspend, resume */ 1532 static device_method_t emu_methods[] = { 1533 /* Device interface */ 1534 DEVMETHOD(device_probe, emu_pci_probe), 1535 DEVMETHOD(device_attach, emu_pci_attach), 1536 DEVMETHOD(device_detach, emu_pci_detach), 1537 1538 { 0, 0 } 1539 }; 1540 1541 static driver_t emu_driver = { 1542 "pcm", 1543 emu_methods, 1544 sizeof(snddev_info), 1545 }; 1546 1547 static devclass_t pcm_devclass; 1548 1549 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0); 1550 MODULE_DEPEND(snd_emu10k1, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 1551 MODULE_VERSION(snd_emu10k1, 1); 1552 1553 /* dummy driver to silence the joystick device */ 1554 static int 1555 emujoy_pci_probe(device_t dev) 1556 { 1557 char *s = NULL; 1558 1559 switch (pci_get_devid(dev)) { 1560 case 0x70021102: 1561 s = "Creative EMU10K1 Joystick"; 1562 device_quiet(dev); 1563 break; 1564 } 1565 1566 if (s) device_set_desc(dev, s); 1567 return s? 0 : ENXIO; 1568 } 1569 1570 static int 1571 emujoy_pci_attach(device_t dev) 1572 { 1573 return 0; 1574 } 1575 1576 static int 1577 emujoy_pci_detach(device_t dev) 1578 { 1579 return 0; 1580 } 1581 1582 static device_method_t emujoy_methods[] = { 1583 DEVMETHOD(device_probe, emujoy_pci_probe), 1584 DEVMETHOD(device_attach, emujoy_pci_attach), 1585 DEVMETHOD(device_detach, emujoy_pci_detach), 1586 1587 { 0, 0 } 1588 }; 1589 1590 static driver_t emujoy_driver = { 1591 "emujoy", 1592 emujoy_methods, 1593 8, 1594 }; 1595 1596 static devclass_t emujoy_devclass; 1597 1598 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0); 1599 1600