1 /* 2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org> 3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it> 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <dev/sound/pcm/sound.h> 30 #include <dev/sound/pcm/ac97.h> 31 #include <gnu/dev/sound/pci/emu10k1.h> 32 #include "emu10k1-alsa%diked.h" 33 34 #include <dev/pci/pcireg.h> 35 #include <dev/pci/pcivar.h> 36 #include <sys/queue.h> 37 38 SND_DECLARE_FILE("$FreeBSD$"); 39 40 /* -------------------------------------------------------------------- */ 41 42 #define NUM_G 64 /* use all channels */ 43 #define WAVEOUT_MAXBUFSIZE 32768 44 #define EMUPAGESIZE 4096 /* don't change */ 45 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE) 46 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */ 47 #define EMU10K2_PCI_ID 0x00041102 48 #define EMU_DEFAULT_BUFSZ 4096 49 #define EMU_MAX_CHANS 8 50 #define EMU_CHANS 4 51 52 #define MAXREQVOICES 8 53 #define RESERVED 0 54 #define NUM_MIDI 16 55 #define NUM_FXSENDS 4 56 57 #define TMEMSIZE 256*1024 58 #define TMEMSIZEREG 4 59 60 #define ENABLE 0xffffffff 61 #define DISABLE 0x00000000 62 #define ENV_ON DCYSUSV_CHANNELENABLE_MASK 63 #define ENV_OFF 0x00 /* XXX: should this be 1? */ 64 65 #define A_IOCFG_GPOUT_A 0x40 /* Analog Output */ 66 #define A_IOCFG_GPOUT_D 0x04 /* Digital Output */ 67 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */ 68 69 struct emu_memblk { 70 SLIST_ENTRY(emu_memblk) link; 71 void *buf; 72 bus_addr_t buf_addr; 73 u_int32_t pte_start, pte_size; 74 }; 75 76 struct emu_mem { 77 u_int8_t bmap[EMUMAXPAGES / 8]; 78 u_int32_t *ptb_pages; 79 void *silent_page; 80 bus_addr_t silent_page_addr; 81 bus_addr_t ptb_pages_addr; 82 SLIST_HEAD(, emu_memblk) blocks; 83 }; 84 85 struct emu_voice { 86 int vnum; 87 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 88 int speed; 89 int start, end, vol; 90 int fxrt1; /* FX routing */ 91 int fxrt2; /* FX routing (only for audigy) */ 92 u_int32_t buf; 93 struct emu_voice *slave; 94 struct pcm_channel *channel; 95 }; 96 97 struct sc_info; 98 99 /* channel registers */ 100 struct sc_pchinfo { 101 int spd, fmt, blksz, run; 102 struct emu_voice *master, *slave; 103 struct snd_dbuf *buffer; 104 struct pcm_channel *channel; 105 struct sc_info *parent; 106 }; 107 108 struct sc_rchinfo { 109 int spd, fmt, run, blksz, num; 110 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 111 struct snd_dbuf *buffer; 112 struct pcm_channel *channel; 113 struct sc_info *parent; 114 }; 115 116 /* device private data */ 117 struct sc_info { 118 device_t dev; 119 u_int32_t type, rev; 120 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1; 121 u_int32_t addrmask; /* wider if audigy */ 122 123 bus_space_tag_t st; 124 bus_space_handle_t sh; 125 bus_dma_tag_t parent_dmat; 126 127 struct resource *reg, *irq; 128 void *ih; 129 struct mtx *lock; 130 131 unsigned int bufsz; 132 int timer, timerinterval; 133 int pnum, rnum; 134 int nchans; 135 struct emu_mem mem; 136 struct emu_voice voice[64]; 137 struct sc_pchinfo pch[EMU_MAX_CHANS]; 138 struct sc_rchinfo rch[3]; 139 }; 140 141 /* -------------------------------------------------------------------- */ 142 143 /* 144 * prototypes 145 */ 146 147 /* stuff */ 148 static int emu_init(struct sc_info *); 149 static void emu_intr(void *); 150 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 151 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 152 static int emu_memfree(struct sc_info *sc, void *buf); 153 static int emu_memstart(struct sc_info *sc, void *buf); 154 #ifdef EMUDEBUG 155 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 156 #endif 157 158 /* talk to the card */ 159 static u_int32_t emu_rd(struct sc_info *, int, int); 160 static void emu_wr(struct sc_info *, int, u_int32_t, int); 161 162 /* -------------------------------------------------------------------- */ 163 164 static u_int32_t emu_rfmt_ac97[] = { 165 AFMT_S16_LE, 166 AFMT_STEREO | AFMT_S16_LE, 167 0 168 }; 169 170 static u_int32_t emu_rfmt_mic[] = { 171 AFMT_U8, 172 0 173 }; 174 175 static u_int32_t emu_rfmt_efx[] = { 176 AFMT_STEREO | AFMT_S16_LE, 177 0 178 }; 179 180 static struct pcmchan_caps emu_reccaps[3] = { 181 {8000, 48000, emu_rfmt_ac97, 0}, 182 {8000, 8000, emu_rfmt_mic, 0}, 183 {48000, 48000, emu_rfmt_efx, 0}, 184 }; 185 186 static u_int32_t emu_pfmt[] = { 187 AFMT_U8, 188 AFMT_STEREO | AFMT_U8, 189 AFMT_S16_LE, 190 AFMT_STEREO | AFMT_S16_LE, 191 0 192 }; 193 194 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 195 196 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 197 /* audigy supports 12kHz. */ 198 static int audigy_adcspeed[9] = { 199 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000 200 }; 201 202 /* -------------------------------------------------------------------- */ 203 /* Hardware */ 204 static u_int32_t 205 emu_rd(struct sc_info *sc, int regno, int size) 206 { 207 switch (size) { 208 case 1: 209 return bus_space_read_1(sc->st, sc->sh, regno); 210 case 2: 211 return bus_space_read_2(sc->st, sc->sh, regno); 212 case 4: 213 return bus_space_read_4(sc->st, sc->sh, regno); 214 default: 215 return 0xffffffff; 216 } 217 } 218 219 static void 220 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 221 { 222 switch (size) { 223 case 1: 224 bus_space_write_1(sc->st, sc->sh, regno, data); 225 break; 226 case 2: 227 bus_space_write_2(sc->st, sc->sh, regno, data); 228 break; 229 case 4: 230 bus_space_write_4(sc->st, sc->sh, regno, data); 231 break; 232 } 233 } 234 235 static u_int32_t 236 emu_rdptr(struct sc_info *sc, int chn, int reg) 237 { 238 u_int32_t ptr, val, mask, size, offset; 239 240 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 241 emu_wr(sc, PTR, ptr, 4); 242 val = emu_rd(sc, DATA, 4); 243 if (reg & 0xff000000) { 244 size = (reg >> 24) & 0x3f; 245 offset = (reg >> 16) & 0x1f; 246 mask = ((1 << size) - 1) << offset; 247 val &= mask; 248 val >>= offset; 249 } 250 return val; 251 } 252 253 static void 254 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 255 { 256 u_int32_t ptr, mask, size, offset; 257 258 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 259 emu_wr(sc, PTR, ptr, 4); 260 if (reg & 0xff000000) { 261 size = (reg >> 24) & 0x3f; 262 offset = (reg >> 16) & 0x1f; 263 mask = ((1 << size) - 1) << offset; 264 data <<= offset; 265 data &= mask; 266 data |= emu_rd(sc, DATA, 4) & ~mask; 267 } 268 emu_wr(sc, DATA, data, 4); 269 } 270 271 static void 272 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 273 { 274 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE; 275 emu_wrptr(sc, 0, pc, data); 276 } 277 278 /* -------------------------------------------------------------------- */ 279 /* ac97 codec */ 280 /* no locking needed */ 281 282 static int 283 emu_rdcd(kobj_t obj, void *devinfo, int regno) 284 { 285 struct sc_info *sc = (struct sc_info *)devinfo; 286 287 emu_wr(sc, AC97ADDRESS, regno, 1); 288 return emu_rd(sc, AC97DATA, 2); 289 } 290 291 static int 292 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 293 { 294 struct sc_info *sc = (struct sc_info *)devinfo; 295 296 emu_wr(sc, AC97ADDRESS, regno, 1); 297 emu_wr(sc, AC97DATA, data, 2); 298 return 0; 299 } 300 301 static kobj_method_t emu_ac97_methods[] = { 302 KOBJMETHOD(ac97_read, emu_rdcd), 303 KOBJMETHOD(ac97_write, emu_wrcd), 304 { 0, 0 } 305 }; 306 AC97_DECLARE(emu_ac97); 307 308 /* -------------------------------------------------------------------- */ 309 /* stuff */ 310 static int 311 emu_settimer(struct sc_info *sc) 312 { 313 struct sc_pchinfo *pch; 314 struct sc_rchinfo *rch; 315 int i, tmp, rate; 316 317 rate = 0; 318 for (i = 0; i < sc->nchans; i++) { 319 pch = &sc->pch[i]; 320 if (pch->buffer) { 321 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) 322 / pch->blksz; 323 if (tmp > rate) 324 rate = tmp; 325 } 326 } 327 328 for (i = 0; i < 3; i++) { 329 rch = &sc->rch[i]; 330 if (rch->buffer) { 331 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) 332 / rch->blksz; 333 if (tmp > rate) 334 rate = tmp; 335 } 336 } 337 RANGE(rate, 48, 9600); 338 sc->timerinterval = 48000 / rate; 339 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 340 341 return sc->timerinterval; 342 } 343 344 static int 345 emu_enatimer(struct sc_info *sc, int go) 346 { 347 u_int32_t x; 348 if (go) { 349 if (sc->timer++ == 0) { 350 x = emu_rd(sc, INTE, 4); 351 x |= INTE_INTERVALTIMERENB; 352 emu_wr(sc, INTE, x, 4); 353 } 354 } else { 355 sc->timer = 0; 356 x = emu_rd(sc, INTE, 4); 357 x &= ~INTE_INTERVALTIMERENB; 358 emu_wr(sc, INTE, x, 4); 359 } 360 return 0; 361 } 362 363 static void 364 emu_enastop(struct sc_info *sc, char channel, int enable) 365 { 366 int reg = (channel & 0x20) ? SOLEH : SOLEL; 367 channel &= 0x1f; 368 reg |= 1 << 24; 369 reg |= channel << 16; 370 emu_wrptr(sc, 0, reg, enable); 371 } 372 373 static int 374 emu_recval(int speed) { 375 int val; 376 377 val = 0; 378 while (val < 7 && speed < adcspeed[val]) 379 val++; 380 return val; 381 } 382 383 static int 384 audigy_recval(int speed) { 385 int val; 386 387 val = 0; 388 while (val < 8 && speed < audigy_adcspeed[val]) 389 val++; 390 return val; 391 } 392 393 static u_int32_t 394 emu_rate_to_pitch(u_int32_t rate) 395 { 396 static u_int32_t logMagTable[128] = { 397 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 398 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 399 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 400 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 401 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 402 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 403 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 404 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 405 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 406 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 407 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 408 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 409 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 410 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 411 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 412 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 413 }; 414 static char logSlopeTable[128] = { 415 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 416 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 417 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 418 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 419 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 420 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 421 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 422 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 423 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 424 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 425 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 426 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 427 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 428 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 429 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 430 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 431 }; 432 int i; 433 434 if (rate == 0) 435 return 0; /* Bail out if no leading "1" */ 436 rate *= 11185; /* Scale 48000 to 0x20002380 */ 437 for (i = 31; i > 0; i--) { 438 if (rate & 0x80000000) { /* Detect leading "1" */ 439 return (((u_int32_t) (i - 15) << 20) + 440 logMagTable[0x7f & (rate >> 24)] + 441 (0x7f & (rate >> 17)) * 442 logSlopeTable[0x7f & (rate >> 24)]); 443 } 444 rate <<= 1; 445 } 446 447 return 0; /* Should never reach this point */ 448 } 449 450 static u_int32_t 451 emu_rate_to_linearpitch(u_int32_t rate) 452 { 453 rate = (rate << 8) / 375; 454 return (rate >> 1) + (rate & 1); 455 } 456 457 static struct emu_voice * 458 emu_valloc(struct sc_info *sc) 459 { 460 struct emu_voice *v; 461 int i; 462 463 v = NULL; 464 for (i = 0; i < 64 && sc->voice[i].busy; i++); 465 if (i < 64) { 466 v = &sc->voice[i]; 467 v->busy = 1; 468 } 469 return v; 470 } 471 472 static int 473 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 474 u_int32_t sz, struct snd_dbuf *b) 475 { 476 void *buf; 477 bus_addr_t tmp_addr; 478 479 buf = emu_memalloc(sc, sz, &tmp_addr); 480 if (buf == NULL) 481 return -1; 482 if (b != NULL) 483 sndbuf_setup(b, buf, sz); 484 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 485 m->end = m->start + sz; 486 m->channel = NULL; 487 m->speed = 0; 488 m->b16 = 0; 489 m->stereo = 0; 490 m->running = 0; 491 m->ismaster = 1; 492 m->vol = 0xff; 493 m->buf = tmp_addr; 494 m->slave = s; 495 if (sc->audigy) { 496 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_LEFT << 8 | 497 FXBUS_PCM_RIGHT << 16 | FXBUS_MIDI_REVERB << 24; 498 m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */ 499 } else { 500 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_LEFT << 4 | 501 FXBUS_PCM_RIGHT << 8 | FXBUS_MIDI_REVERB << 12; 502 m->fxrt2 = 0; 503 } 504 505 if (s != NULL) { 506 s->start = m->start; 507 s->end = m->end; 508 s->channel = NULL; 509 s->speed = 0; 510 s->b16 = 0; 511 s->stereo = 0; 512 s->running = 0; 513 s->ismaster = 0; 514 s->vol = m->vol; 515 s->buf = m->buf; 516 s->fxrt1 = m->fxrt1; 517 s->fxrt2 = m->fxrt2; 518 s->slave = NULL; 519 } 520 return 0; 521 } 522 523 static void 524 emu_vsetup(struct sc_pchinfo *ch) 525 { 526 struct emu_voice *v = ch->master; 527 528 if (ch->fmt) { 529 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0; 530 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0; 531 if (v->slave != NULL) { 532 v->slave->b16 = v->b16; 533 v->slave->stereo = v->stereo; 534 } 535 } 536 if (ch->spd) { 537 v->speed = ch->spd; 538 if (v->slave != NULL) 539 v->slave->speed = v->speed; 540 } 541 } 542 543 static void 544 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 545 { 546 int s; 547 int l, r, x, y; 548 u_int32_t sa, ea, start, val, silent_page; 549 550 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 551 552 sa = v->start >> s; 553 ea = v->end >> s; 554 555 l = r = x = y = v->vol; 556 if (v->stereo) { 557 l = v->ismaster ? l : 0; 558 r = v->ismaster ? 0 : r; 559 } 560 561 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0); 562 val = v->stereo ? 28 : 30; 563 val *= v->b16 ? 1 : 2; 564 start = sa + val; 565 566 if (sc->audigy) { 567 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1); 568 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2); 569 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0); 570 } 571 else 572 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16); 573 574 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 575 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 576 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 577 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT)); 578 579 emu_wrptr(sc, v->vnum, Z1, 0); 580 emu_wrptr(sc, v->vnum, Z2, 0); 581 582 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1) 583 | MAP_PTI_MASK; 584 emu_wrptr(sc, v->vnum, MAPA, silent_page); 585 emu_wrptr(sc, v->vnum, MAPB, silent_page); 586 587 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 588 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 589 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 590 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 591 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 592 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 593 emu_wrptr(sc, v->vnum, FMMOD, 0); 594 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 595 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 596 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 597 598 emu_wrptr(sc, v->vnum, ATKHLDV, 599 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 600 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 601 602 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 603 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 604 605 if (v->slave != NULL) 606 emu_vwrite(sc, v->slave); 607 } 608 609 static void 610 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 611 { 612 u_int32_t pitch_target, initial_pitch; 613 u_int32_t cra, cs, ccis; 614 u_int32_t sample, i; 615 616 if (go) { 617 cra = 64; 618 cs = v->stereo ? 4 : 2; 619 ccis = v->stereo ? 28 : 30; 620 ccis *= v->b16 ? 1 : 2; 621 sample = v->b16 ? 0x00000000 : 0x80808080; 622 623 for (i = 0; i < cs; i++) 624 emu_wrptr(sc, v->vnum, CD0 + i, sample); 625 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 626 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 627 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 628 629 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 630 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 631 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 632 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 633 emu_enastop(sc, v->vnum, 0); 634 635 pitch_target = emu_rate_to_linearpitch(v->speed); 636 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 637 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 638 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 639 emu_wrptr(sc, v->vnum, IP, initial_pitch); 640 } else { 641 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 642 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 643 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 644 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 645 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 646 emu_wrptr(sc, v->vnum, IP, 0); 647 emu_enastop(sc, v->vnum, 1); 648 } 649 if (v->slave != NULL) 650 emu_vtrigger(sc, v->slave, go); 651 } 652 653 static int 654 emu_vpos(struct sc_info *sc, struct emu_voice *v) 655 { 656 int s, ptr; 657 658 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 659 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 660 return ptr & ~0x0000001f; 661 } 662 663 #ifdef EMUDEBUG 664 static void 665 emu_vdump(struct sc_info *sc, struct emu_voice *v) 666 { 667 char *regname[] = { 668 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 669 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 670 "envvol", "atkhldv", "dcysusv", "lfoval1", 671 "envval", "atkhldm", "dcysusm", "lfoval2", 672 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 673 "tempenv" 674 }; 675 char *regname2[] = { 676 "mudata1", "mustat1", "mudata2", "mustat2", 677 "fxwc1", "fxwc2", "spdrate", NULL, NULL, 678 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1", 679 NULL, NULL 680 }; 681 int i, x; 682 683 printf("voice number %d\n", v->vnum); 684 for (i = 0, x = 0; i <= 0x1e; i++) { 685 if (regname[i] == NULL) 686 continue; 687 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 688 printf("%s", (x == 2) ? "\n" : "\t"); 689 x++; 690 if (x > 2) 691 x = 0; 692 } 693 694 /* Print out audigy extra registers */ 695 if (sc->audigy) { 696 for (i = 0; i <= 0xe; i++) { 697 if (regname2[i] == NULL) 698 continue; 699 printf("%s\t[%08x]", regname2[i], 700 emu_rdptr(sc, v->vnum, i + 0x70)); 701 printf("%s", (x == 2)? "\n" : "\t"); 702 x++; 703 if (x > 2) 704 x = 0; 705 } 706 } 707 printf("\n\n"); 708 } 709 #endif 710 711 /* channel interface */ 712 static void * 713 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 714 struct pcm_channel *c, int dir) 715 { 716 struct sc_info *sc = devinfo; 717 struct sc_pchinfo *ch; 718 void *r; 719 720 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 721 ch = &sc->pch[sc->pnum++]; 722 ch->buffer = b; 723 ch->parent = sc; 724 ch->channel = c; 725 ch->blksz = sc->bufsz / 2; 726 ch->fmt = AFMT_U8; 727 ch->spd = 8000; 728 snd_mtxlock(sc->lock); 729 ch->master = emu_valloc(sc); 730 ch->slave = emu_valloc(sc); 731 snd_mtxunlock(sc->lock); 732 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer)) 733 ? NULL : ch; 734 735 return r; 736 } 737 738 static int 739 emupchan_free(kobj_t obj, void *data) 740 { 741 struct sc_pchinfo *ch = data; 742 struct sc_info *sc = ch->parent; 743 int r; 744 745 snd_mtxlock(sc->lock); 746 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 747 snd_mtxunlock(sc->lock); 748 749 return r; 750 } 751 752 static int 753 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 754 { 755 struct sc_pchinfo *ch = data; 756 757 ch->fmt = format; 758 return 0; 759 } 760 761 static int 762 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 763 { 764 struct sc_pchinfo *ch = data; 765 766 ch->spd = speed; 767 return ch->spd; 768 } 769 770 static int 771 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 772 { 773 struct sc_pchinfo *ch = data; 774 struct sc_info *sc = ch->parent; 775 int irqrate, blksz; 776 777 ch->blksz = blocksize; 778 snd_mtxlock(sc->lock); 779 emu_settimer(sc); 780 irqrate = 48000 / sc->timerinterval; 781 snd_mtxunlock(sc->lock); 782 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 783 return blocksize; 784 } 785 786 static int 787 emupchan_trigger(kobj_t obj, void *data, int go) 788 { 789 struct sc_pchinfo *ch = data; 790 struct sc_info *sc = ch->parent; 791 792 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 793 return 0; 794 795 snd_mtxlock(sc->lock); 796 if (go == PCMTRIG_START) { 797 emu_vsetup(ch); 798 emu_vwrite(sc, ch->master); 799 emu_settimer(sc); 800 emu_enatimer(sc, 1); 801 #ifdef EMUDEBUG 802 printf("start [%d bit, %s, %d hz]\n", 803 ch->master->b16 ? 16 : 8, 804 ch->master->stereo ? "stereo" : "mono", 805 ch->master->speed); 806 emu_vdump(sc, ch->master); 807 emu_vdump(sc, ch->slave); 808 #endif 809 } 810 ch->run = (go == PCMTRIG_START) ? 1 : 0; 811 emu_vtrigger(sc, ch->master, ch->run); 812 snd_mtxunlock(sc->lock); 813 return 0; 814 } 815 816 static int 817 emupchan_getptr(kobj_t obj, void *data) 818 { 819 struct sc_pchinfo *ch = data; 820 struct sc_info *sc = ch->parent; 821 int r; 822 823 snd_mtxlock(sc->lock); 824 r = emu_vpos(sc, ch->master); 825 snd_mtxunlock(sc->lock); 826 827 return r; 828 } 829 830 static struct pcmchan_caps * 831 emupchan_getcaps(kobj_t obj, void *data) 832 { 833 return &emu_playcaps; 834 } 835 836 static kobj_method_t emupchan_methods[] = { 837 KOBJMETHOD(channel_init, emupchan_init), 838 KOBJMETHOD(channel_free, emupchan_free), 839 KOBJMETHOD(channel_setformat, emupchan_setformat), 840 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 841 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 842 KOBJMETHOD(channel_trigger, emupchan_trigger), 843 KOBJMETHOD(channel_getptr, emupchan_getptr), 844 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 845 { 0, 0 } 846 }; 847 CHANNEL_DECLARE(emupchan); 848 849 /* channel interface */ 850 static void * 851 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 852 struct pcm_channel *c, int dir) 853 { 854 struct sc_info *sc = devinfo; 855 struct sc_rchinfo *ch; 856 857 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 858 ch = &sc->rch[sc->rnum]; 859 ch->buffer = b; 860 ch->parent = sc; 861 ch->channel = c; 862 ch->blksz = sc->bufsz / 2; 863 ch->fmt = AFMT_U8; 864 ch->spd = 8000; 865 ch->num = sc->rnum; 866 switch(sc->rnum) { 867 case 0: 868 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX; 869 ch->basereg = ADCBA; 870 ch->sizereg = ADCBS; 871 ch->setupreg = ADCCR; 872 ch->irqmask = INTE_ADCBUFENABLE; 873 break; 874 875 case 1: 876 ch->idxreg = FXIDX; 877 ch->basereg = FXBA; 878 ch->sizereg = FXBS; 879 ch->setupreg = FXWC; 880 ch->irqmask = INTE_EFXBUFENABLE; 881 break; 882 883 case 2: 884 ch->idxreg = MICIDX; 885 ch->basereg = MICBA; 886 ch->sizereg = MICBS; 887 ch->setupreg = 0; 888 ch->irqmask = INTE_MICBUFENABLE; 889 break; 890 } 891 sc->rnum++; 892 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) == -1) 893 return NULL; 894 else { 895 snd_mtxlock(sc->lock); 896 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer)); 897 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 898 snd_mtxunlock(sc->lock); 899 return ch; 900 } 901 } 902 903 static int 904 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 905 { 906 struct sc_rchinfo *ch = data; 907 908 ch->fmt = format; 909 return 0; 910 } 911 912 static int 913 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 914 { 915 struct sc_rchinfo *ch = data; 916 917 if (ch->num == 0) { 918 if (ch->parent->audigy) 919 speed = audigy_adcspeed[audigy_recval(speed)]; 920 else 921 speed = adcspeed[emu_recval(speed)]; 922 } 923 if (ch->num == 1) 924 speed = 48000; 925 if (ch->num == 2) 926 speed = 8000; 927 ch->spd = speed; 928 return ch->spd; 929 } 930 931 static int 932 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 933 { 934 struct sc_rchinfo *ch = data; 935 struct sc_info *sc = ch->parent; 936 int irqrate, blksz; 937 938 ch->blksz = blocksize; 939 snd_mtxlock(sc->lock); 940 emu_settimer(sc); 941 irqrate = 48000 / sc->timerinterval; 942 snd_mtxunlock(sc->lock); 943 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 944 return blocksize; 945 } 946 947 /* semantic note: must start at beginning of buffer */ 948 static int 949 emurchan_trigger(kobj_t obj, void *data, int go) 950 { 951 struct sc_rchinfo *ch = data; 952 struct sc_info *sc = ch->parent; 953 u_int32_t val, sz; 954 955 switch(sc->bufsz) { 956 case 4096: 957 sz = ADCBS_BUFSIZE_4096; 958 break; 959 960 case 8192: 961 sz = ADCBS_BUFSIZE_8192; 962 break; 963 964 case 16384: 965 sz = ADCBS_BUFSIZE_16384; 966 break; 967 968 case 32768: 969 sz = ADCBS_BUFSIZE_32768; 970 break; 971 972 case 65536: 973 sz = ADCBS_BUFSIZE_65536; 974 break; 975 976 default: 977 sz = ADCBS_BUFSIZE_4096; 978 } 979 980 snd_mtxlock(sc->lock); 981 switch(go) { 982 case PCMTRIG_START: 983 ch->run = 1; 984 emu_wrptr(sc, 0, ch->sizereg, sz); 985 if (ch->num == 0) { 986 if (sc->audigy) { 987 val = A_ADCCR_LCHANENABLE; 988 if (ch->fmt & AFMT_STEREO) 989 val |= A_ADCCR_RCHANENABLE; 990 val |= audigy_recval(ch->spd); 991 } else { 992 val = ADCCR_LCHANENABLE; 993 if (ch->fmt & AFMT_STEREO) 994 val |= ADCCR_RCHANENABLE; 995 val |= emu_recval(ch->spd); 996 } 997 998 emu_wrptr(sc, 0, ch->setupreg, 0); 999 emu_wrptr(sc, 0, ch->setupreg, val); 1000 } 1001 val = emu_rd(sc, INTE, 4); 1002 val |= ch->irqmask; 1003 emu_wr(sc, INTE, val, 4); 1004 break; 1005 1006 case PCMTRIG_STOP: 1007 case PCMTRIG_ABORT: 1008 ch->run = 0; 1009 emu_wrptr(sc, 0, ch->sizereg, 0); 1010 if (ch->setupreg) 1011 emu_wrptr(sc, 0, ch->setupreg, 0); 1012 val = emu_rd(sc, INTE, 4); 1013 val &= ~ch->irqmask; 1014 emu_wr(sc, INTE, val, 4); 1015 break; 1016 1017 case PCMTRIG_EMLDMAWR: 1018 case PCMTRIG_EMLDMARD: 1019 default: 1020 break; 1021 } 1022 snd_mtxunlock(sc->lock); 1023 1024 return 0; 1025 } 1026 1027 static int 1028 emurchan_getptr(kobj_t obj, void *data) 1029 { 1030 struct sc_rchinfo *ch = data; 1031 struct sc_info *sc = ch->parent; 1032 int r; 1033 1034 snd_mtxlock(sc->lock); 1035 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 1036 snd_mtxunlock(sc->lock); 1037 1038 return r; 1039 } 1040 1041 static struct pcmchan_caps * 1042 emurchan_getcaps(kobj_t obj, void *data) 1043 { 1044 struct sc_rchinfo *ch = data; 1045 1046 return &emu_reccaps[ch->num]; 1047 } 1048 1049 static kobj_method_t emurchan_methods[] = { 1050 KOBJMETHOD(channel_init, emurchan_init), 1051 KOBJMETHOD(channel_setformat, emurchan_setformat), 1052 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 1053 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 1054 KOBJMETHOD(channel_trigger, emurchan_trigger), 1055 KOBJMETHOD(channel_getptr, emurchan_getptr), 1056 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 1057 { 0, 0 } 1058 }; 1059 CHANNEL_DECLARE(emurchan); 1060 1061 /* -------------------------------------------------------------------- */ 1062 /* The interrupt handler */ 1063 static void 1064 emu_intr(void *p) 1065 { 1066 struct sc_info *sc = (struct sc_info *)p; 1067 u_int32_t stat, ack, i, x; 1068 1069 while (1) { 1070 stat = emu_rd(sc, IPR, 4); 1071 if (stat == 0) 1072 break; 1073 ack = 0; 1074 1075 /* process irq */ 1076 if (stat & IPR_INTERVALTIMER) { 1077 ack |= IPR_INTERVALTIMER; 1078 x = 0; 1079 for (i = 0; i < sc->nchans; i++) { 1080 if (sc->pch[i].run) { 1081 x = 1; 1082 chn_intr(sc->pch[i].channel); 1083 } 1084 } 1085 if (x == 0) 1086 emu_enatimer(sc, 0); 1087 } 1088 1089 1090 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 1091 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 1092 if (sc->rch[0].channel) 1093 chn_intr(sc->rch[0].channel); 1094 } 1095 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 1096 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 1097 if (sc->rch[1].channel) 1098 chn_intr(sc->rch[1].channel); 1099 } 1100 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 1101 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 1102 if (sc->rch[2].channel) 1103 chn_intr(sc->rch[2].channel); 1104 } 1105 if (stat & IPR_PCIERROR) { 1106 ack |= IPR_PCIERROR; 1107 device_printf(sc->dev, "pci error\n"); 1108 /* we still get an nmi with ecc ram even if we ack this */ 1109 } 1110 if (stat & IPR_SAMPLERATETRACKER) { 1111 ack |= IPR_SAMPLERATETRACKER; 1112 #ifdef EMUDEBUG 1113 device_printf(sc->dev, 1114 "sample rate tracker lock status change\n"); 1115 #endif 1116 } 1117 1118 if (stat & ~ack) 1119 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", stat & ~ack); 1120 1121 emu_wr(sc, IPR, stat, 4); 1122 } 1123 } 1124 1125 /* -------------------------------------------------------------------- */ 1126 1127 static void 1128 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1129 { 1130 bus_addr_t *phys = arg; 1131 1132 *phys = error ? 0 : (bus_addr_t)segs->ds_addr; 1133 1134 if (bootverbose) { 1135 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 1136 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1137 nseg, error); 1138 } 1139 } 1140 1141 static void * 1142 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1143 { 1144 void *buf; 1145 bus_dmamap_t map; 1146 1147 *addr = 0; 1148 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1149 return NULL; 1150 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0) 1151 || !*addr) 1152 return NULL; 1153 return buf; 1154 } 1155 1156 static void 1157 emu_free(struct sc_info *sc, void *buf) 1158 { 1159 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1160 } 1161 1162 static void * 1163 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1164 { 1165 u_int32_t blksz, start, idx, ofs, tmp, found; 1166 struct emu_mem *mem = &sc->mem; 1167 struct emu_memblk *blk; 1168 void *buf; 1169 1170 blksz = sz / EMUPAGESIZE; 1171 if (sz > (blksz * EMUPAGESIZE)) 1172 blksz++; 1173 /* find a free block in the bitmap */ 1174 found = 0; 1175 start = 1; 1176 while (!found && start + blksz < EMUMAXPAGES) { 1177 found = 1; 1178 for (idx = start; idx < start + blksz; idx++) 1179 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1180 found = 0; 1181 if (!found) 1182 start++; 1183 } 1184 if (!found) 1185 return NULL; 1186 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1187 if (blk == NULL) 1188 return NULL; 1189 buf = emu_malloc(sc, sz, &blk->buf_addr); 1190 *addr = blk->buf_addr; 1191 if (buf == NULL) { 1192 free(blk, M_DEVBUF); 1193 return NULL; 1194 } 1195 blk->buf = buf; 1196 blk->pte_start = start; 1197 blk->pte_size = blksz; 1198 #ifdef EMUDEBUG 1199 printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, 1200 blk->pte_start, blk->pte_size); 1201 #endif 1202 ofs = 0; 1203 for (idx = start; idx < start + blksz; idx++) { 1204 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1205 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs); 1206 #ifdef EMUDEBUG 1207 printf("pte[%d] -> %x phys, %x virt\n", idx, tmp, 1208 ((u_int32_t)buf) + ofs); 1209 #endif 1210 mem->ptb_pages[idx] = (tmp << 1) | idx; 1211 ofs += EMUPAGESIZE; 1212 } 1213 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1214 return buf; 1215 } 1216 1217 static int 1218 emu_memfree(struct sc_info *sc, void *buf) 1219 { 1220 u_int32_t idx, tmp; 1221 struct emu_mem *mem = &sc->mem; 1222 struct emu_memblk *blk, *i; 1223 1224 blk = NULL; 1225 SLIST_FOREACH(i, &mem->blocks, link) { 1226 if (i->buf == buf) 1227 blk = i; 1228 } 1229 if (blk == NULL) 1230 return EINVAL; 1231 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1232 emu_free(sc, buf); 1233 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1234 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1235 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1236 mem->ptb_pages[idx] = tmp | idx; 1237 } 1238 free(blk, M_DEVBUF); 1239 return 0; 1240 } 1241 1242 static int 1243 emu_memstart(struct sc_info *sc, void *buf) 1244 { 1245 struct emu_mem *mem = &sc->mem; 1246 struct emu_memblk *blk, *i; 1247 1248 blk = NULL; 1249 SLIST_FOREACH(i, &mem->blocks, link) { 1250 if (i->buf == buf) 1251 blk = i; 1252 } 1253 if (blk == NULL) 1254 return -EINVAL; 1255 return blk->pte_start; 1256 } 1257 1258 static void 1259 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1260 u_int32_t *pc) 1261 { 1262 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1263 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1264 (*pc)++; 1265 } 1266 1267 static void 1268 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1269 u_int32_t *pc) 1270 { 1271 emu_wrefx(sc, (*pc) * 2, (x << 12) | y); 1272 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w); 1273 (*pc)++; 1274 } 1275 1276 static void 1277 audigy_initefx(struct sc_info *sc) 1278 { 1279 int i; 1280 u_int32_t pc = 0; 1281 1282 /* skip 0, 0, -1, 0 - NOPs */ 1283 for (i = 0; i < 512; i++) 1284 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc); 1285 1286 for (i = 0; i < 512; i++) 1287 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0); 1288 1289 pc = 16; 1290 1291 /* stop fx processor */ 1292 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1293 1294 /* Audigy 2 (EMU10K2) DSP Registers: 1295 FX Bus 1296 0x000-0x00f : 16 registers (???) 1297 Input 1298 0x040/0x041 : AC97 Codec (l/r) 1299 0x042/0x043 : ADC, S/PDIF (l/r) 1300 0x044/0x045 : Optical S/PDIF in (l/r) 1301 0x046/0x047 : ??? 1302 0x048/0x049 : Line/Mic 2 (l/r) 1303 0x04a/0x04b : RCA S/PDIF (l/r) 1304 0x04c/0x04d : Aux 2 (l/r) 1305 Output 1306 0x060/0x061 : Digital Front (l/r) 1307 0x062/0x063 : Digital Center/LFE 1308 0x064/0x065 : AudigyDrive Heaphone (l/r) 1309 0x066/0x067 : Digital Rear (l/r) 1310 0x068/0x069 : Analog Front (l/r) 1311 0x06a/0x06b : Analog Center/LFE 1312 0x06c/0x06d : ??? 1313 0x06e/0x06f : Analog Rear (l/r) 1314 0x070/0x071 : AC97 Output (l/r) 1315 0x072/0x073 : ??? 1316 0x074/0x075 : ??? 1317 0x076/0x077 : ADC Recording Buffer (l/r) 1318 Constants 1319 0x0c0 - 0x0c4 = 0 - 4 1320 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20 1321 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000 1322 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000 1323 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff 1324 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc 1325 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???) 1326 Temporary Values 1327 0x0d6 : Accumulator (???) 1328 0x0d7 : Condition Register 1329 0x0d8 : Noise source 1330 0x0d9 : Noise source 1331 Tank Memory Data Registers 1332 0x200 - 0x2ff 1333 Tank Memory Address Registers 1334 0x300 - 0x3ff 1335 General Purpose Registers 1336 0x400 - 0x5ff 1337 */ 1338 1339 /* AC97Output[l/r] = FXBus PCM[l/r] */ 1340 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000, 1341 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc); 1342 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000, 1343 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc); 1344 1345 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */ 1346 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000, 1347 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc); 1348 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000, 1349 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc); 1350 1351 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1352 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1), 1353 A_C_40000000, A_GPR(0), &pc); 1354 1355 /* Headphones[l/r] = GPR[0/1] */ 1356 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L), 1357 A_C_00000000, A_C_00000000, A_GPR(0), &pc); 1358 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R), 1359 A_C_00000000, A_C_00000000, A_GPR(1), &pc); 1360 1361 /* Analog Front[l/r] = GPR[0/1] */ 1362 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000, 1363 A_C_00000000, A_GPR(0), &pc); 1364 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000, 1365 A_C_00000000, A_GPR(1), &pc); 1366 1367 /* Digital Front[l/r] = GPR[0/1] */ 1368 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000, 1369 A_C_00000000, A_GPR(0), &pc); 1370 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000, 1371 A_C_00000000, A_GPR(1), &pc); 1372 1373 /* Center and Subwoofer configuration */ 1374 /* Analog Center = GPR[0] + GPR[2] */ 1375 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000, 1376 A_GPR(0), A_GPR(2), &pc); 1377 /* Analog Sub = GPR[1] + GPR[2] */ 1378 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000, 1379 A_GPR(1), A_GPR(2), &pc); 1380 1381 /* Digital Center = GPR[0] + GPR[2] */ 1382 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000, 1383 A_GPR(0), A_GPR(2), &pc); 1384 /* Digital Sub = GPR[1] + GPR[2] */ 1385 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000, 1386 A_GPR(1), A_GPR(2), &pc); 1387 1388 #if 0 1389 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1390 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1391 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1392 A_GPR(16), A_GPR(0), &pc); 1393 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1394 A_GPR(17), A_GPR(1), &pc); 1395 1396 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1397 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1398 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1399 A_GPR(16), A_GPR(0), &pc); 1400 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1401 A_GPR(17), A_GPR(1), &pc); 1402 #else 1403 /* XXX This is just a copy to the channel, since we do not have 1404 * a patch manager, it is useful for have another output enabled. 1405 */ 1406 1407 /* Analog Rear[l/r] = GPR[0/1] */ 1408 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1409 A_C_00000000, A_GPR(0), &pc); 1410 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1411 A_C_00000000, A_GPR(1), &pc); 1412 1413 /* Digital Rear[l/r] = GPR[0/1] */ 1414 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1415 A_C_00000000, A_GPR(0), &pc); 1416 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1417 A_C_00000000, A_GPR(1), &pc); 1418 #endif 1419 1420 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1421 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000, 1422 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc); 1423 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000, 1424 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc); 1425 1426 /* resume normal operations */ 1427 emu_wrptr(sc, 0, A_DBG, 0); 1428 } 1429 1430 static void 1431 emu_initefx(struct sc_info *sc) 1432 { 1433 int i; 1434 u_int32_t pc = 16; 1435 1436 /* acc3 0,0,0,0 - NOPs */ 1437 for (i = 0; i < 512; i++) { 1438 emu_wrefx(sc, i * 2, 0x10040); 1439 emu_wrefx(sc, i * 2 + 1, 0x610040); 1440 } 1441 1442 for (i = 0; i < 256; i++) 1443 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1444 1445 /* FX-8010 DSP Registers: 1446 FX Bus 1447 0x000-0x00f : 16 registers 1448 Input 1449 0x010/0x011 : AC97 Codec (l/r) 1450 0x012/0x013 : ADC, S/PDIF (l/r) 1451 0x014/0x015 : Mic(left), Zoom (l/r) 1452 0x016/0x017 : TOS link in (l/r) 1453 0x018/0x019 : Line/Mic 1 (l/r) 1454 0x01a/0x01b : COAX S/PDIF (l/r) 1455 0x01c/0x01d : Line/Mic 2 (l/r) 1456 Output 1457 0x020/0x021 : AC97 Output (l/r) 1458 0x022/0x023 : TOS link out (l/r) 1459 0x024/0x025 : Center/LFE 1460 0x026/0x027 : LiveDrive Headphone (l/r) 1461 0x028/0x029 : Rear Channel (l/r) 1462 0x02a/0x02b : ADC Recording Buffer (l/r) 1463 0x02c : Mic Recording Buffer 1464 0x031/0x032 : Analog Center/LFE 1465 Constants 1466 0x040 - 0x044 = 0 - 4 1467 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1468 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1469 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1470 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff 1471 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc 1472 0x054 = 0x5a7ef9db, 0x055 = 0x00100000 1473 Temporary Values 1474 0x056 : Accumulator 1475 0x057 : Condition Register 1476 0x058 : Noise source 1477 0x059 : Noise source 1478 0x05a : IRQ Register 1479 0x05b : TRAM Delay Base Address Count 1480 General Purpose Registers 1481 0x100 - 0x1ff 1482 Tank Memory Data Registers 1483 0x200 - 0x2ff 1484 Tank Memory Address Registers 1485 0x300 - 0x3ff 1486 */ 1487 1488 /* Routing - this will be configurable in later version */ 1489 1490 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1491 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L), 1492 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc); 1493 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R), 1494 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc); 1495 1496 /* GPR[0/1] += APS-input */ 1497 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000, 1498 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc); 1499 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000, 1500 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc); 1501 1502 /* FrontOut (AC97) = GPR[0/1] */ 1503 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000, 1504 C_00000000, GPR(0), &pc); 1505 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000, 1506 C_00000001, GPR(1), &pc); 1507 1508 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1509 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc); 1510 1511 #if 0 1512 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1513 /* RearVolume = GPR[0x10/0x11] */ 1514 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000, 1515 GPR(16), GPR(0), &pc); 1516 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000, 1517 GPR(17), GPR(1), &pc); 1518 #else 1519 /* XXX This is just a copy to the channel, since we do not have 1520 * a patch manager, it is useful for have another output enabled. 1521 */ 1522 1523 /* Rear[l/r] = GPR[0/1] */ 1524 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000, 1525 C_00000000, GPR(0), &pc); 1526 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000, 1527 C_00000000, GPR(1), &pc); 1528 #endif 1529 1530 /* TOS out[l/r] = GPR[0/1] */ 1531 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000, 1532 C_00000000, GPR(0), &pc); 1533 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000, 1534 C_00000000, GPR(1), &pc); 1535 1536 /* Center and Subwoofer configuration */ 1537 /* Analog Center = GPR[0] + GPR[2] */ 1538 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000, 1539 GPR(0), GPR(2), &pc); 1540 /* Analog Sub = GPR[1] + GPR[2] */ 1541 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000, 1542 GPR(1), GPR(2), &pc); 1543 /* Digital Center = GPR[0] + GPR[2] */ 1544 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000, 1545 GPR(0), GPR(2), &pc); 1546 /* Digital Sub = GPR[1] + GPR[2] */ 1547 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000, 1548 GPR(1), GPR(2), &pc); 1549 1550 /* Headphones[l/r] = GPR[0/1] */ 1551 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000, 1552 C_00000000, GPR(0), &pc); 1553 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000, 1554 C_00000000, GPR(1), &pc); 1555 1556 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1557 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000, 1558 C_00000000, EXTIN(EXTIN_AC97_L), &pc); 1559 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000, 1560 C_00000000, EXTIN(EXTIN_AC97_R), &pc); 1561 1562 /* resume normal operations */ 1563 emu_wrptr(sc, 0, DBG, 0); 1564 } 1565 1566 /* Probe and attach the card */ 1567 static int 1568 emu_init(struct sc_info *sc) 1569 { 1570 u_int32_t spcs, ch, tmp, i; 1571 1572 if (sc->audigy) { 1573 /* enable additional AC97 slots */ 1574 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE); 1575 } 1576 1577 /* disable audio and lock cache */ 1578 emu_wr(sc, HCFG, 1579 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1580 4); 1581 1582 /* reset recording buffers */ 1583 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1584 emu_wrptr(sc, 0, MICBA, 0); 1585 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1586 emu_wrptr(sc, 0, FXBA, 0); 1587 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1588 emu_wrptr(sc, 0, ADCBA, 0); 1589 1590 /* disable channel interrupt */ 1591 emu_wr(sc, INTE, 1592 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 1593 4); 1594 emu_wrptr(sc, 0, CLIEL, 0); 1595 emu_wrptr(sc, 0, CLIEH, 0); 1596 emu_wrptr(sc, 0, SOLEL, 0); 1597 emu_wrptr(sc, 0, SOLEH, 0); 1598 1599 /* wonder what these do... */ 1600 if (sc->audigy) { 1601 emu_wrptr(sc, 0, SPBYPASS, 0xf00); 1602 emu_wrptr(sc, 0, AC97SLOT, 0x3); 1603 } 1604 1605 /* init envelope engine */ 1606 for (ch = 0; ch < NUM_G; ch++) { 1607 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1608 emu_wrptr(sc, ch, IP, 0); 1609 emu_wrptr(sc, ch, VTFT, 0xffff); 1610 emu_wrptr(sc, ch, CVCF, 0xffff); 1611 emu_wrptr(sc, ch, PTRX, 0); 1612 emu_wrptr(sc, ch, CPF, 0); 1613 emu_wrptr(sc, ch, CCR, 0); 1614 1615 emu_wrptr(sc, ch, PSST, 0); 1616 emu_wrptr(sc, ch, DSL, 0x10); 1617 emu_wrptr(sc, ch, CCCA, 0); 1618 emu_wrptr(sc, ch, Z1, 0); 1619 emu_wrptr(sc, ch, Z2, 0); 1620 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1621 1622 emu_wrptr(sc, ch, ATKHLDM, 0); 1623 emu_wrptr(sc, ch, DCYSUSM, 0); 1624 emu_wrptr(sc, ch, IFATN, 0xffff); 1625 emu_wrptr(sc, ch, PEFE, 0); 1626 emu_wrptr(sc, ch, FMMOD, 0); 1627 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1628 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1629 emu_wrptr(sc, ch, TEMPENV, 0); 1630 1631 /*** these are last so OFF prevents writing ***/ 1632 emu_wrptr(sc, ch, LFOVAL2, 0); 1633 emu_wrptr(sc, ch, LFOVAL1, 0); 1634 emu_wrptr(sc, ch, ATKHLDV, 0); 1635 emu_wrptr(sc, ch, ENVVOL, 0); 1636 emu_wrptr(sc, ch, ENVVAL, 0); 1637 1638 if (sc->audigy) { 1639 /* audigy cards need this to initialize correctly */ 1640 emu_wrptr(sc, ch, 0x4c, 0); 1641 emu_wrptr(sc, ch, 0x4d, 0); 1642 emu_wrptr(sc, ch, 0x4e, 0); 1643 emu_wrptr(sc, ch, 0x4f, 0); 1644 /* set default routing */ 1645 emu_wrptr(sc, ch, A_FXRT1, 0x03020100); 1646 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f); 1647 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0); 1648 } 1649 1650 sc->voice[ch].vnum = ch; 1651 sc->voice[ch].slave = NULL; 1652 sc->voice[ch].busy = 0; 1653 sc->voice[ch].ismaster = 0; 1654 sc->voice[ch].running = 0; 1655 sc->voice[ch].b16 = 0; 1656 sc->voice[ch].stereo = 0; 1657 sc->voice[ch].speed = 0; 1658 sc->voice[ch].start = 0; 1659 sc->voice[ch].end = 0; 1660 sc->voice[ch].channel = NULL; 1661 } 1662 sc->pnum = sc->rnum = 0; 1663 1664 /* 1665 * Init to 0x02109204 : 1666 * Clock accuracy = 0 (1000ppm) 1667 * Sample Rate = 2 (48kHz) 1668 * Audio Channel = 1 (Left of 2) 1669 * Source Number = 0 (Unspecified) 1670 * Generation Status = 1 (Original for Cat Code 12) 1671 * Cat Code = 12 (Digital Signal Mixer) 1672 * Mode = 0 (Mode 0) 1673 * Emphasis = 0 (None) 1674 * CP = 1 (Copyright unasserted) 1675 * AN = 0 (Audio data) 1676 * P = 0 (Consumer) 1677 */ 1678 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1679 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1680 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1681 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1682 emu_wrptr(sc, 0, SPCS0, spcs); 1683 emu_wrptr(sc, 0, SPCS1, spcs); 1684 emu_wrptr(sc, 0, SPCS2, spcs); 1685 1686 if (!sc->audigy) 1687 emu_initefx(sc); 1688 else if (sc->audigy2) { /* Audigy 2 */ 1689 /* from ALSA initialization code: */ 1690 1691 /* Hack for Alice3 to work independent of haP16V driver */ 1692 u_int32_t tmp; 1693 1694 /* Setup SRCMulti_I2S SamplingRate */ 1695 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff; 1696 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400); 1697 1698 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */ 1699 emu_wr(sc, 0x20, 0x00600000, 4); 1700 emu_wr(sc, 0x24, 0x00000014, 4); 1701 1702 /* Setup SRCMulti Input Audio Enable */ 1703 emu_wr(sc, 0x20, 0x006e0000, 4); 1704 emu_wr(sc, 0x24, 0xff00ff00, 4); 1705 } 1706 1707 SLIST_INIT(&sc->mem.blocks); 1708 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t), 1709 &sc->mem.ptb_pages_addr); 1710 if (sc->mem.ptb_pages == NULL) 1711 return -1; 1712 1713 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE, 1714 &sc->mem.silent_page_addr); 1715 if (sc->mem.silent_page == NULL) { 1716 emu_free(sc, sc->mem.ptb_pages); 1717 return -1; 1718 } 1719 /* Clear page with silence & setup all pointers to this page */ 1720 bzero(sc->mem.silent_page, EMUPAGESIZE); 1721 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1722 for (i = 0; i < EMUMAXPAGES; i++) 1723 sc->mem.ptb_pages[i] = tmp | i; 1724 1725 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr)); 1726 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1727 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1728 1729 for (ch = 0; ch < NUM_G; ch++) { 1730 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1731 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1732 } 1733 1734 /* emu_memalloc(sc, EMUPAGESIZE); */ 1735 /* 1736 * Hokay, now enable the AUD bit 1737 * 1738 * Audigy 1739 * Enable Audio = 0 (enabled after fx processor initialization) 1740 * Mute Disable Audio = 0 1741 * Joystick = 1 1742 * 1743 * Audigy 2 1744 * Enable Audio = 1 1745 * Mute Disable Audio = 0 1746 * Joystick = 1 1747 * GP S/PDIF AC3 Enable = 1 1748 * CD S/PDIF AC3 Enable = 1 1749 * 1750 * EMU10K1 1751 * Enable Audio = 1 1752 * Mute Disable Audio = 0 1753 * Lock Tank Memory = 1 1754 * Lock Sound Memory = 0 1755 * Auto Mute = 1 1756 */ 1757 1758 if (sc->audigy) { 1759 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE; 1760 if (sc->audigy2) /* Audigy 2 */ 1761 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF | 1762 HCFG_AC3ENABLE_GPSPDIF; 1763 emu_wr(sc, HCFG, tmp, 4); 1764 1765 audigy_initefx(sc); 1766 1767 /* from ALSA initialization code: */ 1768 1769 /* enable audio and disable both audio/digital outputs */ 1770 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4); 1771 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD, 1772 4); 1773 if (sc->audigy2) { /* Audigy 2 */ 1774 /* Unmute Analog. 1775 * Set GPO6 to 1 for Apollo. This has to be done after 1776 * init Alice3 I2SOut beyond 48kHz. 1777 * So, sequence is important. 1778 */ 1779 emu_wr(sc, A_IOCFG, 1780 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4); 1781 } 1782 } else { 1783 /* EMU10K1 initialization code */ 1784 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 1785 | HCFG_AUTOMUTE; 1786 if (sc->rev >= 6) 1787 tmp |= HCFG_JOYENABLE; 1788 1789 emu_wr(sc, HCFG, tmp, 4); 1790 1791 /* TOSLink detection */ 1792 sc->tos_link = 0; 1793 tmp = emu_rd(sc, HCFG, 4); 1794 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1795 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4); 1796 DELAY(50); 1797 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) { 1798 sc->tos_link = 1; 1799 emu_wr(sc, HCFG, tmp, 4); 1800 } 1801 } 1802 } 1803 1804 return 0; 1805 } 1806 1807 static int 1808 emu_uninit(struct sc_info *sc) 1809 { 1810 u_int32_t ch; 1811 1812 emu_wr(sc, INTE, 0, 4); 1813 for (ch = 0; ch < NUM_G; ch++) 1814 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1815 for (ch = 0; ch < NUM_G; ch++) { 1816 emu_wrptr(sc, ch, VTFT, 0); 1817 emu_wrptr(sc, ch, CVCF, 0); 1818 emu_wrptr(sc, ch, PTRX, 0); 1819 emu_wrptr(sc, ch, CPF, 0); 1820 } 1821 1822 if (sc->audigy) { /* stop fx processor */ 1823 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1824 } 1825 1826 /* disable audio and lock cache */ 1827 emu_wr(sc, HCFG, 1828 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1829 4); 1830 1831 emu_wrptr(sc, 0, PTB, 0); 1832 /* reset recording buffers */ 1833 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1834 emu_wrptr(sc, 0, MICBA, 0); 1835 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1836 emu_wrptr(sc, 0, FXBA, 0); 1837 emu_wrptr(sc, 0, FXWC, 0); 1838 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1839 emu_wrptr(sc, 0, ADCBA, 0); 1840 emu_wrptr(sc, 0, TCB, 0); 1841 emu_wrptr(sc, 0, TCBS, 0); 1842 1843 /* disable channel interrupt */ 1844 emu_wrptr(sc, 0, CLIEL, 0); 1845 emu_wrptr(sc, 0, CLIEH, 0); 1846 emu_wrptr(sc, 0, SOLEL, 0); 1847 emu_wrptr(sc, 0, SOLEH, 0); 1848 1849 /* init envelope engine */ 1850 if (!SLIST_EMPTY(&sc->mem.blocks)) 1851 device_printf(sc->dev, "warning: memblock list not empty\n"); 1852 emu_free(sc, sc->mem.ptb_pages); 1853 emu_free(sc, sc->mem.silent_page); 1854 1855 return 0; 1856 } 1857 1858 static int 1859 emu_pci_probe(device_t dev) 1860 { 1861 char *s = NULL; 1862 1863 switch (pci_get_devid(dev)) { 1864 case EMU10K1_PCI_ID: 1865 s = "Creative EMU10K1"; 1866 break; 1867 1868 case EMU10K2_PCI_ID: 1869 if (pci_get_revid(dev) == 0x04) 1870 s = "Creative Audigy 2 (EMU10K2)"; 1871 else 1872 s = "Creative Audigy (EMU10K2)"; 1873 break; 1874 1875 default: 1876 return ENXIO; 1877 } 1878 1879 device_set_desc(dev, s); 1880 return 0; 1881 } 1882 1883 static int 1884 emu_pci_attach(device_t dev) 1885 { 1886 struct ac97_info *codec = NULL; 1887 struct sc_info *sc; 1888 u_int32_t data; 1889 int i, gotmic; 1890 char status[SND_STATUSLEN]; 1891 1892 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) { 1893 device_printf(dev, "cannot allocate softc\n"); 1894 return ENXIO; 1895 } 1896 1897 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1898 sc->dev = dev; 1899 sc->type = pci_get_devid(dev); 1900 sc->rev = pci_get_revid(dev); 1901 sc->audigy = (sc->type == EMU10K2_PCI_ID); 1902 sc->audigy2 = (sc->audigy && sc->rev == 0x04); 1903 sc->nchans = sc->audigy ? 8 : 4; 1904 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK; 1905 1906 data = pci_read_config(dev, PCIR_COMMAND, 2); 1907 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN); 1908 pci_write_config(dev, PCIR_COMMAND, data, 2); 1909 data = pci_read_config(dev, PCIR_COMMAND, 2); 1910 1911 i = PCIR_BAR(0); 1912 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 1913 if (sc->reg == NULL) { 1914 device_printf(dev, "unable to map register space\n"); 1915 goto bad; 1916 } 1917 sc->st = rman_get_bustag(sc->reg); 1918 sc->sh = rman_get_bushandle(sc->reg); 1919 1920 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); 1921 1922 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1923 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1924 /*highaddr*/BUS_SPACE_MAXADDR, 1925 /*filter*/NULL, /*filterarg*/NULL, 1926 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1927 /*flags*/0, /*lockfunc*/busdma_lock_mutex, 1928 /*lockarg*/&Giant, &sc->parent_dmat) != 0) { 1929 device_printf(dev, "unable to create dma tag\n"); 1930 goto bad; 1931 } 1932 1933 if (emu_init(sc) == -1) { 1934 device_printf(dev, "unable to initialize the card\n"); 1935 goto bad; 1936 } 1937 1938 codec = AC97_CREATE(dev, sc, emu_ac97); 1939 if (codec == NULL) goto bad; 1940 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0; 1941 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1942 1943 i = 0; 1944 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 1945 RF_ACTIVE | RF_SHAREABLE); 1946 if (!sc->irq || 1947 snd_setup_intr(dev, sc->irq, 0, emu_intr, sc, &sc->ih)) { 1948 device_printf(dev, "unable to map interrupt\n"); 1949 goto bad; 1950 } 1951 1952 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s", 1953 rman_get_start(sc->reg), rman_get_start(sc->irq), 1954 PCM_KLDSTRING(snd_emu10k1)); 1955 1956 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad; 1957 for (i = 0; i < sc->nchans; i++) 1958 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1959 for (i = 0; i < (gotmic ? 3 : 2); i++) 1960 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1961 1962 pcm_setstatus(dev, status); 1963 1964 return 0; 1965 1966 bad: 1967 if (codec) ac97_destroy(codec); 1968 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 1969 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1970 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1971 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1972 if (sc->lock) snd_mtxfree(sc->lock); 1973 free(sc, M_DEVBUF); 1974 return ENXIO; 1975 } 1976 1977 static int 1978 emu_pci_detach(device_t dev) 1979 { 1980 int r; 1981 struct sc_info *sc; 1982 1983 r = pcm_unregister(dev); 1984 if (r) 1985 return r; 1986 1987 sc = pcm_getdevinfo(dev); 1988 /* shutdown chip */ 1989 emu_uninit(sc); 1990 1991 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 1992 bus_teardown_intr(dev, sc->irq, sc->ih); 1993 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1994 bus_dma_tag_destroy(sc->parent_dmat); 1995 snd_mtxfree(sc->lock); 1996 free(sc, M_DEVBUF); 1997 1998 return 0; 1999 } 2000 2001 /* add suspend, resume */ 2002 static device_method_t emu_methods[] = { 2003 /* Device interface */ 2004 DEVMETHOD(device_probe, emu_pci_probe), 2005 DEVMETHOD(device_attach, emu_pci_attach), 2006 DEVMETHOD(device_detach, emu_pci_detach), 2007 2008 { 0, 0 } 2009 }; 2010 2011 static driver_t emu_driver = { 2012 "pcm", 2013 emu_methods, 2014 PCM_SOFTC_SIZE, 2015 }; 2016 2017 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0); 2018 MODULE_DEPEND(snd_emu10k1, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 2019 MODULE_VERSION(snd_emu10k1, 1); 2020 2021 /* dummy driver to silence the joystick device */ 2022 static int 2023 emujoy_pci_probe(device_t dev) 2024 { 2025 char *s = NULL; 2026 2027 switch (pci_get_devid(dev)) { 2028 case 0x70021102: 2029 s = "Creative EMU10K1 Joystick"; 2030 device_quiet(dev); 2031 break; 2032 case 0x70031102: 2033 s = "Creative EMU10K2 Joystick"; 2034 device_quiet(dev); 2035 break; 2036 } 2037 2038 if (s) device_set_desc(dev, s); 2039 return s ? -1000 : ENXIO; 2040 } 2041 2042 static int 2043 emujoy_pci_attach(device_t dev) 2044 { 2045 return 0; 2046 } 2047 2048 static int 2049 emujoy_pci_detach(device_t dev) 2050 { 2051 return 0; 2052 } 2053 2054 static device_method_t emujoy_methods[] = { 2055 DEVMETHOD(device_probe, emujoy_pci_probe), 2056 DEVMETHOD(device_attach, emujoy_pci_attach), 2057 DEVMETHOD(device_detach, emujoy_pci_detach), 2058 2059 { 0, 0 } 2060 }; 2061 2062 static driver_t emujoy_driver = { 2063 "emujoy", 2064 emujoy_methods, 2065 8, 2066 }; 2067 2068 static devclass_t emujoy_devclass; 2069 2070 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0); 2071 2072