1 /* 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <dev/sound/pcm/sound.h> 30 #include <dev/sound/pcm/ac97.h> 31 #include <gnu/dev/sound/pci/emu10k1.h> 32 33 #include <pci/pcireg.h> 34 #include <pci/pcivar.h> 35 #include <sys/queue.h> 36 37 /* -------------------------------------------------------------------- */ 38 39 #define EMU10K1_PCI_ID 0x00021102 40 #define EMU_BUFFSIZE 4096 41 #define EMU_CHANS 4 42 #undef EMUDEBUG 43 44 struct emu_memblk { 45 SLIST_ENTRY(emu_memblk) link; 46 void *buf; 47 u_int32_t pte_start, pte_size; 48 }; 49 50 struct emu_mem { 51 u_int8_t bmap[MAXPAGES / 8]; 52 u_int32_t *ptb_pages; 53 void *silent_page; 54 SLIST_HEAD(, emu_memblk) blocks; 55 }; 56 57 struct emu_voice { 58 int vnum; 59 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 60 int speed; 61 int start, end, vol; 62 u_int32_t buf; 63 struct emu_voice *slave; 64 struct pcm_channel *channel; 65 }; 66 67 struct sc_info; 68 69 /* channel registers */ 70 struct sc_pchinfo { 71 int spd, fmt, blksz, run; 72 struct emu_voice *master, *slave; 73 struct snd_dbuf *buffer; 74 struct pcm_channel *channel; 75 struct sc_info *parent; 76 }; 77 78 struct sc_rchinfo { 79 int spd, fmt, run, blksz, num; 80 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 81 struct snd_dbuf *buffer; 82 struct pcm_channel *channel; 83 struct sc_info *parent; 84 }; 85 86 /* device private data */ 87 struct sc_info { 88 device_t dev; 89 u_int32_t type, rev; 90 u_int32_t tos_link:1, APS:1; 91 92 bus_space_tag_t st; 93 bus_space_handle_t sh; 94 bus_dma_tag_t parent_dmat; 95 96 struct resource *reg, *irq; 97 int regtype, regid, irqid; 98 void *ih; 99 void *lock; 100 101 int timer, timerinterval; 102 int pnum, rnum; 103 struct emu_mem mem; 104 struct emu_voice voice[64]; 105 struct sc_pchinfo pch[EMU_CHANS]; 106 struct sc_rchinfo rch[3]; 107 }; 108 109 /* -------------------------------------------------------------------- */ 110 111 /* 112 * prototypes 113 */ 114 115 /* stuff */ 116 static int emu_init(struct sc_info *); 117 static void emu_intr(void *); 118 static void *emu_malloc(struct sc_info *sc, u_int32_t sz); 119 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz); 120 static int emu_memfree(struct sc_info *sc, void *buf); 121 static int emu_memstart(struct sc_info *sc, void *buf); 122 #ifdef EMUDEBUG 123 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 124 #endif 125 126 /* talk to the card */ 127 static u_int32_t emu_rd(struct sc_info *, int, int); 128 static void emu_wr(struct sc_info *, int, u_int32_t, int); 129 130 /* -------------------------------------------------------------------- */ 131 132 static u_int32_t emu_rfmt_ac97[] = { 133 AFMT_S16_LE, 134 AFMT_STEREO | AFMT_S16_LE, 135 0 136 }; 137 138 static u_int32_t emu_rfmt_mic[] = { 139 AFMT_U8, 140 0 141 }; 142 143 static u_int32_t emu_rfmt_efx[] = { 144 AFMT_STEREO | AFMT_S16_LE, 145 0 146 }; 147 148 static struct pcmchan_caps emu_reccaps[3] = { 149 {8000, 48000, emu_rfmt_ac97, 0}, 150 {8000, 8000, emu_rfmt_mic, 0}, 151 {48000, 48000, emu_rfmt_efx, 0}, 152 }; 153 154 static u_int32_t emu_pfmt[] = { 155 AFMT_U8, 156 AFMT_STEREO | AFMT_U8, 157 AFMT_S16_LE, 158 AFMT_STEREO | AFMT_S16_LE, 159 0 160 }; 161 162 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 163 164 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 165 166 /* -------------------------------------------------------------------- */ 167 /* Hardware */ 168 static u_int32_t 169 emu_rd(struct sc_info *sc, int regno, int size) 170 { 171 switch (size) { 172 case 1: 173 return bus_space_read_1(sc->st, sc->sh, regno); 174 case 2: 175 return bus_space_read_2(sc->st, sc->sh, regno); 176 case 4: 177 return bus_space_read_4(sc->st, sc->sh, regno); 178 default: 179 return 0xffffffff; 180 } 181 } 182 183 static void 184 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 185 { 186 switch (size) { 187 case 1: 188 bus_space_write_1(sc->st, sc->sh, regno, data); 189 break; 190 case 2: 191 bus_space_write_2(sc->st, sc->sh, regno, data); 192 break; 193 case 4: 194 bus_space_write_4(sc->st, sc->sh, regno, data); 195 break; 196 } 197 } 198 199 static u_int32_t 200 emu_rdptr(struct sc_info *sc, int chn, int reg) 201 { 202 u_int32_t ptr, val, mask, size, offset; 203 204 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 205 emu_wr(sc, PTR, ptr, 4); 206 val = emu_rd(sc, DATA, 4); 207 if (reg & 0xff000000) { 208 size = (reg >> 24) & 0x3f; 209 offset = (reg >> 16) & 0x1f; 210 mask = ((1 << size) - 1) << offset; 211 val &= mask; 212 val >>= offset; 213 } 214 return val; 215 } 216 217 static void 218 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 219 { 220 u_int32_t ptr, mask, size, offset; 221 222 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 223 emu_wr(sc, PTR, ptr, 4); 224 if (reg & 0xff000000) { 225 size = (reg >> 24) & 0x3f; 226 offset = (reg >> 16) & 0x1f; 227 mask = ((1 << size) - 1) << offset; 228 data <<= offset; 229 data &= mask; 230 data |= emu_rd(sc, DATA, 4) & ~mask; 231 } 232 emu_wr(sc, DATA, data, 4); 233 } 234 235 static void 236 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 237 { 238 emu_wrptr(sc, 0, MICROCODEBASE + pc, data); 239 } 240 241 /* -------------------------------------------------------------------- */ 242 /* ac97 codec */ 243 /* no locking needed */ 244 245 static int 246 emu_rdcd(kobj_t obj, void *devinfo, int regno) 247 { 248 struct sc_info *sc = (struct sc_info *)devinfo; 249 250 emu_wr(sc, AC97ADDRESS, regno, 1); 251 return emu_rd(sc, AC97DATA, 2); 252 } 253 254 static int 255 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 256 { 257 struct sc_info *sc = (struct sc_info *)devinfo; 258 259 emu_wr(sc, AC97ADDRESS, regno, 1); 260 emu_wr(sc, AC97DATA, data, 2); 261 return 0; 262 } 263 264 static kobj_method_t emu_ac97_methods[] = { 265 KOBJMETHOD(ac97_read, emu_rdcd), 266 KOBJMETHOD(ac97_write, emu_wrcd), 267 { 0, 0 } 268 }; 269 AC97_DECLARE(emu_ac97); 270 271 /* -------------------------------------------------------------------- */ 272 /* stuff */ 273 static int 274 emu_settimer(struct sc_info *sc) 275 { 276 struct sc_pchinfo *pch; 277 struct sc_rchinfo *rch; 278 int i, tmp, rate; 279 280 rate = 0; 281 for (i = 0; i < EMU_CHANS; i++) { 282 pch = &sc->pch[i]; 283 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) / pch->blksz; 284 if (tmp > rate) 285 rate = tmp; 286 } 287 288 for (i = 0; i < 3; i++) { 289 rch = &sc->rch[i]; 290 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) / rch->blksz; 291 if (tmp > rate) 292 rate = tmp; 293 } 294 RANGE(rate, 48, 9600); 295 sc->timerinterval = 48000 / rate; 296 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 297 298 return sc->timerinterval; 299 } 300 301 static int 302 emu_enatimer(struct sc_info *sc, int go) 303 { 304 u_int32_t x; 305 if (go) { 306 if (sc->timer++ == 0) { 307 x = emu_rd(sc, INTE, 4); 308 x |= INTE_INTERVALTIMERENB; 309 emu_wr(sc, INTE, x, 4); 310 } 311 } else { 312 sc->timer = 0; 313 x = emu_rd(sc, INTE, 4); 314 x &= ~INTE_INTERVALTIMERENB; 315 emu_wr(sc, INTE, x, 4); 316 } 317 return 0; 318 } 319 320 static void 321 emu_enastop(struct sc_info *sc, char channel, int enable) 322 { 323 int reg = (channel & 0x20)? SOLEH : SOLEL; 324 channel &= 0x1f; 325 reg |= 1 << 24; 326 reg |= channel << 16; 327 emu_wrptr(sc, 0, reg, enable); 328 } 329 330 static int 331 emu_recval(int speed) { 332 int val; 333 334 val = 0; 335 while (val < 7 && speed < adcspeed[val]) 336 val++; 337 return val; 338 } 339 340 static u_int32_t 341 emu_rate_to_pitch(u_int32_t rate) 342 { 343 static u_int32_t logMagTable[128] = { 344 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 345 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 346 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 347 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 348 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 349 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 350 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 351 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 352 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 353 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 354 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 355 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 356 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 357 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 358 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 359 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 360 }; 361 static char logSlopeTable[128] = { 362 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 363 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 364 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 365 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 366 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 367 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 368 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 369 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 370 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 371 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 372 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 373 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 374 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 375 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 376 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 377 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 378 }; 379 int i; 380 381 if (rate == 0) 382 return 0; /* Bail out if no leading "1" */ 383 rate *= 11185; /* Scale 48000 to 0x20002380 */ 384 for (i = 31; i > 0; i--) { 385 if (rate & 0x80000000) { /* Detect leading "1" */ 386 return (((u_int32_t) (i - 15) << 20) + 387 logMagTable[0x7f & (rate >> 24)] + 388 (0x7f & (rate >> 17)) * 389 logSlopeTable[0x7f & (rate >> 24)]); 390 } 391 rate <<= 1; 392 } 393 394 return 0; /* Should never reach this point */ 395 } 396 397 static u_int32_t 398 emu_rate_to_linearpitch(u_int32_t rate) 399 { 400 rate = (rate << 8) / 375; 401 return (rate >> 1) + (rate & 1); 402 } 403 404 static struct emu_voice * 405 emu_valloc(struct sc_info *sc) 406 { 407 struct emu_voice *v; 408 int i; 409 410 v = NULL; 411 for (i = 0; i < 64 && sc->voice[i].busy; i++); 412 if (i < 64) { 413 v = &sc->voice[i]; 414 v->busy = 1; 415 } 416 return v; 417 } 418 419 static int 420 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 421 u_int32_t sz, struct snd_dbuf *b) 422 { 423 void *buf; 424 425 buf = emu_memalloc(sc, sz); 426 if (buf == NULL) 427 return -1; 428 if (b != NULL) 429 sndbuf_setup(b, buf, sz); 430 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 431 m->end = m->start + sz; 432 m->channel = NULL; 433 m->speed = 0; 434 m->b16 = 0; 435 m->stereo = 0; 436 m->running = 0; 437 m->ismaster = 1; 438 m->vol = 0xff; 439 m->buf = vtophys(buf); 440 m->slave = s; 441 if (s != NULL) { 442 s->start = m->start; 443 s->end = m->end; 444 s->channel = NULL; 445 s->speed = 0; 446 s->b16 = 0; 447 s->stereo = 0; 448 s->running = 0; 449 s->ismaster = 0; 450 s->vol = m->vol; 451 s->buf = m->buf; 452 s->slave = NULL; 453 } 454 return 0; 455 } 456 457 static void 458 emu_vsetup(struct sc_pchinfo *ch) 459 { 460 struct emu_voice *v = ch->master; 461 462 if (ch->fmt) { 463 v->b16 = (ch->fmt & AFMT_16BIT)? 1 : 0; 464 v->stereo = (ch->fmt & AFMT_STEREO)? 1 : 0; 465 if (v->slave != NULL) { 466 v->slave->b16 = v->b16; 467 v->slave->stereo = v->stereo; 468 } 469 } 470 if (ch->spd) { 471 v->speed = ch->spd; 472 if (v->slave != NULL) 473 v->slave->speed = v->speed; 474 } 475 } 476 477 static void 478 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 479 { 480 int s; 481 int l, r, x, y; 482 u_int32_t sa, ea, start, val, silent_page; 483 484 s = (v->stereo? 1 : 0) + (v->b16? 1 : 0); 485 486 sa = v->start >> s; 487 ea = v->end >> s; 488 489 l = r = x = y = v->vol; 490 if (v->stereo) { 491 l = v->ismaster? l : 0; 492 r = v->ismaster? 0 : r; 493 } 494 495 emu_wrptr(sc, v->vnum, CPF, v->stereo? CPF_STEREO_MASK : 0); 496 val = v->stereo? 28 : 30; 497 val *= v->b16? 1 : 2; 498 start = sa + val; 499 500 emu_wrptr(sc, v->vnum, FXRT, 0xd01c0000); 501 502 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 503 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 504 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 505 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16? 0 : CCCA_8BITSELECT)); 506 507 emu_wrptr(sc, v->vnum, Z1, 0); 508 emu_wrptr(sc, v->vnum, Z2, 0); 509 510 silent_page = ((u_int32_t)vtophys(sc->mem.silent_page) << 1) | MAP_PTI_MASK; 511 emu_wrptr(sc, v->vnum, MAPA, silent_page); 512 emu_wrptr(sc, v->vnum, MAPB, silent_page); 513 514 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 515 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 516 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 517 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 518 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 519 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 520 emu_wrptr(sc, v->vnum, FMMOD, 0); 521 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 522 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 523 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 524 525 emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 526 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 527 528 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 529 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 530 531 if (v->slave != NULL) 532 emu_vwrite(sc, v->slave); 533 } 534 535 static void 536 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 537 { 538 u_int32_t pitch_target, initial_pitch; 539 u_int32_t cra, cs, ccis; 540 u_int32_t sample, i; 541 542 if (go) { 543 cra = 64; 544 cs = v->stereo? 4 : 2; 545 ccis = v->stereo? 28 : 30; 546 ccis *= v->b16? 1 : 2; 547 sample = v->b16? 0x00000000 : 0x80808080; 548 549 for (i = 0; i < cs; i++) 550 emu_wrptr(sc, v->vnum, CD0 + i, sample); 551 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 552 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 553 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 554 555 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 556 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 557 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 558 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 559 emu_enastop(sc, v->vnum, 0); 560 561 pitch_target = emu_rate_to_linearpitch(v->speed); 562 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 563 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 564 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 565 emu_wrptr(sc, v->vnum, IP, initial_pitch); 566 } else { 567 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 568 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 569 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 570 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 571 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 572 emu_wrptr(sc, v->vnum, IP, 0); 573 emu_enastop(sc, v->vnum, 1); 574 } 575 if (v->slave != NULL) 576 emu_vtrigger(sc, v->slave, go); 577 } 578 579 static int 580 emu_vpos(struct sc_info *sc, struct emu_voice *v) 581 { 582 int s, ptr; 583 584 s = (v->b16? 1 : 0) + (v->stereo? 1 : 0); 585 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 586 return ptr & ~0x0000001f; 587 } 588 589 #ifdef EMUDEBUG 590 static void 591 emu_vdump(struct sc_info *sc, struct emu_voice *v) 592 { 593 char *regname[] = { "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 594 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 595 "envvol", "atkhldv", "dcysusv", "lfoval1", 596 "envval", "atkhldm", "dcysusm", "lfoval2", 597 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 598 "tempenv" }; 599 int i, x; 600 601 printf("voice number %d\n", v->vnum); 602 for (i = 0, x = 0; i <= 0x1e; i++) { 603 if (regname[i] == NULL) 604 continue; 605 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 606 printf("%s", (x == 2)? "\n" : "\t"); 607 x++; 608 if (x > 2) 609 x = 0; 610 } 611 printf("\n\n"); 612 } 613 #endif 614 615 /* channel interface */ 616 static void * 617 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 618 { 619 struct sc_info *sc = devinfo; 620 struct sc_pchinfo *ch; 621 void *r; 622 623 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 624 ch = &sc->pch[sc->pnum++]; 625 ch->buffer = b; 626 ch->parent = sc; 627 ch->channel = c; 628 ch->blksz = EMU_BUFFSIZE / 2; 629 ch->fmt = AFMT_U8; 630 ch->spd = 8000; 631 snd_mtxlock(sc->lock); 632 ch->master = emu_valloc(sc); 633 ch->slave = emu_valloc(sc); 634 r = (emu_vinit(sc, ch->master, ch->slave, EMU_BUFFSIZE, ch->buffer))? NULL : ch; 635 snd_mtxunlock(sc->lock); 636 637 return r; 638 } 639 640 static int 641 emupchan_free(kobj_t obj, void *data) 642 { 643 struct sc_pchinfo *ch = data; 644 struct sc_info *sc = ch->parent; 645 int r; 646 647 snd_mtxlock(sc->lock); 648 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 649 snd_mtxunlock(sc->lock); 650 651 return r; 652 } 653 654 static int 655 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 656 { 657 struct sc_pchinfo *ch = data; 658 659 ch->fmt = format; 660 return 0; 661 } 662 663 static int 664 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 665 { 666 struct sc_pchinfo *ch = data; 667 668 ch->spd = speed; 669 return ch->spd; 670 } 671 672 static int 673 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 674 { 675 struct sc_pchinfo *ch = data; 676 struct sc_info *sc = ch->parent; 677 int irqrate, blksz; 678 679 ch->blksz = blocksize; 680 snd_mtxlock(sc->lock); 681 emu_settimer(sc); 682 irqrate = 48000 / sc->timerinterval; 683 snd_mtxunlock(sc->lock); 684 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 685 return blocksize; 686 } 687 688 static int 689 emupchan_trigger(kobj_t obj, void *data, int go) 690 { 691 struct sc_pchinfo *ch = data; 692 struct sc_info *sc = ch->parent; 693 694 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 695 return 0; 696 697 snd_mtxlock(sc->lock); 698 if (go == PCMTRIG_START) { 699 emu_vsetup(ch); 700 emu_vwrite(sc, ch->master); 701 emu_settimer(sc); 702 emu_enatimer(sc, 1); 703 #ifdef EMUDEBUG 704 printf("start [%d bit, %s, %d hz]\n", 705 ch->master->b16? 16 : 8, 706 ch->master->stereo? "stereo" : "mono", 707 ch->master->speed); 708 emu_vdump(sc, ch->master); 709 emu_vdump(sc, ch->slave); 710 #endif 711 } 712 ch->run = (go == PCMTRIG_START)? 1 : 0; 713 emu_vtrigger(sc, ch->master, ch->run); 714 snd_mtxunlock(sc->lock); 715 return 0; 716 } 717 718 static int 719 emupchan_getptr(kobj_t obj, void *data) 720 { 721 struct sc_pchinfo *ch = data; 722 struct sc_info *sc = ch->parent; 723 int r; 724 725 snd_mtxlock(sc->lock); 726 r = emu_vpos(sc, ch->master); 727 snd_mtxunlock(sc->lock); 728 729 return r; 730 } 731 732 static struct pcmchan_caps * 733 emupchan_getcaps(kobj_t obj, void *data) 734 { 735 return &emu_playcaps; 736 } 737 738 static kobj_method_t emupchan_methods[] = { 739 KOBJMETHOD(channel_init, emupchan_init), 740 KOBJMETHOD(channel_free, emupchan_free), 741 KOBJMETHOD(channel_setformat, emupchan_setformat), 742 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 743 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 744 KOBJMETHOD(channel_trigger, emupchan_trigger), 745 KOBJMETHOD(channel_getptr, emupchan_getptr), 746 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 747 { 0, 0 } 748 }; 749 CHANNEL_DECLARE(emupchan); 750 751 /* channel interface */ 752 static void * 753 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 754 { 755 struct sc_info *sc = devinfo; 756 struct sc_rchinfo *ch; 757 758 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 759 ch = &sc->rch[sc->rnum]; 760 ch->buffer = b; 761 ch->parent = sc; 762 ch->channel = c; 763 ch->blksz = EMU_BUFFSIZE / 2; 764 ch->fmt = AFMT_U8; 765 ch->spd = 8000; 766 ch->num = sc->rnum; 767 switch(sc->rnum) { 768 case 0: 769 ch->idxreg = ADCIDX; 770 ch->basereg = ADCBA; 771 ch->sizereg = ADCBS; 772 ch->setupreg = ADCCR; 773 ch->irqmask = INTE_ADCBUFENABLE; 774 break; 775 776 case 1: 777 ch->idxreg = MICIDX; 778 ch->basereg = MICBA; 779 ch->sizereg = MICBS; 780 ch->setupreg = 0; 781 ch->irqmask = INTE_MICBUFENABLE; 782 break; 783 784 case 2: 785 ch->idxreg = FXIDX; 786 ch->basereg = FXBA; 787 ch->sizereg = FXBS; 788 ch->setupreg = FXWC; 789 ch->irqmask = INTE_EFXBUFENABLE; 790 break; 791 } 792 sc->rnum++; 793 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, EMU_BUFFSIZE) == -1) 794 return NULL; 795 else { 796 snd_mtxlock(sc->lock); 797 emu_wrptr(sc, 0, ch->basereg, vtophys(sndbuf_getbuf(ch->buffer))); 798 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 799 snd_mtxunlock(sc->lock); 800 return ch; 801 } 802 } 803 804 static int 805 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 806 { 807 struct sc_rchinfo *ch = data; 808 809 ch->fmt = format; 810 return 0; 811 } 812 813 static int 814 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 815 { 816 struct sc_rchinfo *ch = data; 817 818 if (ch->num == 0) 819 speed = adcspeed[emu_recval(speed)]; 820 if (ch->num == 1) 821 speed = 8000; 822 if (ch->num == 2) 823 speed = 48000; 824 ch->spd = speed; 825 return ch->spd; 826 } 827 828 static int 829 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 830 { 831 struct sc_rchinfo *ch = data; 832 struct sc_info *sc = ch->parent; 833 int irqrate, blksz; 834 835 ch->blksz = blocksize; 836 snd_mtxlock(sc->lock); 837 emu_settimer(sc); 838 irqrate = 48000 / sc->timerinterval; 839 snd_mtxunlock(sc->lock); 840 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 841 return blocksize; 842 } 843 844 /* semantic note: must start at beginning of buffer */ 845 static int 846 emurchan_trigger(kobj_t obj, void *data, int go) 847 { 848 struct sc_rchinfo *ch = data; 849 struct sc_info *sc = ch->parent; 850 u_int32_t val; 851 852 snd_mtxlock(sc->lock); 853 switch(go) { 854 case PCMTRIG_START: 855 ch->run = 1; 856 emu_wrptr(sc, 0, ch->sizereg, ADCBS_BUFSIZE_4096); 857 if (ch->num == 0) { 858 val = ADCCR_LCHANENABLE; 859 if (ch->fmt & AFMT_STEREO) 860 val |= ADCCR_RCHANENABLE; 861 val |= emu_recval(ch->spd); 862 emu_wrptr(sc, 0, ch->setupreg, val); 863 } 864 val = emu_rd(sc, INTE, 4); 865 val |= ch->irqmask; 866 emu_wr(sc, INTE, val, 4); 867 break; 868 869 case PCMTRIG_STOP: 870 case PCMTRIG_ABORT: 871 ch->run = 0; 872 emu_wrptr(sc, 0, ch->sizereg, 0); 873 if (ch->setupreg) 874 emu_wrptr(sc, 0, ch->setupreg, 0); 875 val = emu_rd(sc, INTE, 4); 876 val &= ~ch->irqmask; 877 emu_wr(sc, INTE, val, 4); 878 break; 879 880 case PCMTRIG_EMLDMAWR: 881 case PCMTRIG_EMLDMARD: 882 default: 883 break; 884 } 885 snd_mtxunlock(sc->lock); 886 887 return 0; 888 } 889 890 static int 891 emurchan_getptr(kobj_t obj, void *data) 892 { 893 struct sc_rchinfo *ch = data; 894 struct sc_info *sc = ch->parent; 895 int r; 896 897 snd_mtxlock(sc->lock); 898 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 899 snd_mtxunlock(sc->lock); 900 901 return r; 902 } 903 904 static struct pcmchan_caps * 905 emurchan_getcaps(kobj_t obj, void *data) 906 { 907 struct sc_rchinfo *ch = data; 908 909 return &emu_reccaps[ch->num]; 910 } 911 912 /* The interrupt handler */ 913 static void 914 emu_intr(void *p) 915 { 916 struct sc_info *sc = (struct sc_info *)p; 917 u_int32_t stat, ack, i, x; 918 919 while (1) { 920 stat = emu_rd(sc, IPR, 4); 921 if (stat == 0) 922 break; 923 ack = 0; 924 925 /* process irq */ 926 if (stat & IPR_INTERVALTIMER) { 927 ack |= IPR_INTERVALTIMER; 928 x = 0; 929 for (i = 0; i < EMU_CHANS; i++) { 930 if (sc->pch[i].run) { 931 x = 1; 932 chn_intr(sc->pch[i].channel); 933 } 934 } 935 if (x == 0) 936 emu_enatimer(sc, 0); 937 } 938 939 940 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 941 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 942 if (sc->rch[0].channel) 943 chn_intr(sc->rch[0].channel); 944 } 945 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 946 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 947 if (sc->rch[1].channel) 948 chn_intr(sc->rch[1].channel); 949 } 950 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 951 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 952 if (sc->rch[2].channel) 953 chn_intr(sc->rch[2].channel); 954 } 955 if (stat & IPR_PCIERROR) { 956 ack |= IPR_PCIERROR; 957 device_printf(sc->dev, "pci error\n"); 958 /* we still get an nmi with ecc ram even if we ack this */ 959 } 960 if (stat & IPR_SAMPLERATETRACKER) { 961 ack |= IPR_SAMPLERATETRACKER; 962 device_printf(sc->dev, "sample rate tracker lock status change\n"); 963 } 964 965 if (stat & ~ack) 966 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", stat & ~ack); 967 968 emu_wr(sc, IPR, stat, 4); 969 } 970 } 971 972 static kobj_method_t emurchan_methods[] = { 973 KOBJMETHOD(channel_init, emurchan_init), 974 KOBJMETHOD(channel_setformat, emurchan_setformat), 975 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 976 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 977 KOBJMETHOD(channel_trigger, emurchan_trigger), 978 KOBJMETHOD(channel_getptr, emurchan_getptr), 979 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 980 { 0, 0 } 981 }; 982 CHANNEL_DECLARE(emurchan); 983 984 /* -------------------------------------------------------------------- */ 985 986 static void 987 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 988 { 989 void **phys = arg; 990 991 *phys = error? 0 : (void *)segs->ds_addr; 992 993 if (bootverbose) { 994 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 995 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 996 nseg, error); 997 } 998 } 999 1000 static void * 1001 emu_malloc(struct sc_info *sc, u_int32_t sz) 1002 { 1003 void *buf, *phys = 0; 1004 bus_dmamap_t map; 1005 1006 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1007 return NULL; 1008 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, &phys, 0) 1009 || !phys) 1010 return NULL; 1011 return buf; 1012 } 1013 1014 static void 1015 emu_free(struct sc_info *sc, void *buf) 1016 { 1017 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1018 } 1019 1020 static void * 1021 emu_memalloc(struct sc_info *sc, u_int32_t sz) 1022 { 1023 u_int32_t blksz, start, idx, ofs, tmp, found; 1024 struct emu_mem *mem = &sc->mem; 1025 struct emu_memblk *blk; 1026 void *buf; 1027 1028 blksz = sz / EMUPAGESIZE; 1029 if (sz > (blksz * EMUPAGESIZE)) 1030 blksz++; 1031 /* find a free block in the bitmap */ 1032 found = 0; 1033 start = 1; 1034 while (!found && start + blksz < MAXPAGES) { 1035 found = 1; 1036 for (idx = start; idx < start + blksz; idx++) 1037 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1038 found = 0; 1039 if (!found) 1040 start++; 1041 } 1042 if (!found) 1043 return NULL; 1044 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1045 if (blk == NULL) 1046 return NULL; 1047 buf = emu_malloc(sc, sz); 1048 if (buf == NULL) { 1049 free(blk, M_DEVBUF); 1050 return NULL; 1051 } 1052 blk->buf = buf; 1053 blk->pte_start = start; 1054 blk->pte_size = blksz; 1055 /* printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, blk->pte_start, blk->pte_size); */ 1056 ofs = 0; 1057 for (idx = start; idx < start + blksz; idx++) { 1058 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1059 tmp = (u_int32_t)vtophys((u_int8_t *)buf + ofs); 1060 /* printf("pte[%d] -> %x phys, %x virt\n", idx, tmp, ((u_int32_t)buf) + ofs); */ 1061 mem->ptb_pages[idx] = (tmp << 1) | idx; 1062 ofs += EMUPAGESIZE; 1063 } 1064 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1065 return buf; 1066 } 1067 1068 static int 1069 emu_memfree(struct sc_info *sc, void *buf) 1070 { 1071 u_int32_t idx, tmp; 1072 struct emu_mem *mem = &sc->mem; 1073 struct emu_memblk *blk, *i; 1074 1075 blk = NULL; 1076 SLIST_FOREACH(i, &mem->blocks, link) { 1077 if (i->buf == buf) 1078 blk = i; 1079 } 1080 if (blk == NULL) 1081 return EINVAL; 1082 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1083 emu_free(sc, buf); 1084 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1085 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1086 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1087 mem->ptb_pages[idx] = tmp | idx; 1088 } 1089 free(blk, M_DEVBUF); 1090 return 0; 1091 } 1092 1093 static int 1094 emu_memstart(struct sc_info *sc, void *buf) 1095 { 1096 struct emu_mem *mem = &sc->mem; 1097 struct emu_memblk *blk, *i; 1098 1099 blk = NULL; 1100 SLIST_FOREACH(i, &mem->blocks, link) { 1101 if (i->buf == buf) 1102 blk = i; 1103 } 1104 if (blk == NULL) 1105 return -EINVAL; 1106 return blk->pte_start; 1107 } 1108 1109 static void 1110 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, u_int32_t *pc) 1111 { 1112 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1113 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1114 (*pc)++; 1115 } 1116 1117 static void 1118 emu_initefx(struct sc_info *sc) 1119 { 1120 int i; 1121 u_int32_t pc = 16; 1122 1123 for (i = 0; i < 512; i++) { 1124 emu_wrefx(sc, i * 2, 0x10040); 1125 emu_wrefx(sc, i * 2 + 1, 0x610040); 1126 } 1127 1128 for (i = 0; i < 256; i++) 1129 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1130 1131 /* FX-8010 DSP Registers: 1132 FX Bus 1133 0x000-0x00f : 16 registers 1134 Input 1135 0x010/0x011 : AC97 Codec (l/r) 1136 0x012/0x013 : ADC, S/PDIF (l/r) 1137 0x014/0x015 : Mic(left), Zoom (l/r) 1138 0x016/0x017 : APS S/PDIF?? (l/r) 1139 Output 1140 0x020/0x021 : AC97 Output (l/r) 1141 0x022/0x023 : TOS link out (l/r) 1142 0x024/0x025 : ??? (l/r) 1143 0x026/0x027 : LiveDrive Headphone (l/r) 1144 0x028/0x029 : Rear Channel (l/r) 1145 0x02a/0x02b : ADC Recording Buffer (l/r) 1146 Constants 1147 0x040 - 0x044 = 0 - 4 1148 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1149 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1150 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1151 0x04e = 0x80000000, 0x04f = 0x7fffffff 1152 Temporary Values 1153 0x056 : Accumulator 1154 0x058 : Noise source? 1155 0x059 : Noise source? 1156 General Purpose Registers 1157 0x100 - 0x1ff 1158 Tank Memory Data Registers 1159 0x200 - 0x2ff 1160 Tank Memory Address Registers 1161 0x300 - 0x3ff 1162 */ 1163 1164 /* Operators: 1165 0 : z := w + (x * y >> 31) 1166 4 : z := w + x * y 1167 6 : z := w + x + y 1168 */ 1169 1170 /* Routing - this will be configurable in later version */ 1171 1172 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1173 emu_addefxop(sc, 4, 0x100, 0x12, 0, 0x44, &pc); 1174 emu_addefxop(sc, 4, 0x101, 0x13, 1, 0x44, &pc); 1175 /* GPR[0/1] += APS-input */ 1176 emu_addefxop(sc, 6, 0x100, 0x100, 0x40, sc->APS ? 0x16 : 0x40, &pc); 1177 emu_addefxop(sc, 6, 0x101, 0x101, 0x40, sc->APS ? 0x17 : 0x40, &pc); 1178 /* FrontOut (AC97) = GPR[0/1] */ 1179 emu_addefxop(sc, 6, 0x20, 0x40, 0x40, 0x100, &pc); 1180 emu_addefxop(sc, 6, 0x21, 0x40, 0x41, 0x101, &pc); 1181 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1182 /* RearVolume = GRP[0x10/0x11] */ 1183 emu_addefxop(sc, 0, 0x28, 0x40, 0x110, 0x100, &pc); 1184 emu_addefxop(sc, 0, 0x29, 0x40, 0x111, 0x101, &pc); 1185 /* TOS out = GPR[0/1] */ 1186 emu_addefxop(sc, 6, 0x22, 0x40, 0x40, 0x100, &pc); 1187 emu_addefxop(sc, 6, 0x23, 0x40, 0x40, 0x101, &pc); 1188 /* Mute Out2 */ 1189 emu_addefxop(sc, 6, 0x24, 0x40, 0x40, 0x40, &pc); 1190 emu_addefxop(sc, 6, 0x25, 0x40, 0x40, 0x40, &pc); 1191 /* Mute Out3 */ 1192 emu_addefxop(sc, 6, 0x26, 0x40, 0x40, 0x40, &pc); 1193 emu_addefxop(sc, 6, 0x27, 0x40, 0x40, 0x40, &pc); 1194 /* Input0 (AC97) -> Record */ 1195 emu_addefxop(sc, 6, 0x2a, 0x40, 0x40, 0x10, &pc); 1196 emu_addefxop(sc, 6, 0x2b, 0x40, 0x40, 0x11, &pc); 1197 1198 emu_wrptr(sc, 0, DBG, 0); 1199 } 1200 1201 /* Probe and attach the card */ 1202 static int 1203 emu_init(struct sc_info *sc) 1204 { 1205 u_int32_t spcs, ch, tmp, i; 1206 1207 /* disable audio and lock cache */ 1208 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1209 1210 /* reset recording buffers */ 1211 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1212 emu_wrptr(sc, 0, MICBA, 0); 1213 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1214 emu_wrptr(sc, 0, FXBA, 0); 1215 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1216 emu_wrptr(sc, 0, ADCBA, 0); 1217 1218 /* disable channel interrupt */ 1219 emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4); 1220 emu_wrptr(sc, 0, CLIEL, 0); 1221 emu_wrptr(sc, 0, CLIEH, 0); 1222 emu_wrptr(sc, 0, SOLEL, 0); 1223 emu_wrptr(sc, 0, SOLEH, 0); 1224 1225 /* init envelope engine */ 1226 for (ch = 0; ch < NUM_G; ch++) { 1227 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1228 emu_wrptr(sc, ch, IP, 0); 1229 emu_wrptr(sc, ch, VTFT, 0xffff); 1230 emu_wrptr(sc, ch, CVCF, 0xffff); 1231 emu_wrptr(sc, ch, PTRX, 0); 1232 emu_wrptr(sc, ch, CPF, 0); 1233 emu_wrptr(sc, ch, CCR, 0); 1234 1235 emu_wrptr(sc, ch, PSST, 0); 1236 emu_wrptr(sc, ch, DSL, 0x10); 1237 emu_wrptr(sc, ch, CCCA, 0); 1238 emu_wrptr(sc, ch, Z1, 0); 1239 emu_wrptr(sc, ch, Z2, 0); 1240 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1241 1242 emu_wrptr(sc, ch, ATKHLDM, 0); 1243 emu_wrptr(sc, ch, DCYSUSM, 0); 1244 emu_wrptr(sc, ch, IFATN, 0xffff); 1245 emu_wrptr(sc, ch, PEFE, 0); 1246 emu_wrptr(sc, ch, FMMOD, 0); 1247 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1248 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1249 emu_wrptr(sc, ch, TEMPENV, 0); 1250 1251 /*** these are last so OFF prevents writing ***/ 1252 emu_wrptr(sc, ch, LFOVAL2, 0); 1253 emu_wrptr(sc, ch, LFOVAL1, 0); 1254 emu_wrptr(sc, ch, ATKHLDV, 0); 1255 emu_wrptr(sc, ch, ENVVOL, 0); 1256 emu_wrptr(sc, ch, ENVVAL, 0); 1257 1258 sc->voice[ch].vnum = ch; 1259 sc->voice[ch].slave = NULL; 1260 sc->voice[ch].busy = 0; 1261 sc->voice[ch].ismaster = 0; 1262 sc->voice[ch].running = 0; 1263 sc->voice[ch].b16 = 0; 1264 sc->voice[ch].stereo = 0; 1265 sc->voice[ch].speed = 0; 1266 sc->voice[ch].start = 0; 1267 sc->voice[ch].end = 0; 1268 sc->voice[ch].channel = NULL; 1269 } 1270 sc->pnum = sc->rnum = 0; 1271 1272 /* 1273 * Init to 0x02109204 : 1274 * Clock accuracy = 0 (1000ppm) 1275 * Sample Rate = 2 (48kHz) 1276 * Audio Channel = 1 (Left of 2) 1277 * Source Number = 0 (Unspecified) 1278 * Generation Status = 1 (Original for Cat Code 12) 1279 * Cat Code = 12 (Digital Signal Mixer) 1280 * Mode = 0 (Mode 0) 1281 * Emphasis = 0 (None) 1282 * CP = 1 (Copyright unasserted) 1283 * AN = 0 (Audio data) 1284 * P = 0 (Consumer) 1285 */ 1286 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1287 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1288 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1289 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1290 emu_wrptr(sc, 0, SPCS0, spcs); 1291 emu_wrptr(sc, 0, SPCS1, spcs); 1292 emu_wrptr(sc, 0, SPCS2, spcs); 1293 1294 emu_initefx(sc); 1295 1296 SLIST_INIT(&sc->mem.blocks); 1297 sc->mem.ptb_pages = emu_malloc(sc, MAXPAGES * sizeof(u_int32_t)); 1298 if (sc->mem.ptb_pages == NULL) 1299 return -1; 1300 1301 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE); 1302 if (sc->mem.silent_page == NULL) { 1303 emu_free(sc, sc->mem.ptb_pages); 1304 return -1; 1305 } 1306 /* Clear page with silence & setup all pointers to this page */ 1307 bzero(sc->mem.silent_page, EMUPAGESIZE); 1308 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1309 for (i = 0; i < MAXPAGES; i++) 1310 sc->mem.ptb_pages[i] = tmp | i; 1311 1312 emu_wrptr(sc, 0, PTB, vtophys(sc->mem.ptb_pages)); 1313 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1314 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1315 1316 for (ch = 0; ch < NUM_G; ch++) { 1317 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1318 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1319 } 1320 1321 /* emu_memalloc(sc, EMUPAGESIZE); */ 1322 /* 1323 * Hokay, now enable the AUD bit 1324 * Enable Audio = 1 1325 * Mute Disable Audio = 0 1326 * Lock Tank Memory = 1 1327 * Lock Sound Memory = 0 1328 * Auto Mute = 1 1329 */ 1330 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE | HCFG_AUTOMUTE; 1331 if (sc->rev >= 6) 1332 tmp |= HCFG_JOYENABLE; 1333 emu_wr(sc, HCFG, tmp, 4); 1334 1335 /* TOSLink detection */ 1336 sc->tos_link = 0; 1337 tmp = emu_rd(sc, HCFG, 4); 1338 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1339 emu_wr(sc, HCFG, tmp | 0x800, 4); 1340 DELAY(50); 1341 if (tmp != (emu_rd(sc, HCFG, 4) & ~0x800)) { 1342 sc->tos_link = 1; 1343 emu_wr(sc, HCFG, tmp, 4); 1344 } 1345 } 1346 1347 return 0; 1348 } 1349 1350 static int 1351 emu_uninit(struct sc_info *sc) 1352 { 1353 u_int32_t ch; 1354 1355 emu_wr(sc, INTE, 0, 4); 1356 for (ch = 0; ch < NUM_G; ch++) 1357 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1358 for (ch = 0; ch < NUM_G; ch++) { 1359 emu_wrptr(sc, ch, VTFT, 0); 1360 emu_wrptr(sc, ch, CVCF, 0); 1361 emu_wrptr(sc, ch, PTRX, 0); 1362 emu_wrptr(sc, ch, CPF, 0); 1363 } 1364 1365 /* disable audio and lock cache */ 1366 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1367 1368 emu_wrptr(sc, 0, PTB, 0); 1369 /* reset recording buffers */ 1370 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1371 emu_wrptr(sc, 0, MICBA, 0); 1372 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1373 emu_wrptr(sc, 0, FXBA, 0); 1374 emu_wrptr(sc, 0, FXWC, 0); 1375 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1376 emu_wrptr(sc, 0, ADCBA, 0); 1377 emu_wrptr(sc, 0, TCB, 0); 1378 emu_wrptr(sc, 0, TCBS, 0); 1379 1380 /* disable channel interrupt */ 1381 emu_wrptr(sc, 0, CLIEL, 0); 1382 emu_wrptr(sc, 0, CLIEH, 0); 1383 emu_wrptr(sc, 0, SOLEL, 0); 1384 emu_wrptr(sc, 0, SOLEH, 0); 1385 1386 /* init envelope engine */ 1387 if (!SLIST_EMPTY(&sc->mem.blocks)) 1388 device_printf(sc->dev, "warning: memblock list not empty\n"); 1389 emu_free(sc, sc->mem.ptb_pages); 1390 emu_free(sc, sc->mem.silent_page); 1391 1392 return 0; 1393 } 1394 1395 static int 1396 emu_pci_probe(device_t dev) 1397 { 1398 char *s = NULL; 1399 1400 switch (pci_get_devid(dev)) { 1401 case EMU10K1_PCI_ID: 1402 s = "Creative EMU10K1"; 1403 break; 1404 } 1405 1406 if (s) device_set_desc(dev, s); 1407 return s? 0 : ENXIO; 1408 } 1409 1410 static int 1411 emu_pci_attach(device_t dev) 1412 { 1413 u_int32_t data; 1414 struct sc_info *sc; 1415 struct ac97_info *codec = NULL; 1416 int i, mapped; 1417 char status[SND_STATUSLEN]; 1418 1419 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) { 1420 device_printf(dev, "cannot allocate softc\n"); 1421 return ENXIO; 1422 } 1423 1424 sc->lock = snd_mtxcreate(device_get_nameunit(dev)); 1425 sc->dev = dev; 1426 sc->type = pci_get_devid(dev); 1427 sc->rev = pci_get_revid(dev); 1428 1429 data = pci_read_config(dev, PCIR_COMMAND, 2); 1430 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 1431 pci_write_config(dev, PCIR_COMMAND, data, 2); 1432 data = pci_read_config(dev, PCIR_COMMAND, 2); 1433 1434 mapped = 0; 1435 for (i = 0; (mapped == 0) && (i < PCI_MAXMAPS_0); i++) { 1436 sc->regid = PCIR_MAPS + i*4; 1437 sc->regtype = SYS_RES_MEMORY; 1438 sc->reg = bus_alloc_resource(dev, sc->regtype, &sc->regid, 1439 0, ~0, 1, RF_ACTIVE); 1440 if (!sc->reg) { 1441 sc->regtype = SYS_RES_IOPORT; 1442 sc->reg = bus_alloc_resource(dev, sc->regtype, 1443 &sc->regid, 0, ~0, 1, 1444 RF_ACTIVE); 1445 } 1446 if (sc->reg) { 1447 sc->st = rman_get_bustag(sc->reg); 1448 sc->sh = rman_get_bushandle(sc->reg); 1449 mapped++; 1450 } 1451 } 1452 1453 if (mapped == 0) { 1454 device_printf(dev, "unable to map register space\n"); 1455 goto bad; 1456 } 1457 1458 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1459 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1460 /*highaddr*/BUS_SPACE_MAXADDR, 1461 /*filter*/NULL, /*filterarg*/NULL, 1462 /*maxsize*/262144, /*nsegments*/1, /*maxsegz*/0x3ffff, 1463 /*flags*/0, &sc->parent_dmat) != 0) { 1464 device_printf(dev, "unable to create dma tag\n"); 1465 goto bad; 1466 } 1467 1468 if (emu_init(sc) == -1) { 1469 device_printf(dev, "unable to initialize the card\n"); 1470 goto bad; 1471 } 1472 1473 codec = AC97_CREATE(dev, sc, emu_ac97); 1474 if (codec == NULL) goto bad; 1475 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1476 1477 sc->irqid = 0; 1478 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid, 1479 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 1480 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) { 1481 device_printf(dev, "unable to map interrupt\n"); 1482 goto bad; 1483 } 1484 1485 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 1486 (sc->regtype == SYS_RES_IOPORT)? "io" : "memory", 1487 rman_get_start(sc->reg), rman_get_start(sc->irq)); 1488 1489 if (pcm_register(dev, sc, EMU_CHANS, 3)) goto bad; 1490 for (i = 0; i < EMU_CHANS; i++) 1491 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1492 for (i = 0; i < 3; i++) 1493 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1494 1495 pcm_setstatus(dev, status); 1496 1497 return 0; 1498 1499 bad: 1500 if (codec) ac97_destroy(codec); 1501 if (sc->reg) bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); 1502 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1503 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 1504 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1505 if (sc->lock) snd_mtxfree(sc->lock); 1506 free(sc, M_DEVBUF); 1507 return ENXIO; 1508 } 1509 1510 static int 1511 emu_pci_detach(device_t dev) 1512 { 1513 int r; 1514 struct sc_info *sc; 1515 1516 r = pcm_unregister(dev); 1517 if (r) 1518 return r; 1519 1520 sc = pcm_getdevinfo(dev); 1521 /* shutdown chip */ 1522 emu_uninit(sc); 1523 1524 bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); 1525 bus_teardown_intr(dev, sc->irq, sc->ih); 1526 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 1527 bus_dma_tag_destroy(sc->parent_dmat); 1528 snd_mtxfree(sc->lock); 1529 free(sc, M_DEVBUF); 1530 1531 return 0; 1532 } 1533 1534 /* add suspend, resume */ 1535 static device_method_t emu_methods[] = { 1536 /* Device interface */ 1537 DEVMETHOD(device_probe, emu_pci_probe), 1538 DEVMETHOD(device_attach, emu_pci_attach), 1539 DEVMETHOD(device_detach, emu_pci_detach), 1540 1541 { 0, 0 } 1542 }; 1543 1544 static driver_t emu_driver = { 1545 "pcm", 1546 emu_methods, 1547 sizeof(struct snddev_info), 1548 }; 1549 1550 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0); 1551 MODULE_DEPEND(snd_emu10k1, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 1552 MODULE_VERSION(snd_emu10k1, 1); 1553 1554 /* dummy driver to silence the joystick device */ 1555 static int 1556 emujoy_pci_probe(device_t dev) 1557 { 1558 char *s = NULL; 1559 1560 switch (pci_get_devid(dev)) { 1561 case 0x70021102: 1562 s = "Creative EMU10K1 Joystick"; 1563 device_quiet(dev); 1564 break; 1565 } 1566 1567 if (s) device_set_desc(dev, s); 1568 return s? 0 : ENXIO; 1569 } 1570 1571 static int 1572 emujoy_pci_attach(device_t dev) 1573 { 1574 return 0; 1575 } 1576 1577 static int 1578 emujoy_pci_detach(device_t dev) 1579 { 1580 return 0; 1581 } 1582 1583 static device_method_t emujoy_methods[] = { 1584 DEVMETHOD(device_probe, emujoy_pci_probe), 1585 DEVMETHOD(device_attach, emujoy_pci_attach), 1586 DEVMETHOD(device_detach, emujoy_pci_detach), 1587 1588 { 0, 0 } 1589 }; 1590 1591 static driver_t emujoy_driver = { 1592 "emujoy", 1593 emujoy_methods, 1594 8, 1595 }; 1596 1597 static devclass_t emujoy_devclass; 1598 1599 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0); 1600 1601