1 /* 2 * Copyright (c) 1999 Seigo Tanimura 3 * All rights reserved. 4 * 5 * Portions of this source are based on cwcealdr.cpp and dhwiface.cpp in 6 * cwcealdr1.zip, the sample sources by Crystal Semiconductor. 7 * Copyright (c) 1996-1998 Crystal Semiconductor Corp. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #include <sys/soundcard.h> 34 #include <dev/sound/pcm/sound.h> 35 #include <dev/sound/pcm/ac97.h> 36 #include <dev/sound/chip.h> 37 #include <dev/sound/pci/csareg.h> 38 #include <dev/sound/pci/csavar.h> 39 40 #include <pci/pcireg.h> 41 #include <pci/pcivar.h> 42 43 /* device private data */ 44 struct csa_info; 45 46 struct csa_chinfo { 47 struct csa_info *parent; 48 pcm_channel *channel; 49 snd_dbuf *buffer; 50 int dir; 51 u_int32_t fmt; 52 int dma; 53 }; 54 55 struct csa_info { 56 csa_res res; /* resource */ 57 void *ih; /* Interrupt cookie */ 58 bus_dma_tag_t parent_dmat; /* DMA tag */ 59 struct csa_bridgeinfo *binfo; /* The state of the parent. */ 60 61 /* Contents of board's registers */ 62 u_long pfie; 63 u_long pctl; 64 u_long cctl; 65 struct csa_chinfo pch, rch; 66 }; 67 68 /* -------------------------------------------------------------------- */ 69 70 /* prototypes */ 71 static int csa_init(struct csa_info *); 72 static void csa_intr(void *); 73 static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate); 74 static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate); 75 static void csa_startplaydma(struct csa_info *csa); 76 static void csa_startcapturedma(struct csa_info *csa); 77 static void csa_stopplaydma(struct csa_info *csa); 78 static void csa_stopcapturedma(struct csa_info *csa); 79 static void csa_powerupadc(csa_res *resp); 80 static void csa_powerupdac(csa_res *resp); 81 static int csa_startdsp(csa_res *resp); 82 static int csa_allocres(struct csa_info *scp, device_t dev); 83 static void csa_releaseres(struct csa_info *scp, device_t dev); 84 85 /* talk to the codec - called from ac97.c */ 86 static u_int32_t csa_rdcd(void *, int); 87 static void csa_wrcd(void *, int, u_int32_t); 88 89 /* channel interface */ 90 static void *csachan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 91 static int csachan_setdir(void *data, int dir); 92 static int csachan_setformat(void *data, u_int32_t format); 93 static int csachan_setspeed(void *data, u_int32_t speed); 94 static int csachan_setblocksize(void *data, u_int32_t blocksize); 95 static int csachan_trigger(void *data, int go); 96 static int csachan_getptr(void *data); 97 static pcmchan_caps *csachan_getcaps(void *data); 98 99 static pcmchan_caps csa_playcaps = { 100 8000, 48000, 101 AFMT_STEREO | AFMT_U8 | AFMT_S8 | AFMT_S16_LE | AFMT_S16_BE, 102 AFMT_STEREO | AFMT_S16_LE 103 }; 104 105 static pcmchan_caps csa_reccaps = { 106 11025, 48000, 107 AFMT_STEREO | AFMT_S16_LE, 108 AFMT_STEREO | AFMT_S16_LE 109 }; 110 111 static pcm_channel csa_chantemplate = { 112 csachan_init, 113 csachan_setdir, 114 csachan_setformat, 115 csachan_setspeed, 116 csachan_setblocksize, 117 csachan_trigger, 118 csachan_getptr, 119 csachan_getcaps, 120 }; 121 122 /* -------------------------------------------------------------------- */ 123 124 /* channel interface */ 125 static void * 126 csachan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 127 { 128 struct csa_info *csa = devinfo; 129 struct csa_chinfo *ch = (dir == PCMDIR_PLAY)? &csa->pch : &csa->rch; 130 131 ch->parent = csa; 132 ch->channel = c; 133 ch->buffer = b; 134 ch->buffer->bufsize = CS461x_BUFFSIZE; 135 if (chn_allocbuf(ch->buffer, csa->parent_dmat) == -1) return NULL; 136 return ch; 137 } 138 139 static int 140 csachan_setdir(void *data, int dir) 141 { 142 struct csa_chinfo *ch = data; 143 struct csa_info *csa = ch->parent; 144 csa_res *resp; 145 146 resp = &csa->res; 147 148 if (dir == PCMDIR_PLAY) 149 csa_writemem(resp, BA1_PBA, vtophys(ch->buffer->buf)); 150 else 151 csa_writemem(resp, BA1_CBA, vtophys(ch->buffer->buf)); 152 ch->dir = dir; 153 return 0; 154 } 155 156 static int 157 csachan_setformat(void *data, u_int32_t format) 158 { 159 struct csa_chinfo *ch = data; 160 struct csa_info *csa = ch->parent; 161 u_long pdtc; 162 csa_res *resp; 163 164 resp = &csa->res; 165 166 if (ch->dir == PCMDIR_REC) 167 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); 168 else { 169 csa->pfie = csa_readmem(resp, BA1_PFIE) & ~0x0000f03f; 170 if (format & AFMT_U8 || format & AFMT_U16_LE || format & AFMT_U16_BE) 171 csa->pfie |= 0x8000; 172 if (format & AFMT_S16_BE || format & AFMT_U16_BE) 173 csa->pfie |= 0x4000; 174 if (!(format & AFMT_STEREO)) 175 csa->pfie |= 0x2000; 176 if (format & AFMT_U8 || format & AFMT_S8) 177 csa->pfie |= 0x1000; 178 csa_writemem(resp, BA1_PFIE, csa->pfie); 179 pdtc = csa_readmem(resp, BA1_PDTC) & ~0x000003ff; 180 if ((format & AFMT_S16_BE || format & AFMT_U16_BE || format & AFMT_S16_LE || format & AFMT_U16_LE) && (format & AFMT_STEREO)) 181 pdtc |= 0x00f; 182 else if ((format & AFMT_S16_BE || format & AFMT_U16_BE || format & AFMT_S16_LE || format & AFMT_U16_LE) || (format & AFMT_STEREO)) 183 pdtc |= 0x007; 184 else 185 pdtc |= 0x003; 186 csa_writemem(resp, BA1_PDTC, pdtc); 187 } 188 ch->fmt = format; 189 return 0; 190 } 191 192 static int 193 csachan_setspeed(void *data, u_int32_t speed) 194 { 195 struct csa_chinfo *ch = data; 196 struct csa_info *csa = ch->parent; 197 csa_res *resp; 198 199 resp = &csa->res; 200 201 if (ch->dir == PCMDIR_PLAY) 202 csa_setplaysamplerate(resp, speed); 203 else if (ch->dir == PCMDIR_REC) 204 csa_setcapturesamplerate(resp, speed); 205 206 /* rec/play speeds locked together - should indicate in flags */ 207 #if 0 208 if (ch->direction == PCMDIR_PLAY) d->rec[0].speed = speed; 209 else d->play[0].speed = speed; 210 #endif 211 return speed; /* XXX calc real speed */ 212 } 213 214 static void 215 csa_setplaysamplerate(csa_res *resp, u_long ulInRate) 216 { 217 u_long ulTemp1, ulTemp2; 218 u_long ulPhiIncr; 219 u_long ulCorrectionPerGOF, ulCorrectionPerSec; 220 u_long ulOutRate; 221 222 ulOutRate = 48000; 223 224 /* 225 * Compute the values used to drive the actual sample rate conversion. 226 * The following formulas are being computed, using inline assembly 227 * since we need to use 64 bit arithmetic to compute the values: 228 * 229 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out) 230 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) / 231 * GOF_PER_SEC) 232 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr - 233 * GOF_PER_SEC * ulCorrectionPerGOF 234 * 235 * i.e. 236 * 237 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out) 238 * ulCorrectionPerGOF:ulCorrectionPerSec = 239 * dividend:remainder(ulOther / GOF_PER_SEC) 240 */ 241 ulTemp1 = ulInRate << 16; 242 ulPhiIncr = ulTemp1 / ulOutRate; 243 ulTemp1 -= ulPhiIncr * ulOutRate; 244 ulTemp1 <<= 10; 245 ulPhiIncr <<= 10; 246 ulTemp2 = ulTemp1 / ulOutRate; 247 ulPhiIncr += ulTemp2; 248 ulTemp1 -= ulTemp2 * ulOutRate; 249 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC; 250 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC; 251 ulCorrectionPerSec = ulTemp1; 252 253 /* 254 * Fill in the SampleRateConverter control block. 255 */ 256 csa_writemem(resp, BA1_PSRC, ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF)); 257 csa_writemem(resp, BA1_PPI, ulPhiIncr); 258 } 259 260 static void 261 csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate) 262 { 263 u_long ulPhiIncr, ulCoeffIncr, ulTemp1, ulTemp2; 264 u_long ulCorrectionPerGOF, ulCorrectionPerSec, ulInitialDelay; 265 u_long dwFrameGroupLength, dwCnt; 266 u_long ulInRate; 267 268 ulInRate = 48000; 269 270 /* 271 * We can only decimate by up to a factor of 1/9th the hardware rate. 272 * Return an error if an attempt is made to stray outside that limit. 273 */ 274 if((ulOutRate * 9) < ulInRate) 275 return; 276 277 /* 278 * We can not capture at at rate greater than the Input Rate (48000). 279 * Return an error if an attempt is made to stray outside that limit. 280 */ 281 if(ulOutRate > ulInRate) 282 return; 283 284 /* 285 * Compute the values used to drive the actual sample rate conversion. 286 * The following formulas are being computed, using inline assembly 287 * since we need to use 64 bit arithmetic to compute the values: 288 * 289 * ulCoeffIncr = -floor((Fs,out * 2^23) / Fs,in) 290 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out) 291 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) / 292 * GOF_PER_SEC) 293 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr - 294 * GOF_PER_SEC * ulCorrectionPerGOF 295 * ulInitialDelay = ceil((24 * Fs,in) / Fs,out) 296 * 297 * i.e. 298 * 299 * ulCoeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in)) 300 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out) 301 * ulCorrectionPerGOF:ulCorrectionPerSec = 302 * dividend:remainder(ulOther / GOF_PER_SEC) 303 * ulInitialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out) 304 */ 305 ulTemp1 = ulOutRate << 16; 306 ulCoeffIncr = ulTemp1 / ulInRate; 307 ulTemp1 -= ulCoeffIncr * ulInRate; 308 ulTemp1 <<= 7; 309 ulCoeffIncr <<= 7; 310 ulCoeffIncr += ulTemp1 / ulInRate; 311 ulCoeffIncr ^= 0xFFFFFFFF; 312 ulCoeffIncr++; 313 ulTemp1 = ulInRate << 16; 314 ulPhiIncr = ulTemp1 / ulOutRate; 315 ulTemp1 -= ulPhiIncr * ulOutRate; 316 ulTemp1 <<= 10; 317 ulPhiIncr <<= 10; 318 ulTemp2 = ulTemp1 / ulOutRate; 319 ulPhiIncr += ulTemp2; 320 ulTemp1 -= ulTemp2 * ulOutRate; 321 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC; 322 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC; 323 ulCorrectionPerSec = ulTemp1; 324 ulInitialDelay = ((ulInRate * 24) + ulOutRate - 1) / ulOutRate; 325 326 /* 327 * Fill in the VariDecimate control block. 328 */ 329 csa_writemem(resp, BA1_CSRC, 330 ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF)); 331 csa_writemem(resp, BA1_CCI, ulCoeffIncr); 332 csa_writemem(resp, BA1_CD, 333 (((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | 0x80); 334 csa_writemem(resp, BA1_CPI, ulPhiIncr); 335 336 /* 337 * Figure out the frame group length for the write back task. Basically, 338 * this is just the factors of 24000 (2^6*3*5^3) that are not present in 339 * the output sample rate. 340 */ 341 dwFrameGroupLength = 1; 342 for(dwCnt = 2; dwCnt <= 64; dwCnt *= 2) 343 { 344 if(((ulOutRate / dwCnt) * dwCnt) != 345 ulOutRate) 346 { 347 dwFrameGroupLength *= 2; 348 } 349 } 350 if(((ulOutRate / 3) * 3) != 351 ulOutRate) 352 { 353 dwFrameGroupLength *= 3; 354 } 355 for(dwCnt = 5; dwCnt <= 125; dwCnt *= 5) 356 { 357 if(((ulOutRate / dwCnt) * dwCnt) != 358 ulOutRate) 359 { 360 dwFrameGroupLength *= 5; 361 } 362 } 363 364 /* 365 * Fill in the WriteBack control block. 366 */ 367 csa_writemem(resp, BA1_CFG1, dwFrameGroupLength); 368 csa_writemem(resp, BA1_CFG2, (0x00800000 | dwFrameGroupLength)); 369 csa_writemem(resp, BA1_CCST, 0x0000FFFF); 370 csa_writemem(resp, BA1_CSPB, ((65536 * ulOutRate) / 24000)); 371 csa_writemem(resp, (BA1_CSPB + 4), 0x0000FFFF); 372 } 373 374 static int 375 csachan_setblocksize(void *data, u_int32_t blocksize) 376 { 377 #if notdef 378 return blocksize; 379 #else 380 struct csa_chinfo *ch = data; 381 return ch->buffer->bufsize / 2; 382 #endif /* notdef */ 383 } 384 385 static int 386 csachan_trigger(void *data, int go) 387 { 388 struct csa_chinfo *ch = data; 389 struct csa_info *csa = ch->parent; 390 391 if (go == PCMTRIG_EMLDMAWR) return 0; 392 if (ch->dir == PCMDIR_PLAY) { 393 if (go == PCMTRIG_START) 394 csa_startplaydma(csa); 395 else 396 csa_stopplaydma(csa); 397 } else { 398 if (go == PCMTRIG_START) 399 csa_startcapturedma(csa); 400 else 401 csa_stopcapturedma(csa); 402 } 403 return 0; 404 } 405 406 static void 407 csa_startplaydma(struct csa_info *csa) 408 { 409 csa_res *resp; 410 u_long ul; 411 412 if (!csa->pch.dma) { 413 resp = &csa->res; 414 ul = csa_readmem(resp, BA1_PCTL); 415 ul &= 0x0000ffff; 416 csa_writemem(resp, BA1_PCTL, ul | csa->pctl); 417 csa_writemem(resp, BA1_PVOL, 0x80008000); 418 csa->pch.dma = 1; 419 } 420 } 421 422 static void 423 csa_startcapturedma(struct csa_info *csa) 424 { 425 csa_res *resp; 426 u_long ul; 427 428 if (!csa->rch.dma) { 429 resp = &csa->res; 430 ul = csa_readmem(resp, BA1_CCTL); 431 ul &= 0xffff0000; 432 csa_writemem(resp, BA1_CCTL, ul | csa->cctl); 433 csa_writemem(resp, BA1_CVOL, 0x80008000); 434 csa->rch.dma = 1; 435 } 436 } 437 438 static void 439 csa_stopplaydma(struct csa_info *csa) 440 { 441 csa_res *resp; 442 u_long ul; 443 444 if (csa->pch.dma) { 445 resp = &csa->res; 446 ul = csa_readmem(resp, BA1_PCTL); 447 csa->pctl = ul & 0xffff0000; 448 csa_writemem(resp, BA1_PCTL, ul & 0x0000ffff); 449 csa_writemem(resp, BA1_PVOL, 0xffffffff); 450 csa->pch.dma = 0; 451 452 /* 453 * The bitwise pointer of the serial FIFO in the DSP 454 * seems to make an error upon starting or stopping the 455 * DSP. Clear the FIFO and correct the pointer if we 456 * are not capturing. 457 */ 458 if (!csa->rch.dma) { 459 csa_clearserialfifos(resp); 460 csa_writeio(resp, BA0_SERBSP, 0); 461 } 462 } 463 } 464 465 static void 466 csa_stopcapturedma(struct csa_info *csa) 467 { 468 csa_res *resp; 469 u_long ul; 470 471 if (csa->rch.dma) { 472 resp = &csa->res; 473 ul = csa_readmem(resp, BA1_CCTL); 474 csa->cctl = ul & 0x0000ffff; 475 csa_writemem(resp, BA1_CCTL, ul & 0xffff0000); 476 csa_writemem(resp, BA1_CVOL, 0xffffffff); 477 csa->rch.dma = 0; 478 479 /* 480 * The bitwise pointer of the serial FIFO in the DSP 481 * seems to make an error upon starting or stopping the 482 * DSP. Clear the FIFO and correct the pointer if we 483 * are not playing. 484 */ 485 if (!csa->pch.dma) { 486 csa_clearserialfifos(resp); 487 csa_writeio(resp, BA0_SERBSP, 0); 488 } 489 } 490 } 491 492 static void 493 csa_powerupdac(csa_res *resp) 494 { 495 int i; 496 u_long ul; 497 498 /* 499 * Power on the DACs on the AC97 codec. We turn off the DAC 500 * powerdown bit and write the new value of the power control 501 * register. 502 */ 503 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 504 ul &= 0xfdff; 505 csa_writeio(resp, BA0_AC97_POWERDOWN, ul); 506 507 /* 508 * Now, we wait until we sample a DAC ready state. 509 */ 510 for (i = 0 ; i < 32 ; i++) { 511 /* 512 * First, lets wait a short while to let things settle out a 513 * bit, and to prevent retrying the read too quickly. 514 */ 515 DELAY(125); 516 517 /* 518 * Read the current state of the power control register. 519 */ 520 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 521 522 /* 523 * If the DAC ready state bit is set, then stop waiting. 524 */ 525 if ((ul & 0x2) != 0) 526 break; 527 } 528 /* 529 * The DACs are now calibrated, so we can unmute the DAC output. 530 */ 531 csa_writeio(resp, BA0_AC97_PCM_OUT_VOLUME, 0x0808); 532 } 533 534 static void 535 csa_powerupadc(csa_res *resp) 536 { 537 int i; 538 u_long ul; 539 540 /* 541 * Power on the ADCs on the AC97 codec. We turn off the ADC 542 * powerdown bit and write the new value of the power control 543 * register. 544 */ 545 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 546 ul &= 0xfeff; 547 csa_writeio(resp, BA0_AC97_POWERDOWN, ul); 548 549 /* 550 * Now, we wait until we sample a ADC ready state. 551 */ 552 for (i = 0 ; i < 32 ; i++) { 553 /* 554 * First, lets wait a short while to let things settle out a 555 * bit, and to prevent retrying the read too quickly. 556 */ 557 DELAY(125); 558 559 /* 560 * Read the current state of the power control register. 561 */ 562 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 563 564 /* 565 * If the ADC ready state bit is set, then stop waiting. 566 */ 567 if ((ul & 0x1) != 0) 568 break; 569 } 570 } 571 572 static int 573 csa_startdsp(csa_res *resp) 574 { 575 int i; 576 u_long ul; 577 578 /* 579 * Set the frame timer to reflect the number of cycles per frame. 580 */ 581 csa_writemem(resp, BA1_FRMT, 0xadf); 582 583 /* 584 * Turn on the run, run at frame, and DMA enable bits in the local copy of 585 * the SP control register. 586 */ 587 csa_writemem(resp, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN); 588 589 /* 590 * Wait until the run at frame bit resets itself in the SP control 591 * register. 592 */ 593 ul = 0; 594 for (i = 0 ; i < 25 ; i++) { 595 /* 596 * Wait a little bit, so we don't issue PCI reads too frequently. 597 */ 598 #if notdef 599 DELAY(1000); 600 #else 601 DELAY(125); 602 #endif /* notdef */ 603 /* 604 * Fetch the current value of the SP status register. 605 */ 606 ul = csa_readmem(resp, BA1_SPCR); 607 608 /* 609 * If the run at frame bit has reset, then stop waiting. 610 */ 611 if((ul & SPCR_RUNFR) == 0) 612 break; 613 } 614 /* 615 * If the run at frame bit never reset, then return an error. 616 */ 617 if((ul & SPCR_RUNFR) != 0) 618 return (EAGAIN); 619 620 return (0); 621 } 622 623 static int 624 csachan_getptr(void *data) 625 { 626 struct csa_chinfo *ch = data; 627 struct csa_info *csa = ch->parent; 628 csa_res *resp; 629 int ptr; 630 631 resp = &csa->res; 632 633 if (ch->dir == PCMDIR_PLAY) { 634 ptr = csa_readmem(resp, BA1_PBA) - vtophys(ch->buffer->buf); 635 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0) 636 ptr >>= 1; 637 } else { 638 ptr = csa_readmem(resp, BA1_CBA) - vtophys(ch->buffer->buf); 639 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0) 640 ptr >>= 1; 641 } 642 643 return (ptr); 644 } 645 646 static pcmchan_caps * 647 csachan_getcaps(void *data) 648 { 649 struct csa_chinfo *ch = data; 650 return (ch->dir == PCMDIR_PLAY)? &csa_playcaps : &csa_reccaps; 651 } 652 653 /* The interrupt handler */ 654 static void 655 csa_intr (void *p) 656 { 657 struct csa_info *csa = p; 658 659 if ((csa->binfo->hisr & HISR_VC0) != 0) 660 chn_intr(csa->pch.channel); 661 if ((csa->binfo->hisr & HISR_VC1) != 0) 662 chn_intr(csa->rch.channel); 663 } 664 665 /* -------------------------------------------------------------------- */ 666 667 /* 668 * Probe and attach the card 669 */ 670 671 static int 672 csa_init(struct csa_info *csa) 673 { 674 csa_res *resp; 675 676 resp = &csa->res; 677 678 csa->pfie = 0; 679 csa_stopplaydma(csa); 680 csa_stopcapturedma(csa); 681 682 /* Crank up the power on the DAC and ADC. */ 683 csa_powerupadc(resp); 684 csa_powerupdac(resp); 685 686 csa_setplaysamplerate(resp, 8000); 687 csa_setcapturesamplerate(resp, 8000); 688 689 if (csa_startdsp(resp)) 690 return (1); 691 692 return 0; 693 } 694 695 /* Allocates resources. */ 696 static int 697 csa_allocres(struct csa_info *csa, device_t dev) 698 { 699 csa_res *resp; 700 701 resp = &csa->res; 702 if (resp->io == NULL) { 703 resp->io = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->io_rid, 0, ~0, CS461x_IO_SIZE, RF_ACTIVE); 704 if (resp->io == NULL) 705 return (1); 706 } 707 if (resp->mem == NULL) { 708 resp->mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->mem_rid, 0, ~0, CS461x_MEM_SIZE, RF_ACTIVE); 709 if (resp->mem == NULL) 710 return (1); 711 } 712 if (resp->irq == NULL) { 713 resp->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &resp->irq_rid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 714 if (resp->irq == NULL) 715 return (1); 716 } 717 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/CS461x_BUFFSIZE, /*boundary*/CS461x_BUFFSIZE, 718 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 719 /*highaddr*/BUS_SPACE_MAXADDR, 720 /*filter*/NULL, /*filterarg*/NULL, 721 /*maxsize*/CS461x_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 722 /*flags*/0, &csa->parent_dmat) != 0) 723 return (1); 724 725 return (0); 726 } 727 728 /* Releases resources. */ 729 static void 730 csa_releaseres(struct csa_info *csa, device_t dev) 731 { 732 csa_res *resp; 733 734 resp = &csa->res; 735 if (resp->irq != NULL) { 736 bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, resp->irq); 737 resp->irq = NULL; 738 } 739 if (resp->io != NULL) { 740 bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, resp->io); 741 resp->io = NULL; 742 } 743 if (resp->mem != NULL) { 744 bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, resp->mem); 745 resp->mem = NULL; 746 } 747 } 748 749 static int pcmcsa_probe(device_t dev); 750 static int pcmcsa_attach(device_t dev); 751 752 static int 753 pcmcsa_probe(device_t dev) 754 { 755 char *s; 756 struct sndcard_func *func; 757 758 /* The parent device has already been probed. */ 759 760 func = device_get_ivars(dev); 761 if (func == NULL || func->func != SCF_PCM) 762 return (ENXIO); 763 764 s = "CS461x PCM Audio"; 765 766 device_set_desc(dev, s); 767 return (0); 768 } 769 770 static int 771 pcmcsa_attach(device_t dev) 772 { 773 snddev_info *devinfo; 774 struct csa_info *csa; 775 csa_res *resp; 776 int unit; 777 char status[SND_STATUSLEN]; 778 struct ac97_info *codec; 779 struct sndcard_func *func; 780 781 devinfo = device_get_softc(dev); 782 csa = malloc(sizeof(*csa), M_DEVBUF, M_NOWAIT); 783 if (csa == NULL) 784 return (ENOMEM); 785 bzero(csa, sizeof(*csa)); 786 unit = device_get_unit(dev); 787 func = device_get_ivars(dev); 788 csa->binfo = func->varinfo; 789 /* 790 * Fake the status of DMA so that the initial value of 791 * PCTL and CCTL can be stored into csa->pctl and csa->cctl, 792 * respectively. 793 */ 794 csa->pch.dma = csa->rch.dma = 1; 795 796 /* Allocate the resources. */ 797 resp = &csa->res; 798 resp->io_rid = CS461x_IO_OFFSET; 799 resp->mem_rid = CS461x_MEM_OFFSET; 800 resp->irq_rid = 0; 801 if (csa_allocres(csa, dev)) { 802 csa_releaseres(csa, dev); 803 return (ENXIO); 804 } 805 806 if (csa_init(csa)) { 807 csa_releaseres(csa, dev); 808 return (ENXIO); 809 } 810 codec = ac97_create(dev, csa, csa_rdcd, csa_wrcd); 811 if (codec == NULL) 812 return (ENXIO); 813 mixer_init(devinfo, &ac97_mixer, codec); 814 815 snprintf(status, SND_STATUSLEN, "at irq %ld", rman_get_start(resp->irq)); 816 817 /* Enable interrupt. */ 818 if (bus_setup_intr(dev, resp->irq, INTR_TYPE_TTY, csa_intr, csa, &csa->ih)) { 819 csa_releaseres(csa, dev); 820 return (ENXIO); 821 } 822 csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f); 823 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); 824 825 if (pcm_register(dev, csa, 1, 1)) { 826 csa_releaseres(csa, dev); 827 return (ENXIO); 828 } 829 pcm_addchan(dev, PCMDIR_REC, &csa_chantemplate, csa); 830 pcm_addchan(dev, PCMDIR_PLAY, &csa_chantemplate, csa); 831 pcm_setstatus(dev, status); 832 833 return (0); 834 } 835 836 /* ac97 codec */ 837 838 static u_int32_t 839 csa_rdcd(void *devinfo, int regno) 840 { 841 u_int32_t data; 842 struct csa_info *csa = (struct csa_info *)devinfo; 843 844 if (csa_readcodec(&csa->res, regno + BA0_AC97_RESET, &data)) 845 data = 0; 846 847 return data; 848 } 849 850 static void 851 csa_wrcd(void *devinfo, int regno, u_int32_t data) 852 { 853 struct csa_info *csa = (struct csa_info *)devinfo; 854 855 csa_writecodec(&csa->res, regno + BA0_AC97_RESET, data); 856 } 857 858 static device_method_t pcmcsa_methods[] = { 859 /* Device interface */ 860 DEVMETHOD(device_probe , pcmcsa_probe ), 861 DEVMETHOD(device_attach, pcmcsa_attach), 862 863 { 0, 0 }, 864 }; 865 866 static driver_t pcmcsa_driver = { 867 "pcm", 868 pcmcsa_methods, 869 sizeof(snddev_info), 870 }; 871 872 static devclass_t pcm_devclass; 873 874 DRIVER_MODULE(pcmcsa, csa, pcmcsa_driver, pcm_devclass, 0, 0); 875