1 /*- 2 * Copyright (c) 1999 Seigo Tanimura 3 * All rights reserved. 4 * 5 * Portions of this source are based on cwcealdr.cpp and dhwiface.cpp in 6 * cwcealdr1.zip, the sample sources by Crystal Semiconductor. 7 * Copyright (c) 1996-1998 Crystal Semiconductor Corp. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #include <sys/soundcard.h> 34 #include <dev/sound/pcm/sound.h> 35 #include <dev/sound/pcm/ac97.h> 36 #include <dev/sound/chip.h> 37 #include <dev/sound/pci/csareg.h> 38 #include <dev/sound/pci/csavar.h> 39 40 #include <pci/pcireg.h> 41 #include <pci/pcivar.h> 42 43 /* device private data */ 44 struct csa_info; 45 46 struct csa_chinfo { 47 struct csa_info *parent; 48 pcm_channel *channel; 49 snd_dbuf *buffer; 50 int dir; 51 u_int32_t fmt; 52 }; 53 54 struct csa_info { 55 csa_res res; /* resource */ 56 void *ih; /* Interrupt cookie */ 57 bus_dma_tag_t parent_dmat; /* DMA tag */ 58 59 /* Contents of board's registers */ 60 u_long pfie; 61 u_long pctl; 62 u_long cctl; 63 struct csa_chinfo pch, rch; 64 }; 65 66 /* -------------------------------------------------------------------- */ 67 68 /* prototypes */ 69 static int csa_init(struct csa_info *); 70 static void csa_intr(void *); 71 static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate); 72 static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate); 73 static void csa_startplaydma(struct csa_info *csa); 74 static void csa_startcapturedma(struct csa_info *csa); 75 static void csa_stopplaydma(struct csa_info *csa); 76 static void csa_stopcapturedma(struct csa_info *csa); 77 static void csa_powerupadc(csa_res *resp); 78 static void csa_powerupdac(csa_res *resp); 79 static int csa_startdsp(csa_res *resp); 80 static int csa_allocres(struct csa_info *scp, device_t dev); 81 static void csa_releaseres(struct csa_info *scp, device_t dev); 82 83 /* talk to the codec - called from ac97.c */ 84 static u_int32_t csa_rdcd(void *, int); 85 static void csa_wrcd(void *, int, u_int32_t); 86 87 /* channel interface */ 88 static void *csachan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 89 static int csachan_setdir(void *data, int dir); 90 static int csachan_setformat(void *data, u_int32_t format); 91 static int csachan_setspeed(void *data, u_int32_t speed); 92 static int csachan_setblocksize(void *data, u_int32_t blocksize); 93 static int csachan_trigger(void *data, int go); 94 static int csachan_getptr(void *data); 95 static pcmchan_caps *csachan_getcaps(void *data); 96 97 static pcmchan_caps csa_playcaps = { 98 8000, 48000, 99 AFMT_STEREO | AFMT_U8 | AFMT_S8 | AFMT_S16_LE | AFMT_S16_BE, 100 AFMT_STEREO | AFMT_S16_LE 101 }; 102 103 static pcmchan_caps csa_reccaps = { 104 11025, 48000, 105 AFMT_STEREO | AFMT_S16_LE, 106 AFMT_STEREO | AFMT_S16_LE 107 }; 108 109 static pcm_channel csa_chantemplate = { 110 csachan_init, 111 csachan_setdir, 112 csachan_setformat, 113 csachan_setspeed, 114 csachan_setblocksize, 115 csachan_trigger, 116 csachan_getptr, 117 csachan_getcaps, 118 }; 119 120 /* -------------------------------------------------------------------- */ 121 122 /* channel interface */ 123 static void * 124 csachan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 125 { 126 struct csa_info *csa = devinfo; 127 struct csa_chinfo *ch = (dir == PCMDIR_PLAY)? &csa->pch : &csa->rch; 128 129 ch->parent = csa; 130 ch->channel = c; 131 ch->buffer = b; 132 ch->buffer->bufsize = CS461x_BUFFSIZE; 133 if (chn_allocbuf(ch->buffer, csa->parent_dmat) == -1) return NULL; 134 return ch; 135 } 136 137 static int 138 csachan_setdir(void *data, int dir) 139 { 140 struct csa_chinfo *ch = data; 141 struct csa_info *csa = ch->parent; 142 csa_res *resp; 143 144 resp = &csa->res; 145 146 if (dir == PCMDIR_PLAY) 147 csa_writemem(resp, BA1_PBA, vtophys(ch->buffer->buf)); 148 else 149 csa_writemem(resp, BA1_CBA, vtophys(ch->buffer->buf)); 150 ch->dir = dir; 151 return 0; 152 } 153 154 static int 155 csachan_setformat(void *data, u_int32_t format) 156 { 157 struct csa_chinfo *ch = data; 158 struct csa_info *csa = ch->parent; 159 u_long pdtc; 160 csa_res *resp; 161 162 resp = &csa->res; 163 164 if (ch->dir == PCMDIR_REC) 165 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); 166 else { 167 csa->pfie = csa_readmem(resp, BA1_PFIE) & ~0x0000f03f; 168 if (format & AFMT_U8 || format & AFMT_U16_LE || format & AFMT_U16_BE) 169 csa->pfie |= 0x8000; 170 if (format & AFMT_S16_BE || format & AFMT_U16_BE) 171 csa->pfie |= 0x4000; 172 if (!(format & AFMT_STEREO)) 173 csa->pfie |= 0x2000; 174 if (format & AFMT_U8 || format & AFMT_S8) 175 csa->pfie |= 0x1000; 176 csa_writemem(resp, BA1_PFIE, csa->pfie); 177 pdtc = csa_readmem(resp, BA1_PDTC) & ~0x000003ff; 178 if ((format & AFMT_S16_BE || format & AFMT_U16_BE || format & AFMT_S16_LE || format & AFMT_U16_LE) && (format & AFMT_STEREO)) 179 pdtc |= 0x00f; 180 else if ((format & AFMT_S16_BE || format & AFMT_U16_BE || format & AFMT_S16_LE || format & AFMT_U16_LE) || (format & AFMT_STEREO)) 181 pdtc |= 0x007; 182 else 183 pdtc |= 0x003; 184 csa_writemem(resp, BA1_PDTC, pdtc); 185 } 186 ch->fmt = format; 187 return 0; 188 } 189 190 static int 191 csachan_setspeed(void *data, u_int32_t speed) 192 { 193 struct csa_chinfo *ch = data; 194 struct csa_info *csa = ch->parent; 195 csa_res *resp; 196 197 resp = &csa->res; 198 199 if (ch->dir == PCMDIR_PLAY) 200 csa_setplaysamplerate(resp, speed); 201 else if (ch->dir == PCMDIR_REC) 202 csa_setcapturesamplerate(resp, speed); 203 204 /* rec/play speeds locked together - should indicate in flags */ 205 #if 0 206 if (ch->direction == PCMDIR_PLAY) d->rec[0].speed = speed; 207 else d->play[0].speed = speed; 208 #endif 209 return speed; /* XXX calc real speed */ 210 } 211 212 static void 213 csa_setplaysamplerate(csa_res *resp, u_long ulInRate) 214 { 215 u_long ulTemp1, ulTemp2; 216 u_long ulPhiIncr; 217 u_long ulCorrectionPerGOF, ulCorrectionPerSec; 218 u_long ulOutRate; 219 220 ulOutRate = 48000; 221 222 /* 223 * Compute the values used to drive the actual sample rate conversion. 224 * The following formulas are being computed, using inline assembly 225 * since we need to use 64 bit arithmetic to compute the values: 226 * 227 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out) 228 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) / 229 * GOF_PER_SEC) 230 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr - 231 * GOF_PER_SEC * ulCorrectionPerGOF 232 * 233 * i.e. 234 * 235 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out) 236 * ulCorrectionPerGOF:ulCorrectionPerSec = 237 * dividend:remainder(ulOther / GOF_PER_SEC) 238 */ 239 ulTemp1 = ulInRate << 16; 240 ulPhiIncr = ulTemp1 / ulOutRate; 241 ulTemp1 -= ulPhiIncr * ulOutRate; 242 ulTemp1 <<= 10; 243 ulPhiIncr <<= 10; 244 ulTemp2 = ulTemp1 / ulOutRate; 245 ulPhiIncr += ulTemp2; 246 ulTemp1 -= ulTemp2 * ulOutRate; 247 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC; 248 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC; 249 ulCorrectionPerSec = ulTemp1; 250 251 /* 252 * Fill in the SampleRateConverter control block. 253 */ 254 csa_writemem(resp, BA1_PSRC, ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF)); 255 csa_writemem(resp, BA1_PPI, ulPhiIncr); 256 } 257 258 static void 259 csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate) 260 { 261 u_long ulPhiIncr, ulCoeffIncr, ulTemp1, ulTemp2; 262 u_long ulCorrectionPerGOF, ulCorrectionPerSec, ulInitialDelay; 263 u_long dwFrameGroupLength, dwCnt; 264 u_long ulInRate; 265 266 ulInRate = 48000; 267 268 /* 269 * We can only decimate by up to a factor of 1/9th the hardware rate. 270 * Return an error if an attempt is made to stray outside that limit. 271 */ 272 if((ulOutRate * 9) < ulInRate) 273 return; 274 275 /* 276 * We can not capture at at rate greater than the Input Rate (48000). 277 * Return an error if an attempt is made to stray outside that limit. 278 */ 279 if(ulOutRate > ulInRate) 280 return; 281 282 /* 283 * Compute the values used to drive the actual sample rate conversion. 284 * The following formulas are being computed, using inline assembly 285 * since we need to use 64 bit arithmetic to compute the values: 286 * 287 * ulCoeffIncr = -floor((Fs,out * 2^23) / Fs,in) 288 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out) 289 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) / 290 * GOF_PER_SEC) 291 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr - 292 * GOF_PER_SEC * ulCorrectionPerGOF 293 * ulInitialDelay = ceil((24 * Fs,in) / Fs,out) 294 * 295 * i.e. 296 * 297 * ulCoeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in)) 298 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out) 299 * ulCorrectionPerGOF:ulCorrectionPerSec = 300 * dividend:remainder(ulOther / GOF_PER_SEC) 301 * ulInitialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out) 302 */ 303 ulTemp1 = ulOutRate << 16; 304 ulCoeffIncr = ulTemp1 / ulInRate; 305 ulTemp1 -= ulCoeffIncr * ulInRate; 306 ulTemp1 <<= 7; 307 ulCoeffIncr <<= 7; 308 ulCoeffIncr += ulTemp1 / ulInRate; 309 ulCoeffIncr ^= 0xFFFFFFFF; 310 ulCoeffIncr++; 311 ulTemp1 = ulInRate << 16; 312 ulPhiIncr = ulTemp1 / ulOutRate; 313 ulTemp1 -= ulPhiIncr * ulOutRate; 314 ulTemp1 <<= 10; 315 ulPhiIncr <<= 10; 316 ulTemp2 = ulTemp1 / ulOutRate; 317 ulPhiIncr += ulTemp2; 318 ulTemp1 -= ulTemp2 * ulOutRate; 319 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC; 320 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC; 321 ulCorrectionPerSec = ulTemp1; 322 ulInitialDelay = ((ulInRate * 24) + ulOutRate - 1) / ulOutRate; 323 324 /* 325 * Fill in the VariDecimate control block. 326 */ 327 csa_writemem(resp, BA1_CSRC, 328 ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF)); 329 csa_writemem(resp, BA1_CCI, ulCoeffIncr); 330 csa_writemem(resp, BA1_CD, 331 (((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | 0x80); 332 csa_writemem(resp, BA1_CPI, ulPhiIncr); 333 334 /* 335 * Figure out the frame group length for the write back task. Basically, 336 * this is just the factors of 24000 (2^6*3*5^3) that are not present in 337 * the output sample rate. 338 */ 339 dwFrameGroupLength = 1; 340 for(dwCnt = 2; dwCnt <= 64; dwCnt *= 2) 341 { 342 if(((ulOutRate / dwCnt) * dwCnt) != 343 ulOutRate) 344 { 345 dwFrameGroupLength *= 2; 346 } 347 } 348 if(((ulOutRate / 3) * 3) != 349 ulOutRate) 350 { 351 dwFrameGroupLength *= 3; 352 } 353 for(dwCnt = 5; dwCnt <= 125; dwCnt *= 5) 354 { 355 if(((ulOutRate / dwCnt) * dwCnt) != 356 ulOutRate) 357 { 358 dwFrameGroupLength *= 5; 359 } 360 } 361 362 /* 363 * Fill in the WriteBack control block. 364 */ 365 csa_writemem(resp, BA1_CFG1, dwFrameGroupLength); 366 csa_writemem(resp, BA1_CFG2, (0x00800000 | dwFrameGroupLength)); 367 csa_writemem(resp, BA1_CCST, 0x0000FFFF); 368 csa_writemem(resp, BA1_CSPB, ((65536 * ulOutRate) / 24000)); 369 csa_writemem(resp, (BA1_CSPB + 4), 0x0000FFFF); 370 } 371 372 static int 373 csachan_setblocksize(void *data, u_int32_t blocksize) 374 { 375 #if notdef 376 return blocksize; 377 #else 378 struct csa_chinfo *ch = data; 379 return ch->buffer->bufsize / 2; 380 #endif /* notdef */ 381 } 382 383 static int 384 csachan_trigger(void *data, int go) 385 { 386 struct csa_chinfo *ch = data; 387 struct csa_info *csa = ch->parent; 388 389 if (ch->dir == PCMDIR_PLAY) { 390 if (go == PCMTRIG_START) 391 csa_startplaydma(csa); 392 else 393 csa_stopplaydma(csa); 394 } else { 395 if (go == PCMTRIG_START) 396 csa_startcapturedma(csa); 397 else 398 csa_stopcapturedma(csa); 399 } 400 return 0; 401 } 402 403 static void 404 csa_startplaydma(struct csa_info *csa) 405 { 406 csa_res *resp; 407 u_long ul; 408 409 resp = &csa->res; 410 ul = csa_readmem(resp, BA1_PCTL); 411 ul &= 0x0000ffff; 412 csa_writemem(resp, BA1_PCTL, ul | csa->pctl); 413 csa_writemem(resp, BA1_PVOL, 0x80008000); 414 } 415 416 static void 417 csa_startcapturedma(struct csa_info *csa) 418 { 419 csa_res *resp; 420 u_long ul; 421 422 resp = &csa->res; 423 ul = csa_readmem(resp, BA1_CCTL); 424 ul &= 0xffff0000; 425 csa_writemem(resp, BA1_CCTL, ul | csa->cctl); 426 csa_writemem(resp, BA1_CVOL, 0x80008000); 427 } 428 429 static void 430 csa_stopplaydma(struct csa_info *csa) 431 { 432 csa_res *resp; 433 u_long ul; 434 435 resp = &csa->res; 436 ul = csa_readmem(resp, BA1_PCTL); 437 csa->pctl = ul & 0xffff0000; 438 csa_writemem(resp, BA1_PCTL, ul & 0x0000ffff); 439 csa_writemem(resp, BA1_PVOL, 0xffffffff); 440 } 441 442 static void 443 csa_stopcapturedma(struct csa_info *csa) 444 { 445 csa_res *resp; 446 u_long ul; 447 448 resp = &csa->res; 449 ul = csa_readmem(resp, BA1_CCTL); 450 csa->cctl = ul & 0x0000ffff; 451 csa_writemem(resp, BA1_CCTL, ul & 0xffff0000); 452 csa_writemem(resp, BA1_CVOL, 0xffffffff); 453 } 454 455 static void 456 csa_powerupdac(csa_res *resp) 457 { 458 int i; 459 u_long ul; 460 461 /* 462 * Power on the DACs on the AC97 codec. We turn off the DAC 463 * powerdown bit and write the new value of the power control 464 * register. 465 */ 466 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 467 ul &= 0xfdff; 468 csa_writeio(resp, BA0_AC97_POWERDOWN, ul); 469 470 /* 471 * Now, we wait until we sample a DAC ready state. 472 */ 473 for (i = 0 ; i < 32 ; i++) { 474 /* 475 * First, lets wait a short while to let things settle out a 476 * bit, and to prevent retrying the read too quickly. 477 */ 478 DELAY(125); 479 480 /* 481 * Read the current state of the power control register. 482 */ 483 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 484 485 /* 486 * If the DAC ready state bit is set, then stop waiting. 487 */ 488 if ((ul & 0x2) != 0) 489 break; 490 } 491 /* 492 * The DACs are now calibrated, so we can unmute the DAC output. 493 */ 494 csa_writeio(resp, BA0_AC97_PCM_OUT_VOLUME, 0x0808); 495 } 496 497 static void 498 csa_powerupadc(csa_res *resp) 499 { 500 int i; 501 u_long ul; 502 503 /* 504 * Power on the ADCs on the AC97 codec. We turn off the ADC 505 * powerdown bit and write the new value of the power control 506 * register. 507 */ 508 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 509 ul &= 0xfeff; 510 csa_writeio(resp, BA0_AC97_POWERDOWN, ul); 511 512 /* 513 * Now, we wait until we sample a ADC ready state. 514 */ 515 for (i = 0 ; i < 32 ; i++) { 516 /* 517 * First, lets wait a short while to let things settle out a 518 * bit, and to prevent retrying the read too quickly. 519 */ 520 DELAY(125); 521 522 /* 523 * Read the current state of the power control register. 524 */ 525 ul = csa_readio(resp, BA0_AC97_POWERDOWN); 526 527 /* 528 * If the ADC ready state bit is set, then stop waiting. 529 */ 530 if ((ul & 0x1) != 0) 531 break; 532 } 533 } 534 535 static int 536 csa_startdsp(csa_res *resp) 537 { 538 int i; 539 u_long ul; 540 541 /* 542 * Set the frame timer to reflect the number of cycles per frame. 543 */ 544 csa_writemem(resp, BA1_FRMT, 0xadf); 545 546 /* 547 * Turn on the run, run at frame, and DMA enable bits in the local copy of 548 * the SP control register. 549 */ 550 csa_writemem(resp, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN); 551 552 /* 553 * Wait until the run at frame bit resets itself in the SP control 554 * register. 555 */ 556 ul = 0; 557 for (i = 0 ; i < 25 ; i++) { 558 /* 559 * Wait a little bit, so we don't issue PCI reads too frequently. 560 */ 561 #if notdef 562 DELAY(1000); 563 #else 564 DELAY(125); 565 #endif /* notdef */ 566 /* 567 * Fetch the current value of the SP status register. 568 */ 569 ul = csa_readmem(resp, BA1_SPCR); 570 571 /* 572 * If the run at frame bit has reset, then stop waiting. 573 */ 574 if((ul & SPCR_RUNFR) == 0) 575 break; 576 } 577 /* 578 * If the run at frame bit never reset, then return an error. 579 */ 580 if((ul & SPCR_RUNFR) != 0) 581 return (EAGAIN); 582 583 return (0); 584 } 585 586 static int 587 csachan_getptr(void *data) 588 { 589 struct csa_chinfo *ch = data; 590 struct csa_info *csa = ch->parent; 591 csa_res *resp; 592 int ptr; 593 594 resp = &csa->res; 595 596 if (ch->dir == PCMDIR_PLAY) { 597 ptr = csa_readmem(resp, BA1_PBA) - vtophys(ch->buffer->buf); 598 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0) 599 ptr >>= 1; 600 } else { 601 ptr = csa_readmem(resp, BA1_CBA) - vtophys(ch->buffer->buf); 602 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0) 603 ptr >>= 1; 604 } 605 606 return (ptr); 607 } 608 609 static pcmchan_caps * 610 csachan_getcaps(void *data) 611 { 612 struct csa_chinfo *ch = data; 613 return (ch->dir == PCMDIR_PLAY)? &csa_playcaps : &csa_reccaps; 614 } 615 616 /* The interrupt handler */ 617 static void 618 csa_intr (void *p) 619 { 620 struct csa_info *csa = p; 621 csa_res *resp; 622 u_int hisr; 623 624 resp = &csa->res; 625 626 /* Is this interrupt for us? */ 627 /* XXX The parent device should handle this. */ 628 hisr = csa_readio(resp, BA0_HISR); 629 if ((hisr & ~HISR_INTENA) == 0) { 630 /* Throw an eoi. */ 631 csa_writeio(resp, BA0_HICR, HICR_IEV | HICR_CHGM); 632 return; 633 } 634 635 if ((hisr & HISR_VC0) != 0) 636 chn_intr(csa->pch.channel); 637 if ((hisr & HISR_VC1) != 0) 638 chn_intr(csa->rch.channel); 639 640 /* Throw an eoi. */ 641 csa_writeio(resp, BA0_HICR, HICR_IEV | HICR_CHGM); 642 } 643 644 /* -------------------------------------------------------------------- */ 645 646 /* 647 * Probe and attach the card 648 */ 649 650 static int 651 csa_init(struct csa_info *csa) 652 { 653 csa_res *resp; 654 655 resp = &csa->res; 656 657 csa->pfie = 0; 658 csa_stopplaydma(csa); 659 csa_stopcapturedma(csa); 660 661 /* Crank up the power on the DAC and ADC. */ 662 csa_powerupadc(resp); 663 csa_powerupdac(resp); 664 665 csa_setplaysamplerate(resp, 8000); 666 csa_setcapturesamplerate(resp, 8000); 667 668 if (csa_startdsp(resp)) 669 return (1); 670 671 return 0; 672 } 673 674 /* Allocates resources. */ 675 static int 676 csa_allocres(struct csa_info *csa, device_t dev) 677 { 678 csa_res *resp; 679 680 resp = &csa->res; 681 if (resp->io == NULL) { 682 resp->io = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->io_rid, 0, ~0, CS461x_IO_SIZE, RF_ACTIVE); 683 if (resp->io == NULL) 684 return (1); 685 } 686 if (resp->mem == NULL) { 687 resp->mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->mem_rid, 0, ~0, CS461x_MEM_SIZE, RF_ACTIVE); 688 if (resp->mem == NULL) 689 return (1); 690 } 691 if (resp->irq == NULL) { 692 resp->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &resp->irq_rid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 693 if (resp->irq == NULL) 694 return (1); 695 } 696 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/CS461x_BUFFSIZE, /*boundary*/CS461x_BUFFSIZE, 697 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 698 /*highaddr*/BUS_SPACE_MAXADDR, 699 /*filter*/NULL, /*filterarg*/NULL, 700 /*maxsize*/CS461x_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 701 /*flags*/0, &csa->parent_dmat) != 0) 702 return (1); 703 704 return (0); 705 } 706 707 /* Releases resources. */ 708 static void 709 csa_releaseres(struct csa_info *csa, device_t dev) 710 { 711 csa_res *resp; 712 713 resp = &csa->res; 714 if (resp->irq != NULL) { 715 bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, resp->irq); 716 resp->irq = NULL; 717 } 718 if (resp->io != NULL) { 719 bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, resp->io); 720 resp->io = NULL; 721 } 722 if (resp->mem != NULL) { 723 bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, resp->mem); 724 resp->mem = NULL; 725 } 726 } 727 728 static int pcmcsa_probe(device_t dev); 729 static int pcmcsa_attach(device_t dev); 730 731 static int 732 pcmcsa_probe(device_t dev) 733 { 734 char *s; 735 struct sndcard_func *func; 736 737 /* The parent device has already been probed. */ 738 739 func = device_get_ivars(dev); 740 if (func == NULL || func->func != SCF_PCM) 741 return (ENXIO); 742 743 s = "CS461x PCM Audio"; 744 745 device_set_desc(dev, s); 746 return (0); 747 } 748 749 static int 750 pcmcsa_attach(device_t dev) 751 { 752 snddev_info *devinfo; 753 struct csa_info *csa; 754 csa_res *resp; 755 int unit; 756 char status[SND_STATUSLEN]; 757 struct ac97_info *codec; 758 759 devinfo = device_get_softc(dev); 760 csa = malloc(sizeof(*csa), M_DEVBUF, M_NOWAIT); 761 if (csa == NULL) 762 return (ENOMEM); 763 bzero(csa, sizeof(*csa)); 764 unit = device_get_unit(dev); 765 766 /* Allocate the resources. */ 767 resp = &csa->res; 768 resp->io_rid = CS461x_IO_OFFSET; 769 resp->mem_rid = CS461x_MEM_OFFSET; 770 resp->irq_rid = 0; 771 if (csa_allocres(csa, dev)) { 772 csa_releaseres(csa, dev); 773 return (ENXIO); 774 } 775 776 if (csa_init(csa)) { 777 csa_releaseres(csa, dev); 778 return (ENXIO); 779 } 780 codec = ac97_create(csa, csa_rdcd, csa_wrcd); 781 if (codec == NULL) 782 return (ENXIO); 783 mixer_init(devinfo, &ac97_mixer, codec); 784 785 snprintf(status, SND_STATUSLEN, "at irq %ld", rman_get_start(resp->irq)); 786 787 /* Enable interrupt. */ 788 if (bus_setup_intr(dev, resp->irq, INTR_TYPE_TTY, csa_intr, csa, &csa->ih)) { 789 csa_releaseres(csa, dev); 790 return (ENXIO); 791 } 792 if ((csa_readio(resp, BA0_HISR) & HISR_INTENA) == 0) 793 csa_writeio(resp, BA0_HICR, HICR_IEV | HICR_CHGM); 794 csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f); 795 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); 796 797 if (pcm_register(dev, csa, 1, 1)) { 798 csa_releaseres(csa, dev); 799 return (ENXIO); 800 } 801 pcm_addchan(dev, PCMDIR_REC, &csa_chantemplate, csa); 802 pcm_addchan(dev, PCMDIR_PLAY, &csa_chantemplate, csa); 803 pcm_setstatus(dev, status); 804 805 return (0); 806 } 807 808 /* ac97 codec */ 809 810 static u_int32_t 811 csa_rdcd(void *devinfo, int regno) 812 { 813 u_int32_t data; 814 struct csa_info *csa = (struct csa_info *)devinfo; 815 816 if (csa_readcodec(&csa->res, regno + BA0_AC97_RESET, &data)) 817 data = 0; 818 819 return data; 820 } 821 822 static void 823 csa_wrcd(void *devinfo, int regno, u_int32_t data) 824 { 825 struct csa_info *csa = (struct csa_info *)devinfo; 826 827 csa_writecodec(&csa->res, regno + BA0_AC97_RESET, data); 828 } 829 830 static device_method_t pcmcsa_methods[] = { 831 /* Device interface */ 832 DEVMETHOD(device_probe , pcmcsa_probe ), 833 DEVMETHOD(device_attach, pcmcsa_attach), 834 835 { 0, 0 }, 836 }; 837 838 static driver_t pcmcsa_driver = { 839 "pcm", 840 pcmcsa_methods, 841 sizeof(snddev_info), 842 }; 843 844 static devclass_t pcm_devclass; 845 846 DRIVER_MODULE(pcmcsa, csa, pcmcsa_driver, pcm_devclass, 0, 0); 847