1d5688b6aSAriff Abdullah /*- 2d5688b6aSAriff Abdullah * Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org> 3d5688b6aSAriff Abdullah * All rights reserved. 4d5688b6aSAriff Abdullah * 5d5688b6aSAriff Abdullah * Redistribution and use in source and binary forms, with or without 6d5688b6aSAriff Abdullah * modification, are permitted provided that the following conditions 7d5688b6aSAriff Abdullah * are met: 8d5688b6aSAriff Abdullah * 1. Redistributions of source code must retain the above copyright 9d5688b6aSAriff Abdullah * notice, this list of conditions and the following disclaimer. 10d5688b6aSAriff Abdullah * 2. Redistributions in binary form must reproduce the above copyright 11d5688b6aSAriff Abdullah * notice, this list of conditions and the following disclaimer in the 12d5688b6aSAriff Abdullah * documentation and/or other materials provided with the distribution. 13d5688b6aSAriff Abdullah * 14d5688b6aSAriff Abdullah * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15d5688b6aSAriff Abdullah * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16d5688b6aSAriff Abdullah * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17d5688b6aSAriff Abdullah * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18d5688b6aSAriff Abdullah * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19d5688b6aSAriff Abdullah * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20d5688b6aSAriff Abdullah * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21d5688b6aSAriff Abdullah * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22d5688b6aSAriff Abdullah * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23d5688b6aSAriff Abdullah * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24d5688b6aSAriff Abdullah * SUCH DAMAGE. 25d5688b6aSAriff Abdullah * 26d5688b6aSAriff Abdullah * $FreeBSD$ 27d5688b6aSAriff Abdullah */ 28d5688b6aSAriff Abdullah 29d5688b6aSAriff Abdullah #ifndef _ATIIXP_H_ 30d5688b6aSAriff Abdullah #define _ATIIXP_H_ 31d5688b6aSAriff Abdullah 32d5688b6aSAriff Abdullah /* 33d5688b6aSAriff Abdullah * Constants, pretty much FreeBSD specific. 34d5688b6aSAriff Abdullah */ 35d5688b6aSAriff Abdullah 36d5688b6aSAriff Abdullah /* Number of playback / recording channel */ 37d5688b6aSAriff Abdullah #define ATI_IXP_NPCHAN 1 38d5688b6aSAriff Abdullah #define ATI_IXP_NRCHAN 1 39d5688b6aSAriff Abdullah #define ATI_IXP_NCHANS (ATI_IXP_NPCHAN + ATI_IXP_NRCHAN) 40d5688b6aSAriff Abdullah 41d5688b6aSAriff Abdullah /* 42d5688b6aSAriff Abdullah * Maximum segments/descriptors is 256, but 2 for 43d5688b6aSAriff Abdullah * each channel should be more than enough for us. 44d5688b6aSAriff Abdullah */ 45d5688b6aSAriff Abdullah #define ATI_IXP_DMA_CHSEGS 2 46d5688b6aSAriff Abdullah #define ATI_IXP_DMA_CHSEGS_MIN 2 47d5688b6aSAriff Abdullah #define ATI_IXP_DMA_CHSEGS_MAX 256 48d5688b6aSAriff Abdullah 49d5688b6aSAriff Abdullah #define ATI_VENDOR_ID 0x1002 /* ATI Technologies */ 509f52a325SAriff Abdullah 51d5688b6aSAriff Abdullah #define ATI_IXP_200_ID 0x4341 52d5688b6aSAriff Abdullah #define ATI_IXP_300_ID 0x4361 53d5688b6aSAriff Abdullah #define ATI_IXP_400_ID 0x4370 54d5688b6aSAriff Abdullah 55d5688b6aSAriff Abdullah #define ATI_IXP_BASE_RATE 48000 56d5688b6aSAriff Abdullah 57d5688b6aSAriff Abdullah /* 58d5688b6aSAriff Abdullah * Register definitions for ATI IXP 59d5688b6aSAriff Abdullah * 60d5688b6aSAriff Abdullah * References: ALSA snd-atiixp.c , OpenBSD/NetBSD auixp-*.h 61d5688b6aSAriff Abdullah */ 62d5688b6aSAriff Abdullah 63d5688b6aSAriff Abdullah #define ATI_IXP_CODECS 3 64d5688b6aSAriff Abdullah 65d5688b6aSAriff Abdullah #define ATI_REG_ISR 0x00 /* interrupt source */ 66d5688b6aSAriff Abdullah #define ATI_REG_ISR_IN_XRUN (1U<<0) 67d5688b6aSAriff Abdullah #define ATI_REG_ISR_IN_STATUS (1U<<1) 68d5688b6aSAriff Abdullah #define ATI_REG_ISR_OUT_XRUN (1U<<2) 69d5688b6aSAriff Abdullah #define ATI_REG_ISR_OUT_STATUS (1U<<3) 70d5688b6aSAriff Abdullah #define ATI_REG_ISR_SPDF_XRUN (1U<<4) 71d5688b6aSAriff Abdullah #define ATI_REG_ISR_SPDF_STATUS (1U<<5) 72d5688b6aSAriff Abdullah #define ATI_REG_ISR_PHYS_INTR (1U<<8) 73d5688b6aSAriff Abdullah #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) 74d5688b6aSAriff Abdullah #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) 75d5688b6aSAriff Abdullah #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) 76d5688b6aSAriff Abdullah #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) 77d5688b6aSAriff Abdullah #define ATI_REG_ISR_NEW_FRAME (1U<<13) 78d5688b6aSAriff Abdullah 79d5688b6aSAriff Abdullah #define ATI_REG_IER 0x04 /* interrupt enable */ 80d5688b6aSAriff Abdullah #define ATI_REG_IER_IN_XRUN_EN (1U<<0) 81d5688b6aSAriff Abdullah #define ATI_REG_IER_IO_STATUS_EN (1U<<1) 82d5688b6aSAriff Abdullah #define ATI_REG_IER_OUT_XRUN_EN (1U<<2) 83d5688b6aSAriff Abdullah #define ATI_REG_IER_OUT_XRUN_COND (1U<<3) 84d5688b6aSAriff Abdullah #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4) 85d5688b6aSAriff Abdullah #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5) 86d5688b6aSAriff Abdullah #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) 87d5688b6aSAriff Abdullah #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) 88d5688b6aSAriff Abdullah #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) 89d5688b6aSAriff Abdullah #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) 90d5688b6aSAriff Abdullah #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) 91d5688b6aSAriff Abdullah #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO) */ 92d5688b6aSAriff Abdullah #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */ 93d5688b6aSAriff Abdullah 94d5688b6aSAriff Abdullah #define ATI_REG_CMD 0x08 /* command */ 95d5688b6aSAriff Abdullah #define ATI_REG_CMD_POWERDOWN (1U<<0) 96d5688b6aSAriff Abdullah #define ATI_REG_CMD_RECEIVE_EN (1U<<1) 97d5688b6aSAriff Abdullah #define ATI_REG_CMD_SEND_EN (1U<<2) 98d5688b6aSAriff Abdullah #define ATI_REG_CMD_STATUS_MEM (1U<<3) 99d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4) 100d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5) 101d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6) 102d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 103d5688b6aSAriff Abdullah #define ATI_REG_CMD_IN_DMA_EN (1U<<8) 104d5688b6aSAriff Abdullah #define ATI_REG_CMD_OUT_DMA_EN (1U<<9) 105d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10) 106d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11) 107d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12) 108d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12) 109d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12) 110d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12) 111d5688b6aSAriff Abdullah #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12) 112d5688b6aSAriff Abdullah #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16) 113d5688b6aSAriff Abdullah #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) 114d5688b6aSAriff Abdullah #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21) 115d5688b6aSAriff Abdullah #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22) 116d5688b6aSAriff Abdullah #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) 117d5688b6aSAriff Abdullah #define ATI_REG_CMD_PACKED_DIS (1U<<24) 118d5688b6aSAriff Abdullah #define ATI_REG_CMD_BURST_EN (1U<<25) 119d5688b6aSAriff Abdullah #define ATI_REG_CMD_PANIC_EN (1U<<26) 120d5688b6aSAriff Abdullah #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) 121d5688b6aSAriff Abdullah #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) 122d5688b6aSAriff Abdullah #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) 123d5688b6aSAriff Abdullah #define ATI_REG_CMD_AC_SYNC (1U<<30) 124d5688b6aSAriff Abdullah #define ATI_REG_CMD_AC_RESET (1U<<31) 125d5688b6aSAriff Abdullah 126d5688b6aSAriff Abdullah #define ATI_REG_PHYS_OUT_ADDR 0x0c 127d5688b6aSAriff Abdullah #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) 128d5688b6aSAriff Abdullah #define ATI_REG_PHYS_OUT_RW (1U<<2) 129d5688b6aSAriff Abdullah #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) 130d5688b6aSAriff Abdullah #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 131d5688b6aSAriff Abdullah #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 132d5688b6aSAriff Abdullah 133d5688b6aSAriff Abdullah #define ATI_REG_PHYS_IN_ADDR 0x10 134d5688b6aSAriff Abdullah #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) 135d5688b6aSAriff Abdullah #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 136d5688b6aSAriff Abdullah #define ATI_REG_PHYS_IN_DATA_SHIFT 16 137d5688b6aSAriff Abdullah 138d5688b6aSAriff Abdullah #define ATI_REG_SLOTREQ 0x14 139d5688b6aSAriff Abdullah 140d5688b6aSAriff Abdullah #define ATI_REG_COUNTER 0x18 141d5688b6aSAriff Abdullah #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ 142d5688b6aSAriff Abdullah #define ATI_REG_COUNTER_BITCLOCK (31U<<8) 143d5688b6aSAriff Abdullah 144d5688b6aSAriff Abdullah #define ATI_REG_IN_FIFO_THRESHOLD 0x1c 145d5688b6aSAriff Abdullah 146d5688b6aSAriff Abdullah #define ATI_REG_IN_DMA_LINKPTR 0x20 147d5688b6aSAriff Abdullah #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ 148d5688b6aSAriff Abdullah #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ 149d5688b6aSAriff Abdullah #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ 150d5688b6aSAriff Abdullah #define ATI_REG_IN_DMA_DT_SIZE 0x30 151d5688b6aSAriff Abdullah 152d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_SLOT 0x34 153d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) 154d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff 155d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 156d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 157d5688b6aSAriff Abdullah 158d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_LINKPTR 0x38 159d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ 160d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ 161d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ 162d5688b6aSAriff Abdullah #define ATI_REG_OUT_DMA_DT_SIZE 0x48 163d5688b6aSAriff Abdullah 164d5688b6aSAriff Abdullah #define ATI_REG_SPDF_CMD 0x4c 165d5688b6aSAriff Abdullah #define ATI_REG_SPDF_CMD_LFSR (1U<<4) 166d5688b6aSAriff Abdullah #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5) 167d5688b6aSAriff Abdullah #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */ 168d5688b6aSAriff Abdullah 169d5688b6aSAriff Abdullah #define ATI_REG_SPDF_DMA_LINKPTR 0x50 170d5688b6aSAriff Abdullah #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ 171d5688b6aSAriff Abdullah #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ 172d5688b6aSAriff Abdullah #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ 173d5688b6aSAriff Abdullah #define ATI_REG_SPDF_DMA_DT_SIZE 0x60 174d5688b6aSAriff Abdullah 175d5688b6aSAriff Abdullah #define ATI_REG_MODEM_MIRROR 0x7c 176d5688b6aSAriff Abdullah #define ATI_REG_AUDIO_MIRROR 0x80 177d5688b6aSAriff Abdullah 178d5688b6aSAriff Abdullah #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ 179d5688b6aSAriff Abdullah #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ 180d5688b6aSAriff Abdullah 181d5688b6aSAriff Abdullah #define ATI_REG_FIFO_FLUSH 0x88 182d5688b6aSAriff Abdullah #define ATI_REG_FIFO_OUT_FLUSH (1U<<0) 183d5688b6aSAriff Abdullah #define ATI_REG_FIFO_IN_FLUSH (1U<<1) 184d5688b6aSAriff Abdullah 185d5688b6aSAriff Abdullah /* LINKPTR */ 186d5688b6aSAriff Abdullah #define ATI_REG_LINKPTR_EN (1U<<0) 187d5688b6aSAriff Abdullah 188d5688b6aSAriff Abdullah /* [INT|OUT|SPDIF]_DMA_DT_SIZE */ 189d5688b6aSAriff Abdullah #define ATI_REG_DMA_DT_SIZE (0xffffU<<0) 190d5688b6aSAriff Abdullah #define ATI_REG_DMA_FIFO_USED (0x1fU<<16) 191d5688b6aSAriff Abdullah #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21) 192d5688b6aSAriff Abdullah #define ATI_REG_DMA_STATE (7U<<26) 193d5688b6aSAriff Abdullah 194d5688b6aSAriff Abdullah #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ 195d5688b6aSAriff Abdullah 196d5688b6aSAriff Abdullah /* codec detection constant indicating the interrupt flags */ 197d5688b6aSAriff Abdullah #define ALL_CODECS_NOT_READY \ 198d5688b6aSAriff Abdullah (ATI_REG_ISR_CODEC0_NOT_READY | ATI_REG_ISR_CODEC1_NOT_READY |\ 199d5688b6aSAriff Abdullah ATI_REG_ISR_CODEC2_NOT_READY) 200d5688b6aSAriff Abdullah #define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME) 201d5688b6aSAriff Abdullah 202d5688b6aSAriff Abdullah #endif 203