1 /*- 2 * Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * FreeBSD pcm driver for ATI IXP 150/200/250/300 AC97 controllers 29 * 30 * Features 31 * * 16bit playback / recording 32 * * 32bit native playback - yay! 33 * * 32bit native recording (seems broken on few hardwares) 34 * 35 * Issues / TODO: 36 * * SPDIF 37 * * Support for more than 2 channels. 38 * * VRA ? VRM ? DRA ? 39 * * 32bit native recording seems broken on few hardwares, most 40 * probably because of incomplete VRA/DRA cleanup. 41 * 42 * 43 * Thanks goes to: 44 * 45 * Shaharil @ SCAN Associates whom relentlessly providing me the 46 * mind blowing Acer Ferrari 4002 WLMi with this ATI IXP hardware. 47 * 48 * Reinoud Zandijk <reinoud@NetBSD.org> (auixp), which this driver is 49 * largely based upon although large part of it has been reworked. His 50 * driver is the primary reference and pretty much well documented. 51 * 52 * Takashi Iwai (ALSA snd-atiixp), for register definitions and some 53 * random ninja hackery. 54 */ 55 56 #include <dev/sound/pcm/sound.h> 57 #include <dev/sound/pcm/ac97.h> 58 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcivar.h> 61 #include <sys/sysctl.h> 62 #include <sys/endian.h> 63 64 #include <dev/sound/pci/atiixp.h> 65 66 SND_DECLARE_FILE("$FreeBSD$"); 67 68 #define ATI_IXP_DMA_RETRY_MAX 100 69 #define ATI_IXP_DMA_CHSEGS_DEFAULT 2 70 71 #define ATI_IXP_BUFSZ_MIN 4096 72 #define ATI_IXP_BUFSZ_MAX 65536 73 #define ATI_IXP_BUFSZ_DEFAULT 16384 74 75 #ifdef ATI_IXP_DEBUG_VERBOSE 76 #undef ATI_IXP_DEBUG 77 #define ATI_IXP_DEBUG 1 78 #endif 79 80 struct atiixp_dma_op { 81 volatile uint32_t addr; 82 volatile uint16_t status; 83 volatile uint16_t size; 84 volatile uint32_t next; 85 }; 86 87 struct atiixp_info; 88 89 struct atiixp_chinfo { 90 struct snd_dbuf *buffer; 91 struct pcm_channel *channel; 92 struct atiixp_info *parent; 93 struct atiixp_dma_op *sgd_table; 94 bus_addr_t sgd_addr; 95 uint32_t enable_bit, flush_bit, linkptr_bit, dma_dt_cur_bit; 96 uint32_t dma_segs, dma_blksz; 97 #ifdef ATI_IXP_DEBUG 98 uint32_t dma_ptr, dma_prevptr; 99 #endif 100 uint32_t fmt; 101 int caps_32bit, dir, active; 102 }; 103 104 struct atiixp_info { 105 device_t dev; 106 107 bus_space_tag_t st; 108 bus_space_handle_t sh; 109 bus_dma_tag_t parent_dmat; 110 bus_dma_tag_t sgd_dmat; 111 bus_dmamap_t sgd_dmamap; 112 bus_addr_t sgd_addr; 113 114 struct resource *reg, *irq; 115 int regtype, regid, irqid; 116 void *ih; 117 struct ac97_info *codec; 118 119 struct atiixp_chinfo pch; 120 struct atiixp_chinfo rch; 121 struct atiixp_dma_op *sgd_table; 122 struct intr_config_hook delayed_attach; 123 124 uint32_t bufsz; 125 uint32_t codec_not_ready_bits, codec_idx, codec_found; 126 uint32_t dma_segs; 127 int registered_channels; 128 129 struct mtx *lock; 130 }; 131 132 #define atiixp_rd(_sc, _reg) \ 133 bus_space_read_4((_sc)->st, (_sc)->sh, _reg) 134 #define atiixp_wr(_sc, _reg, _val) \ 135 bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val) 136 137 #define atiixp_lock(_sc) snd_mtxlock((_sc)->lock) 138 #define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock) 139 #define atiixp_assert(_sc) snd_mtxassert((_sc)->lock) 140 141 static uint32_t atiixp_fmt_32bit[] = { 142 AFMT_STEREO | AFMT_S16_LE, 143 AFMT_STEREO | AFMT_S32_LE, 144 0 145 }; 146 147 static uint32_t atiixp_fmt[] = { 148 AFMT_STEREO | AFMT_S16_LE, 149 0 150 }; 151 152 static struct pcmchan_caps atiixp_caps_32bit = { 153 ATI_IXP_BASE_RATE, 154 ATI_IXP_BASE_RATE, 155 atiixp_fmt_32bit, 0 156 }; 157 158 static struct pcmchan_caps atiixp_caps = { 159 ATI_IXP_BASE_RATE, 160 ATI_IXP_BASE_RATE, 161 atiixp_fmt, 0 162 }; 163 164 static const struct { 165 uint16_t vendor; 166 uint16_t devid; 167 char *desc; 168 } atiixp_hw[] = { 169 { ATI_VENDOR_ID, ATI_IXP_200_ID, "ATI IXP 200" }, 170 { ATI_VENDOR_ID, ATI_IXP_300_ID, "ATI IXP 300" }, 171 { ATI_VENDOR_ID, ATI_IXP_400_ID, "ATI IXP 400" }, 172 }; 173 174 static void atiixp_enable_interrupts(struct atiixp_info *); 175 static void atiixp_disable_interrupts(struct atiixp_info *); 176 static void atiixp_reset_aclink(struct atiixp_info *); 177 static void atiixp_flush_dma(struct atiixp_chinfo *); 178 static void atiixp_enable_dma(struct atiixp_chinfo *); 179 static void atiixp_disable_dma(struct atiixp_chinfo *); 180 181 static int atiixp_waitready_codec(struct atiixp_info *); 182 static int atiixp_rdcd(kobj_t, void *, int); 183 static int atiixp_wrcd(kobj_t, void *, int, uint32_t); 184 185 static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *, 186 struct pcm_channel *, int); 187 static int atiixp_chan_setformat(kobj_t, void *, uint32_t); 188 static int atiixp_chan_setspeed(kobj_t, void *, uint32_t); 189 static int atiixp_chan_setblocksize(kobj_t, void *, uint32_t); 190 static void atiixp_buildsgdt(struct atiixp_chinfo *); 191 static int atiixp_chan_trigger(kobj_t, void *, int); 192 static __inline uint32_t atiixp_dmapos(struct atiixp_chinfo *); 193 static int atiixp_chan_getptr(kobj_t, void *); 194 static struct pcmchan_caps *atiixp_chan_getcaps(kobj_t, void *); 195 196 static void atiixp_intr(void *); 197 static void atiixp_dma_cb(void *, bus_dma_segment_t *, int, int); 198 static void atiixp_chip_pre_init(struct atiixp_info *); 199 static void atiixp_chip_post_init(void *); 200 static void atiixp_release_resource(struct atiixp_info *); 201 static int atiixp_pci_probe(device_t); 202 static int atiixp_pci_attach(device_t); 203 static int atiixp_pci_detach(device_t); 204 static int atiixp_pci_suspend(device_t); 205 static int atiixp_pci_resume(device_t); 206 207 /* 208 * ATI IXP helper functions 209 */ 210 static void 211 atiixp_enable_interrupts(struct atiixp_info *sc) 212 { 213 uint32_t value; 214 215 /* clear all pending */ 216 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); 217 218 /* enable all relevant interrupt sources we can handle */ 219 value = atiixp_rd(sc, ATI_REG_IER); 220 221 value |= ATI_REG_IER_IO_STATUS_EN; 222 223 /* 224 * Disable / ignore internal xrun/spdf interrupt flags 225 * since it doesn't interest us (for now). 226 */ 227 #if 1 228 value &= ~(ATI_REG_IER_IN_XRUN_EN | ATI_REG_IER_OUT_XRUN_EN | 229 ATI_REG_IER_SPDF_XRUN_EN | ATI_REG_IER_SPDF_STATUS_EN); 230 #else 231 value |= ATI_REG_IER_IN_XRUN_EN; 232 value |= ATI_REG_IER_OUT_XRUN_EN; 233 234 value |= ATI_REG_IER_SPDF_XRUN_EN; 235 value |= ATI_REG_IER_SPDF_STATUS_EN; 236 #endif 237 238 atiixp_wr(sc, ATI_REG_IER, value); 239 } 240 241 static void 242 atiixp_disable_interrupts(struct atiixp_info *sc) 243 { 244 /* disable all interrupt sources */ 245 atiixp_wr(sc, ATI_REG_IER, 0); 246 247 /* clear all pending */ 248 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); 249 } 250 251 static void 252 atiixp_reset_aclink(struct atiixp_info *sc) 253 { 254 uint32_t value, timeout; 255 256 /* if power is down, power it up */ 257 value = atiixp_rd(sc, ATI_REG_CMD); 258 if (value & ATI_REG_CMD_POWERDOWN) { 259 /* explicitly enable power */ 260 value &= ~ATI_REG_CMD_POWERDOWN; 261 atiixp_wr(sc, ATI_REG_CMD, value); 262 263 /* have to wait at least 10 usec for it to initialise */ 264 DELAY(20); 265 } 266 267 /* perform a soft reset */ 268 value = atiixp_rd(sc, ATI_REG_CMD); 269 value |= ATI_REG_CMD_AC_SOFT_RESET; 270 atiixp_wr(sc, ATI_REG_CMD, value); 271 272 /* need to read the CMD reg and wait aprox. 10 usec to init */ 273 value = atiixp_rd(sc, ATI_REG_CMD); 274 DELAY(20); 275 276 /* clear soft reset flag again */ 277 value = atiixp_rd(sc, ATI_REG_CMD); 278 value &= ~ATI_REG_CMD_AC_SOFT_RESET; 279 atiixp_wr(sc, ATI_REG_CMD, value); 280 281 /* check if the ac-link is working; reset device otherwise */ 282 timeout = 10; 283 value = atiixp_rd(sc, ATI_REG_CMD); 284 while (!(value & ATI_REG_CMD_ACLINK_ACTIVE) 285 && --timeout) { 286 #if 0 287 device_printf(sc->dev, "not up; resetting aclink hardware\n"); 288 #endif 289 290 /* dip aclink reset but keep the acsync */ 291 value &= ~ATI_REG_CMD_AC_RESET; 292 value |= ATI_REG_CMD_AC_SYNC; 293 atiixp_wr(sc, ATI_REG_CMD, value); 294 295 /* need to read CMD again and wait again (clocking in issue?) */ 296 value = atiixp_rd(sc, ATI_REG_CMD); 297 DELAY(20); 298 299 /* assert aclink reset again */ 300 value = atiixp_rd(sc, ATI_REG_CMD); 301 value |= ATI_REG_CMD_AC_RESET; 302 atiixp_wr(sc, ATI_REG_CMD, value); 303 304 /* check if its active now */ 305 value = atiixp_rd(sc, ATI_REG_CMD); 306 } 307 308 if (timeout == 0) 309 device_printf(sc->dev, "giving up aclink reset\n"); 310 #if 0 311 if (timeout != 10) 312 device_printf(sc->dev, "aclink hardware reset successful\n"); 313 #endif 314 315 /* assert reset and sync for safety */ 316 value = atiixp_rd(sc, ATI_REG_CMD); 317 value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET; 318 atiixp_wr(sc, ATI_REG_CMD, value); 319 } 320 321 static void 322 atiixp_flush_dma(struct atiixp_chinfo *ch) 323 { 324 atiixp_wr(ch->parent, ATI_REG_FIFO_FLUSH, ch->flush_bit); 325 } 326 327 static void 328 atiixp_enable_dma(struct atiixp_chinfo *ch) 329 { 330 uint32_t value; 331 332 value = atiixp_rd(ch->parent, ATI_REG_CMD); 333 if (!(value & ch->enable_bit)) { 334 value |= ch->enable_bit; 335 atiixp_wr(ch->parent, ATI_REG_CMD, value); 336 } 337 } 338 339 static void 340 atiixp_disable_dma(struct atiixp_chinfo *ch) 341 { 342 uint32_t value; 343 344 value = atiixp_rd(ch->parent, ATI_REG_CMD); 345 if (value & ch->enable_bit) { 346 value &= ~ch->enable_bit; 347 atiixp_wr(ch->parent, ATI_REG_CMD, value); 348 } 349 } 350 351 /* 352 * AC97 interface 353 */ 354 static int 355 atiixp_waitready_codec(struct atiixp_info *sc) 356 { 357 int timeout = 500; 358 359 do { 360 if ((atiixp_rd(sc, ATI_REG_PHYS_OUT_ADDR) & 361 ATI_REG_PHYS_OUT_ADDR_EN) == 0) 362 return (0); 363 DELAY(1); 364 } while (--timeout); 365 366 return (-1); 367 } 368 369 static int 370 atiixp_rdcd(kobj_t obj, void *devinfo, int reg) 371 { 372 struct atiixp_info *sc = devinfo; 373 uint32_t data; 374 int timeout; 375 376 if (atiixp_waitready_codec(sc)) 377 return (-1); 378 379 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 380 ATI_REG_PHYS_OUT_ADDR_EN | 381 ATI_REG_PHYS_OUT_RW | sc->codec_idx; 382 383 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); 384 385 if (atiixp_waitready_codec(sc)) 386 return (-1); 387 388 timeout = 500; 389 do { 390 data = atiixp_rd(sc, ATI_REG_PHYS_IN_ADDR); 391 if (data & ATI_REG_PHYS_IN_READ_FLAG) 392 return (data >> ATI_REG_PHYS_IN_DATA_SHIFT); 393 DELAY(1); 394 } while (--timeout); 395 396 if (reg < 0x7c) 397 device_printf(sc->dev, "codec read timeout! (reg 0x%x)\n", reg); 398 399 return (-1); 400 } 401 402 static int 403 atiixp_wrcd(kobj_t obj, void *devinfo, int reg, uint32_t data) 404 { 405 struct atiixp_info *sc = devinfo; 406 407 if (atiixp_waitready_codec(sc)) 408 return (-1); 409 410 data = (data << ATI_REG_PHYS_OUT_DATA_SHIFT) | 411 (((uint32_t)reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 412 ATI_REG_PHYS_OUT_ADDR_EN | sc->codec_idx; 413 414 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); 415 416 return (0); 417 } 418 419 static kobj_method_t atiixp_ac97_methods[] = { 420 KOBJMETHOD(ac97_read, atiixp_rdcd), 421 KOBJMETHOD(ac97_write, atiixp_wrcd), 422 { 0, 0 } 423 }; 424 AC97_DECLARE(atiixp_ac97); 425 426 /* 427 * Playback / Record channel interface 428 */ 429 static void * 430 atiixp_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 431 struct pcm_channel *c, int dir) 432 { 433 struct atiixp_info *sc = devinfo; 434 struct atiixp_chinfo *ch; 435 int num; 436 437 atiixp_lock(sc); 438 439 if (dir == PCMDIR_PLAY) { 440 ch = &sc->pch; 441 ch->linkptr_bit = ATI_REG_OUT_DMA_LINKPTR; 442 ch->enable_bit = ATI_REG_CMD_OUT_DMA_EN | ATI_REG_CMD_SEND_EN; 443 ch->flush_bit = ATI_REG_FIFO_OUT_FLUSH; 444 ch->dma_dt_cur_bit = ATI_REG_OUT_DMA_DT_CUR; 445 /* Native 32bit playback working properly */ 446 ch->caps_32bit = 1; 447 } else { 448 ch = &sc->rch; 449 ch->linkptr_bit = ATI_REG_IN_DMA_LINKPTR; 450 ch->enable_bit = ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_RECEIVE_EN; 451 ch->flush_bit = ATI_REG_FIFO_IN_FLUSH; 452 ch->dma_dt_cur_bit = ATI_REG_IN_DMA_DT_CUR; 453 /* XXX Native 32bit recording appear to be broken */ 454 ch->caps_32bit = 1; 455 } 456 457 ch->buffer = b; 458 ch->parent = sc; 459 ch->channel = c; 460 ch->dir = dir; 461 ch->dma_segs = sc->dma_segs; 462 ch->dma_blksz = sc->bufsz / sc->dma_segs; 463 464 atiixp_unlock(sc); 465 466 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) == -1) 467 return (NULL); 468 469 atiixp_lock(sc); 470 num = sc->registered_channels++; 471 ch->sgd_table = &sc->sgd_table[num * ch->dma_segs]; 472 ch->sgd_addr = sc->sgd_addr + 473 (num * ch->dma_segs * sizeof(struct atiixp_dma_op)); 474 atiixp_disable_dma(ch); 475 atiixp_unlock(sc); 476 477 return (ch); 478 } 479 480 static int 481 atiixp_chan_setformat(kobj_t obj, void *data, uint32_t format) 482 { 483 struct atiixp_chinfo *ch = data; 484 struct atiixp_info *sc = ch->parent; 485 uint32_t value; 486 487 atiixp_lock(sc); 488 if (ch->dir == PCMDIR_REC) { 489 value = atiixp_rd(sc, ATI_REG_CMD); 490 value &= ~ATI_REG_CMD_INTERLEAVE_IN; 491 if ((format & AFMT_32BIT) == 0) 492 value |= ATI_REG_CMD_INTERLEAVE_IN; 493 atiixp_wr(sc, ATI_REG_CMD, value); 494 } else { 495 value = atiixp_rd(sc, ATI_REG_OUT_DMA_SLOT); 496 value &= ~ATI_REG_OUT_DMA_SLOT_MASK; 497 /* We do not have support for more than 2 channels, _yet_. */ 498 value |= ATI_REG_OUT_DMA_SLOT_BIT(3) | 499 ATI_REG_OUT_DMA_SLOT_BIT(4); 500 value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 501 atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value); 502 value = atiixp_rd(sc, ATI_REG_CMD); 503 value &= ~ATI_REG_CMD_INTERLEAVE_OUT; 504 if ((format & AFMT_32BIT) == 0) 505 value |= ATI_REG_CMD_INTERLEAVE_OUT; 506 atiixp_wr(sc, ATI_REG_CMD, value); 507 value = atiixp_rd(sc, ATI_REG_6CH_REORDER); 508 value &= ~ATI_REG_6CH_REORDER_EN; 509 atiixp_wr(sc, ATI_REG_6CH_REORDER, value); 510 } 511 ch->fmt = format; 512 atiixp_unlock(sc); 513 514 return (0); 515 } 516 517 static int 518 atiixp_chan_setspeed(kobj_t obj, void *data, uint32_t spd) 519 { 520 /* XXX We're supposed to do VRA/DRA processing right here */ 521 return (ATI_IXP_BASE_RATE); 522 } 523 524 static int 525 atiixp_chan_setblocksize(kobj_t obj, void *data, uint32_t blksz) 526 { 527 struct atiixp_chinfo *ch = data; 528 struct atiixp_info *sc = ch->parent; 529 530 /* XXX Force static blocksize */ 531 sndbuf_resize(ch->buffer, ch->dma_segs, ch->dma_blksz); 532 533 if (ch->dma_blksz != sndbuf_getblksz(ch->buffer)) { 534 device_printf(sc->dev, 535 "%s: WARNING - dma_blksz=%u != blksz=%u !!!\n", 536 __func__, ch->dma_blksz, sndbuf_getblksz(ch->buffer)); 537 ch->dma_blksz = sndbuf_getblksz(ch->buffer); 538 } 539 540 return (ch->dma_blksz); 541 } 542 543 static void 544 atiixp_buildsgdt(struct atiixp_chinfo *ch) 545 { 546 uint32_t addr; 547 int i; 548 549 addr = sndbuf_getbufaddr(ch->buffer); 550 551 for (i = 0; i < ch->dma_segs; i++) { 552 ch->sgd_table[i].addr = htole32(addr + (i * ch->dma_blksz)); 553 ch->sgd_table[i].status = htole16(0); 554 ch->sgd_table[i].size = htole16(ch->dma_blksz >> 2); 555 ch->sgd_table[i].next = htole32((uint32_t)ch->sgd_addr + 556 (((i + 1) % ch->dma_segs) * 557 sizeof(struct atiixp_dma_op))); 558 } 559 560 #ifdef ATI_IXP_DEBUG 561 ch->dma_ptr = 0; 562 ch->dma_prevptr = 0; 563 #endif 564 } 565 566 static int 567 atiixp_chan_trigger(kobj_t obj, void *data, int go) 568 { 569 struct atiixp_chinfo *ch = data; 570 struct atiixp_info *sc = ch->parent; 571 uint32_t value; 572 573 atiixp_lock(sc); 574 575 switch (go) { 576 case PCMTRIG_START: 577 atiixp_flush_dma(ch); 578 atiixp_buildsgdt(ch); 579 atiixp_wr(sc, ch->linkptr_bit, 0); 580 atiixp_enable_dma(ch); 581 atiixp_wr(sc, ch->linkptr_bit, 582 (uint32_t)ch->sgd_addr | ATI_REG_LINKPTR_EN); 583 break; 584 case PCMTRIG_STOP: 585 case PCMTRIG_ABORT: 586 atiixp_disable_dma(ch); 587 atiixp_flush_dma(ch); 588 break; 589 default: 590 atiixp_unlock(sc); 591 return (0); 592 break; 593 } 594 595 /* Update bus busy status */ 596 value = atiixp_rd(sc, ATI_REG_IER); 597 if (atiixp_rd(sc, ATI_REG_CMD) & ( 598 ATI_REG_CMD_SEND_EN | ATI_REG_CMD_RECEIVE_EN | 599 ATI_REG_CMD_SPDF_OUT_EN)) 600 value |= ATI_REG_IER_SET_BUS_BUSY; 601 else 602 value &= ~ATI_REG_IER_SET_BUS_BUSY; 603 atiixp_wr(sc, ATI_REG_IER, value); 604 605 atiixp_unlock(sc); 606 607 return (0); 608 } 609 610 static __inline uint32_t 611 atiixp_dmapos(struct atiixp_chinfo *ch) 612 { 613 struct atiixp_info *sc = ch->parent; 614 uint32_t reg, addr, sz, retry; 615 volatile uint32_t ptr; 616 617 reg = ch->dma_dt_cur_bit; 618 addr = sndbuf_getbufaddr(ch->buffer); 619 sz = ch->dma_segs * ch->dma_blksz; 620 retry = ATI_IXP_DMA_RETRY_MAX; 621 622 do { 623 ptr = atiixp_rd(sc, reg); 624 if (ptr < addr) 625 continue; 626 ptr -= addr; 627 if (ptr < sz) { 628 #ifdef ATI_IXP_DEBUG 629 if ((ptr & ~(ch->dma_blksz - 1)) != ch->dma_ptr) { 630 uint32_t delta; 631 632 delta = (sz + ptr - ch->dma_prevptr) % sz; 633 #ifndef ATI_IXP_DEBUG_VERBOSE 634 if (delta < ch->dma_blksz) 635 #endif 636 device_printf(sc->dev, 637 "PCMDIR_%s: incoherent DMA " 638 "dma_prevptr=%u ptr=%u " 639 "dma_ptr=%u dma_segs=%u " 640 "[delta=%u != dma_blksz=%u] " 641 "(%s)\n", 642 (ch->dir == PCMDIR_PLAY) ? 643 "PLAY" : "REC", 644 ch->dma_prevptr, ptr, 645 ch->dma_ptr, ch->dma_segs, 646 delta, ch->dma_blksz, 647 (delta < ch->dma_blksz) ? 648 "OVERLAPPED!" : "Ok"); 649 ch->dma_ptr = ptr & ~(ch->dma_blksz - 1); 650 } 651 ch->dma_prevptr = ptr; 652 #endif 653 return (ptr); 654 } 655 } while (--retry); 656 657 device_printf(sc->dev, "PCMDIR_%s: invalid DMA pointer ptr=%u\n", 658 (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ptr); 659 660 return (0); 661 } 662 663 static int 664 atiixp_chan_getptr(kobj_t obj, void *data) 665 { 666 struct atiixp_chinfo *ch = data; 667 struct atiixp_info *sc = ch->parent; 668 uint32_t ptr; 669 670 atiixp_lock(sc); 671 ptr = atiixp_dmapos(ch); 672 atiixp_unlock(sc); 673 674 return (ptr); 675 } 676 677 static struct pcmchan_caps * 678 atiixp_chan_getcaps(kobj_t obj, void *data) 679 { 680 struct atiixp_chinfo *ch = data; 681 682 if (ch->caps_32bit) 683 return (&atiixp_caps_32bit); 684 return (&atiixp_caps); 685 } 686 687 static kobj_method_t atiixp_chan_methods[] = { 688 KOBJMETHOD(channel_init, atiixp_chan_init), 689 KOBJMETHOD(channel_setformat, atiixp_chan_setformat), 690 KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed), 691 KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize), 692 KOBJMETHOD(channel_trigger, atiixp_chan_trigger), 693 KOBJMETHOD(channel_getptr, atiixp_chan_getptr), 694 KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps), 695 { 0, 0 } 696 }; 697 CHANNEL_DECLARE(atiixp_chan); 698 699 /* 700 * PCI driver interface 701 */ 702 static void 703 atiixp_intr(void *p) 704 { 705 struct atiixp_info *sc = p; 706 struct atiixp_chinfo *ch; 707 uint32_t status, enable, detected_codecs; 708 709 atiixp_lock(sc); 710 status = atiixp_rd(sc, ATI_REG_ISR); 711 712 if (status == 0) { 713 atiixp_unlock(sc); 714 return; 715 } 716 717 if ((status & ATI_REG_ISR_IN_STATUS) && sc->rch.channel) { 718 ch = &sc->rch; 719 #ifdef ATI_IXP_DEBUG 720 ch->dma_ptr = (ch->dma_ptr + ch->dma_blksz) % 721 (ch->dma_segs * ch->dma_blksz); 722 #endif 723 atiixp_unlock(sc); 724 chn_intr(ch->channel); 725 atiixp_lock(sc); 726 } 727 if ((status & ATI_REG_ISR_OUT_STATUS) && sc->pch.channel) { 728 ch = &sc->pch; 729 #ifdef ATI_IXP_DEBUG 730 ch->dma_ptr = (ch->dma_ptr + ch->dma_blksz) % 731 (ch->dma_segs * ch->dma_blksz); 732 #endif 733 atiixp_unlock(sc); 734 chn_intr(ch->channel); 735 atiixp_lock(sc); 736 } 737 738 #if 0 739 if (status & ATI_REG_ISR_IN_XRUN) { 740 device_printf(sc->dev, 741 "Recieve IN XRUN interrupt\n"); 742 } 743 if (status & ATI_REG_ISR_OUT_XRUN) { 744 device_printf(sc->dev, 745 "Recieve OUT XRUN interrupt\n"); 746 } 747 #endif 748 749 if (status & CODEC_CHECK_BITS) { 750 /* mark missing codecs as not ready */ 751 detected_codecs = status & CODEC_CHECK_BITS; 752 sc->codec_not_ready_bits |= detected_codecs; 753 754 /* disable detected interupt sources */ 755 enable = atiixp_rd(sc, ATI_REG_IER); 756 enable &= ~detected_codecs; 757 atiixp_wr(sc, ATI_REG_IER, enable); 758 } 759 760 /* acknowledge */ 761 atiixp_wr(sc, ATI_REG_ISR, status); 762 atiixp_unlock(sc); 763 } 764 765 static void 766 atiixp_dma_cb(void *p, bus_dma_segment_t *bds, int a, int b) 767 { 768 struct atiixp_info *sc = (struct atiixp_info *)p; 769 sc->sgd_addr = bds->ds_addr; 770 } 771 772 static void 773 atiixp_chip_pre_init(struct atiixp_info *sc) 774 { 775 uint32_t value; 776 777 atiixp_lock(sc); 778 779 /* disable interrupts */ 780 atiixp_disable_interrupts(sc); 781 782 /* clear all DMA enables (preserving rest of settings) */ 783 value = atiixp_rd(sc, ATI_REG_CMD); 784 value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN | 785 ATI_REG_CMD_SPDF_OUT_EN ); 786 atiixp_wr(sc, ATI_REG_CMD, value); 787 788 /* reset aclink */ 789 atiixp_reset_aclink(sc); 790 791 sc->codec_not_ready_bits = 0; 792 793 /* enable all codecs to interrupt as well as the new frame interrupt */ 794 atiixp_wr(sc, ATI_REG_IER, CODEC_CHECK_BITS); 795 796 atiixp_unlock(sc); 797 } 798 799 static void 800 atiixp_chip_post_init(void *arg) 801 { 802 struct atiixp_info *sc = (struct atiixp_info *)arg; 803 uint32_t subdev; 804 int i, timeout, found; 805 char status[SND_STATUSLEN]; 806 807 atiixp_lock(sc); 808 809 if (sc->delayed_attach.ich_func) { 810 config_intrhook_disestablish(&sc->delayed_attach); 811 sc->delayed_attach.ich_func = NULL; 812 } 813 814 /* wait for the interrupts to happen */ 815 timeout = 100; 816 do { 817 msleep(sc, sc->lock, PWAIT, "ixpslp", 1); 818 if (sc->codec_not_ready_bits) 819 break; 820 } while (--timeout); 821 822 atiixp_disable_interrupts(sc); 823 824 if (timeout == 0) { 825 device_printf(sc->dev, 826 "WARNING: timeout during codec detection; " 827 "codecs might be present but haven't interrupted\n"); 828 atiixp_unlock(sc); 829 goto postinitbad; 830 } 831 832 found = 0; 833 834 /* 835 * ATI IXP can have upto 3 codecs, but single codec should be 836 * suffice for now. 837 */ 838 if (!(sc->codec_not_ready_bits & 839 ATI_REG_ISR_CODEC0_NOT_READY)) { 840 /* codec 0 present */ 841 sc->codec_found++; 842 sc->codec_idx = 0; 843 found++; 844 } 845 846 if (!(sc->codec_not_ready_bits & 847 ATI_REG_ISR_CODEC1_NOT_READY)) { 848 /* codec 1 present */ 849 sc->codec_found++; 850 } 851 852 if (!(sc->codec_not_ready_bits & 853 ATI_REG_ISR_CODEC2_NOT_READY)) { 854 /* codec 2 present */ 855 sc->codec_found++; 856 } 857 858 atiixp_unlock(sc); 859 860 if (found == 0) 861 goto postinitbad; 862 863 /* create/init mixer */ 864 sc->codec = AC97_CREATE(sc->dev, sc, atiixp_ac97); 865 if (sc->codec == NULL) 866 goto postinitbad; 867 868 subdev = (pci_get_subdevice(sc->dev) << 16) | pci_get_subvendor(sc->dev); 869 switch (subdev) { 870 case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */ 871 ac97_setflags(sc->codec, ac97_getflags(sc->codec) | AC97_F_EAPD_INV); 872 break; 873 default: 874 break; 875 } 876 877 mixer_init(sc->dev, ac97_getmixerclass(), sc->codec); 878 879 if (pcm_register(sc->dev, sc, ATI_IXP_NPCHAN, ATI_IXP_NRCHAN)) 880 goto postinitbad; 881 882 for (i = 0; i < ATI_IXP_NPCHAN; i++) 883 pcm_addchan(sc->dev, PCMDIR_PLAY, &atiixp_chan_class, sc); 884 for (i = 0; i < ATI_IXP_NRCHAN; i++) 885 pcm_addchan(sc->dev, PCMDIR_REC, &atiixp_chan_class, sc); 886 887 snprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s", 888 rman_get_start(sc->reg), rman_get_start(sc->irq), 889 PCM_KLDSTRING(snd_atiixp)); 890 891 pcm_setstatus(sc->dev, status); 892 893 atiixp_lock(sc); 894 atiixp_enable_interrupts(sc); 895 atiixp_unlock(sc); 896 897 return; 898 899 postinitbad: 900 atiixp_release_resource(sc); 901 } 902 903 static void 904 atiixp_release_resource(struct atiixp_info *sc) 905 { 906 if (sc == NULL) 907 return; 908 if (sc->codec) { 909 ac97_destroy(sc->codec); 910 sc->codec = NULL; 911 } 912 if (sc->ih) { 913 bus_teardown_intr(sc->dev, sc->irq, sc->ih); 914 sc->ih = 0; 915 } 916 if (sc->reg) { 917 bus_release_resource(sc->dev, sc->regtype, sc->regid, sc->reg); 918 sc->reg = 0; 919 } 920 if (sc->irq) { 921 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irqid, sc->irq); 922 sc->irq = 0; 923 } 924 if (sc->parent_dmat) { 925 bus_dma_tag_destroy(sc->parent_dmat); 926 sc->parent_dmat = 0; 927 } 928 if (sc->sgd_dmamap) { 929 bus_dmamap_unload(sc->sgd_dmat, sc->sgd_dmamap); 930 sc->sgd_dmamap = 0; 931 } 932 if (sc->sgd_dmat) { 933 bus_dma_tag_destroy(sc->sgd_dmat); 934 sc->sgd_dmat = 0; 935 } 936 if (sc->lock) { 937 snd_mtxfree(sc->lock); 938 sc->lock = NULL; 939 } 940 } 941 942 static int 943 atiixp_pci_probe(device_t dev) 944 { 945 int i; 946 uint16_t devid, vendor; 947 948 vendor = pci_get_vendor(dev); 949 devid = pci_get_device(dev); 950 for (i = 0; i < sizeof(atiixp_hw) / sizeof(atiixp_hw[0]); i++) { 951 if (vendor == atiixp_hw[i].vendor && 952 devid == atiixp_hw[i].devid) { 953 device_set_desc(dev, atiixp_hw[i].desc); 954 return (BUS_PROBE_DEFAULT); 955 } 956 } 957 958 return (ENXIO); 959 } 960 961 static int 962 atiixp_pci_attach(device_t dev) 963 { 964 struct atiixp_info *sc; 965 int i; 966 967 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 968 device_printf(dev, "cannot allocate softc\n"); 969 return (ENXIO); 970 } 971 972 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 973 sc->dev = dev; 974 /* 975 * Default DMA segments per playback / recording channel 976 */ 977 sc->dma_segs = ATI_IXP_DMA_CHSEGS_DEFAULT; 978 979 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 980 pci_enable_busmaster(dev); 981 982 sc->regid = PCIR_BAR(0); 983 sc->regtype = SYS_RES_MEMORY; 984 sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, 985 RF_ACTIVE); 986 987 if (!sc->reg) { 988 device_printf(dev, "unable to allocate register space\n"); 989 goto bad; 990 } 991 992 sc->st = rman_get_bustag(sc->reg); 993 sc->sh = rman_get_bushandle(sc->reg); 994 995 sc->bufsz = pcm_getbuffersize(dev, ATI_IXP_BUFSZ_MIN, 996 ATI_IXP_BUFSZ_DEFAULT, ATI_IXP_BUFSZ_MAX); 997 998 sc->irqid = 0; 999 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, 1000 RF_ACTIVE | RF_SHAREABLE); 1001 if (!sc->irq || 1002 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, 1003 atiixp_intr, sc, &sc->ih)) { 1004 device_printf(dev, "unable to map interrupt\n"); 1005 goto bad; 1006 } 1007 1008 /* 1009 * Let the user choose the best DMA segments. 1010 */ 1011 if (resource_int_value(device_get_name(dev), 1012 device_get_unit(dev), "dma_segs", 1013 &i) == 0) { 1014 if (i < ATI_IXP_DMA_CHSEGS_MIN) 1015 i = ATI_IXP_DMA_CHSEGS_MIN; 1016 if (i > ATI_IXP_DMA_CHSEGS_MAX) 1017 i = ATI_IXP_DMA_CHSEGS_MAX; 1018 sc->dma_segs = i; 1019 } 1020 1021 /* 1022 * round the value to the nearest ^2 1023 */ 1024 i = 0; 1025 while (sc->dma_segs >> i) 1026 i++; 1027 sc->dma_segs = 1 << (i - 1); 1028 if (sc->dma_segs < ATI_IXP_DMA_CHSEGS_MIN) 1029 sc->dma_segs = ATI_IXP_DMA_CHSEGS_MIN; 1030 else if (sc->dma_segs > ATI_IXP_DMA_CHSEGS_MAX) 1031 sc->dma_segs = ATI_IXP_DMA_CHSEGS_MAX; 1032 1033 /* 1034 * DMA tag for scatter-gather buffers and link pointers 1035 */ 1036 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1037 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1038 /*highaddr*/BUS_SPACE_MAXADDR, 1039 /*filter*/NULL, /*filterarg*/NULL, 1040 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1041 /*flags*/0, /*lockfunc*/NULL, 1042 /*lockarg*/NULL, &sc->parent_dmat) != 0) { 1043 device_printf(dev, "unable to create dma tag\n"); 1044 goto bad; 1045 } 1046 1047 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1048 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1049 /*highaddr*/BUS_SPACE_MAXADDR, 1050 /*filter*/NULL, /*filterarg*/NULL, 1051 /*maxsize*/sc->dma_segs * ATI_IXP_NCHANS * 1052 sizeof(struct atiixp_dma_op), 1053 /*nsegments*/1, /*maxsegz*/0x3ffff, 1054 /*flags*/0, /*lockfunc*/NULL, 1055 /*lockarg*/NULL, &sc->sgd_dmat) != 0) { 1056 device_printf(dev, "unable to create dma tag\n"); 1057 goto bad; 1058 } 1059 1060 if (bus_dmamem_alloc(sc->sgd_dmat, (void **)&sc->sgd_table, 1061 BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1) 1062 goto bad; 1063 1064 if (bus_dmamap_load(sc->sgd_dmat, sc->sgd_dmamap, sc->sgd_table, 1065 sc->dma_segs * ATI_IXP_NCHANS * 1066 sizeof(struct atiixp_dma_op), 1067 atiixp_dma_cb, sc, 0)) 1068 goto bad; 1069 1070 1071 atiixp_chip_pre_init(sc); 1072 1073 sc->delayed_attach.ich_func = atiixp_chip_post_init; 1074 sc->delayed_attach.ich_arg = sc; 1075 if (cold == 0 || 1076 config_intrhook_establish(&sc->delayed_attach) != 0) { 1077 sc->delayed_attach.ich_func = NULL; 1078 atiixp_chip_post_init(sc); 1079 } 1080 1081 return (0); 1082 1083 bad: 1084 atiixp_release_resource(sc); 1085 return (ENXIO); 1086 } 1087 1088 static int 1089 atiixp_pci_detach(device_t dev) 1090 { 1091 int r; 1092 struct atiixp_info *sc; 1093 1094 sc = pcm_getdevinfo(dev); 1095 if (sc != NULL) { 1096 if (sc->codec != NULL) { 1097 r = pcm_unregister(dev); 1098 if (r) 1099 return (r); 1100 } 1101 sc->codec = NULL; 1102 if (sc->st != 0 && sc->sh != 0) 1103 atiixp_disable_interrupts(sc); 1104 atiixp_release_resource(sc); 1105 free(sc, M_DEVBUF); 1106 } 1107 return (0); 1108 } 1109 1110 static int 1111 atiixp_pci_suspend(device_t dev) 1112 { 1113 struct atiixp_info *sc = pcm_getdevinfo(dev); 1114 uint32_t value; 1115 1116 /* quickly disable interrupts and save channels active state */ 1117 atiixp_lock(sc); 1118 atiixp_disable_interrupts(sc); 1119 value = atiixp_rd(sc, ATI_REG_CMD); 1120 sc->pch.active = (value & ATI_REG_CMD_SEND_EN) ? 1 : 0; 1121 sc->rch.active = (value & ATI_REG_CMD_RECEIVE_EN) ? 1 : 0; 1122 atiixp_unlock(sc); 1123 1124 /* stop everything */ 1125 if (sc->pch.channel && sc->pch.active) 1126 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_STOP); 1127 if (sc->rch.channel && sc->rch.active) 1128 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_STOP); 1129 1130 /* power down aclink and pci bus */ 1131 atiixp_lock(sc); 1132 value = atiixp_rd(sc, ATI_REG_CMD); 1133 value |= ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET; 1134 atiixp_wr(sc, ATI_REG_CMD, ATI_REG_CMD_POWERDOWN); 1135 pci_set_powerstate(dev, PCI_POWERSTATE_D3); 1136 atiixp_unlock(sc); 1137 1138 return (0); 1139 } 1140 1141 static int 1142 atiixp_pci_resume(device_t dev) 1143 { 1144 struct atiixp_info *sc = pcm_getdevinfo(dev); 1145 1146 atiixp_lock(sc); 1147 /* power up pci bus */ 1148 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 1149 pci_enable_io(dev, SYS_RES_MEMORY); 1150 pci_enable_busmaster(dev); 1151 /* reset / power up aclink */ 1152 atiixp_reset_aclink(sc); 1153 atiixp_unlock(sc); 1154 1155 if (mixer_reinit(dev) == -1) { 1156 device_printf(dev, "unable to reinitialize the mixer\n"); 1157 return (ENXIO); 1158 } 1159 1160 /* 1161 * Resume channel activities. Reset channel format regardless 1162 * of its previous state. 1163 */ 1164 if (sc->pch.channel) { 1165 if (sc->pch.fmt) 1166 atiixp_chan_setformat(NULL, &sc->pch, sc->pch.fmt); 1167 if (sc->pch.active) 1168 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_START); 1169 } 1170 if (sc->rch.channel) { 1171 if (sc->rch.fmt) 1172 atiixp_chan_setformat(NULL, &sc->rch, sc->rch.fmt); 1173 if (sc->rch.active) 1174 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_START); 1175 } 1176 1177 /* enable interrupts */ 1178 atiixp_lock(sc); 1179 atiixp_enable_interrupts(sc); 1180 atiixp_unlock(sc); 1181 1182 return (0); 1183 } 1184 1185 static device_method_t atiixp_methods[] = { 1186 DEVMETHOD(device_probe, atiixp_pci_probe), 1187 DEVMETHOD(device_attach, atiixp_pci_attach), 1188 DEVMETHOD(device_detach, atiixp_pci_detach), 1189 DEVMETHOD(device_suspend, atiixp_pci_suspend), 1190 DEVMETHOD(device_resume, atiixp_pci_resume), 1191 { 0, 0 } 1192 }; 1193 1194 static driver_t atiixp_driver = { 1195 "pcm", 1196 atiixp_methods, 1197 PCM_SOFTC_SIZE, 1198 }; 1199 1200 DRIVER_MODULE(snd_atiixp, pci, atiixp_driver, pcm_devclass, 0, 0); 1201 MODULE_DEPEND(snd_atiixp, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1202 MODULE_VERSION(snd_atiixp, 1); 1203