1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * FreeBSD pcm driver for ATI IXP 150/200/250/300 AC97 controllers
31 *
32 * Features
33 * * 16bit playback / recording
34 * * 32bit native playback - yay!
35 * * 32bit native recording (seems broken on few hardwares)
36 *
37 * Issues / TODO:
38 * * SPDIF
39 * * Support for more than 2 channels.
40 * * VRA ? VRM ? DRA ?
41 * * 32bit native recording seems broken on few hardwares, most
42 * probably because of incomplete VRA/DRA cleanup.
43 *
44 *
45 * Thanks goes to:
46 *
47 * Shaharil @ SCAN Associates whom relentlessly providing me the
48 * mind blowing Acer Ferrari 4002 WLMi with this ATI IXP hardware.
49 *
50 * Reinoud Zandijk <reinoud@NetBSD.org> (auixp), which this driver is
51 * largely based upon although large part of it has been reworked. His
52 * driver is the primary reference and pretty much well documented.
53 *
54 * Takashi Iwai (ALSA snd-atiixp), for register definitions and some
55 * random ninja hackery.
56 */
57
58 #ifdef HAVE_KERNEL_OPTION_HEADERS
59 #include "opt_snd.h"
60 #endif
61
62 #include <dev/sound/pcm/sound.h>
63 #include <dev/sound/pcm/ac97.h>
64
65 #include <dev/pci/pcireg.h>
66 #include <dev/pci/pcivar.h>
67 #include <sys/sysctl.h>
68 #include <sys/endian.h>
69
70 #include <dev/sound/pci/atiixp.h>
71
72 #define ATI_IXP_DMA_RETRY_MAX 100
73
74 #define ATI_IXP_BUFSZ_MIN 4096
75 #define ATI_IXP_BUFSZ_MAX 65536
76 #define ATI_IXP_BUFSZ_DEFAULT 16384
77
78 #define ATI_IXP_BLK_MIN 32
79 #define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1))
80
81 #define ATI_IXP_CHN_RUNNING 0x00000001
82 #define ATI_IXP_CHN_SUSPEND 0x00000002
83
84 struct atiixp_dma_op {
85 volatile uint32_t addr;
86 volatile uint16_t status;
87 volatile uint16_t size;
88 volatile uint32_t next;
89 };
90
91 struct atiixp_info;
92
93 struct atiixp_chinfo {
94 struct snd_dbuf *buffer;
95 struct pcm_channel *channel;
96 struct atiixp_info *parent;
97 struct atiixp_dma_op *sgd_table;
98 bus_addr_t sgd_addr;
99 uint32_t enable_bit, flush_bit, linkptr_bit, dt_cur_bit;
100 uint32_t blksz, blkcnt;
101 uint32_t ptr, prevptr;
102 uint32_t fmt;
103 uint32_t flags;
104 int caps_32bit, dir;
105 };
106
107 struct atiixp_info {
108 device_t dev;
109
110 bus_space_tag_t st;
111 bus_space_handle_t sh;
112 bus_dma_tag_t parent_dmat;
113 bus_dma_tag_t sgd_dmat;
114 bus_dmamap_t sgd_dmamap;
115 bus_addr_t sgd_addr;
116
117 struct resource *reg, *irq;
118 int regtype, regid, irqid;
119 void *ih;
120 struct ac97_info *codec;
121
122 struct atiixp_chinfo pch;
123 struct atiixp_chinfo rch;
124 struct atiixp_dma_op *sgd_table;
125 struct intr_config_hook delayed_attach;
126
127 uint32_t bufsz;
128 uint32_t codec_not_ready_bits, codec_idx, codec_found;
129 uint32_t blkcnt;
130 int registered_channels;
131
132 struct mtx *lock;
133 struct callout poll_timer;
134 int poll_ticks, polling;
135 };
136
137 #define atiixp_rd(_sc, _reg) \
138 bus_space_read_4((_sc)->st, (_sc)->sh, _reg)
139 #define atiixp_wr(_sc, _reg, _val) \
140 bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val)
141
142 #define atiixp_lock(_sc) snd_mtxlock((_sc)->lock)
143 #define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock)
144 #define atiixp_assert(_sc) snd_mtxassert((_sc)->lock)
145
146 static uint32_t atiixp_fmt_32bit[] = {
147 SND_FORMAT(AFMT_S16_LE, 2, 0),
148 SND_FORMAT(AFMT_S32_LE, 2, 0),
149 0
150 };
151
152 static uint32_t atiixp_fmt[] = {
153 SND_FORMAT(AFMT_S16_LE, 2, 0),
154 0
155 };
156
157 static struct pcmchan_caps atiixp_caps_32bit = {
158 ATI_IXP_BASE_RATE,
159 ATI_IXP_BASE_RATE,
160 atiixp_fmt_32bit, 0
161 };
162
163 static struct pcmchan_caps atiixp_caps = {
164 ATI_IXP_BASE_RATE,
165 ATI_IXP_BASE_RATE,
166 atiixp_fmt, 0
167 };
168
169 static const struct {
170 uint16_t vendor;
171 uint16_t devid;
172 char *desc;
173 } atiixp_hw[] = {
174 { ATI_VENDOR_ID, ATI_IXP_200_ID, "ATI IXP 200" },
175 { ATI_VENDOR_ID, ATI_IXP_300_ID, "ATI IXP 300" },
176 { ATI_VENDOR_ID, ATI_IXP_400_ID, "ATI IXP 400" },
177 { ATI_VENDOR_ID, ATI_IXP_SB600_ID, "ATI IXP SB600" },
178 };
179
180 static void atiixp_enable_interrupts(struct atiixp_info *);
181 static void atiixp_disable_interrupts(struct atiixp_info *);
182 static void atiixp_reset_aclink(struct atiixp_info *);
183 static void atiixp_flush_dma(struct atiixp_chinfo *);
184 static void atiixp_enable_dma(struct atiixp_chinfo *);
185 static void atiixp_disable_dma(struct atiixp_chinfo *);
186
187 static int atiixp_waitready_codec(struct atiixp_info *);
188 static int atiixp_rdcd(kobj_t, void *, int);
189 static int atiixp_wrcd(kobj_t, void *, int, uint32_t);
190
191 static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *,
192 struct pcm_channel *, int);
193 static int atiixp_chan_setformat(kobj_t, void *, uint32_t);
194 static uint32_t atiixp_chan_setspeed(kobj_t, void *, uint32_t);
195 static int atiixp_chan_setfragments(kobj_t, void *, uint32_t, uint32_t);
196 static uint32_t atiixp_chan_setblocksize(kobj_t, void *, uint32_t);
197 static void atiixp_buildsgdt(struct atiixp_chinfo *);
198 static int atiixp_chan_trigger(kobj_t, void *, int);
199 static __inline uint32_t atiixp_dmapos(struct atiixp_chinfo *);
200 static uint32_t atiixp_chan_getptr(kobj_t, void *);
201 static struct pcmchan_caps *atiixp_chan_getcaps(kobj_t, void *);
202
203 static void atiixp_intr(void *);
204 static void atiixp_dma_cb(void *, bus_dma_segment_t *, int, int);
205 static void atiixp_chip_pre_init(struct atiixp_info *);
206 static void atiixp_chip_post_init(void *);
207 static void atiixp_release_resource(struct atiixp_info *);
208 static int atiixp_pci_probe(device_t);
209 static int atiixp_pci_attach(device_t);
210 static int atiixp_pci_detach(device_t);
211 static int atiixp_pci_suspend(device_t);
212 static int atiixp_pci_resume(device_t);
213
214 /*
215 * ATI IXP helper functions
216 */
217 static void
atiixp_enable_interrupts(struct atiixp_info * sc)218 atiixp_enable_interrupts(struct atiixp_info *sc)
219 {
220 uint32_t value;
221
222 /* clear all pending */
223 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff);
224
225 /* enable all relevant interrupt sources we can handle */
226 value = atiixp_rd(sc, ATI_REG_IER);
227
228 value |= ATI_REG_IER_IO_STATUS_EN;
229
230 /*
231 * Disable / ignore internal xrun/spdf interrupt flags
232 * since it doesn't interest us (for now).
233 */
234 #if 1
235 value &= ~(ATI_REG_IER_IN_XRUN_EN | ATI_REG_IER_OUT_XRUN_EN |
236 ATI_REG_IER_SPDF_XRUN_EN | ATI_REG_IER_SPDF_STATUS_EN);
237 #else
238 value |= ATI_REG_IER_IN_XRUN_EN;
239 value |= ATI_REG_IER_OUT_XRUN_EN;
240
241 value |= ATI_REG_IER_SPDF_XRUN_EN;
242 value |= ATI_REG_IER_SPDF_STATUS_EN;
243 #endif
244
245 atiixp_wr(sc, ATI_REG_IER, value);
246 }
247
248 static void
atiixp_disable_interrupts(struct atiixp_info * sc)249 atiixp_disable_interrupts(struct atiixp_info *sc)
250 {
251 /* disable all interrupt sources */
252 atiixp_wr(sc, ATI_REG_IER, 0);
253
254 /* clear all pending */
255 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff);
256 }
257
258 static void
atiixp_reset_aclink(struct atiixp_info * sc)259 atiixp_reset_aclink(struct atiixp_info *sc)
260 {
261 uint32_t value, timeout;
262
263 /* if power is down, power it up */
264 value = atiixp_rd(sc, ATI_REG_CMD);
265 if (value & ATI_REG_CMD_POWERDOWN) {
266 /* explicitly enable power */
267 value &= ~ATI_REG_CMD_POWERDOWN;
268 atiixp_wr(sc, ATI_REG_CMD, value);
269
270 /* have to wait at least 10 usec for it to initialise */
271 DELAY(20);
272 }
273
274 /* perform a soft reset */
275 value = atiixp_rd(sc, ATI_REG_CMD);
276 value |= ATI_REG_CMD_AC_SOFT_RESET;
277 atiixp_wr(sc, ATI_REG_CMD, value);
278
279 /* need to read the CMD reg and wait aprox. 10 usec to init */
280 value = atiixp_rd(sc, ATI_REG_CMD);
281 DELAY(20);
282
283 /* clear soft reset flag again */
284 value = atiixp_rd(sc, ATI_REG_CMD);
285 value &= ~ATI_REG_CMD_AC_SOFT_RESET;
286 atiixp_wr(sc, ATI_REG_CMD, value);
287
288 /* check if the ac-link is working; reset device otherwise */
289 timeout = 10;
290 value = atiixp_rd(sc, ATI_REG_CMD);
291 while (!(value & ATI_REG_CMD_ACLINK_ACTIVE) && --timeout) {
292 #if 0
293 device_printf(sc->dev, "not up; resetting aclink hardware\n");
294 #endif
295
296 /* dip aclink reset but keep the acsync */
297 value &= ~ATI_REG_CMD_AC_RESET;
298 value |= ATI_REG_CMD_AC_SYNC;
299 atiixp_wr(sc, ATI_REG_CMD, value);
300
301 /* need to read CMD again and wait again (clocking in issue?) */
302 value = atiixp_rd(sc, ATI_REG_CMD);
303 DELAY(20);
304
305 /* assert aclink reset again */
306 value = atiixp_rd(sc, ATI_REG_CMD);
307 value |= ATI_REG_CMD_AC_RESET;
308 atiixp_wr(sc, ATI_REG_CMD, value);
309
310 /* check if its active now */
311 value = atiixp_rd(sc, ATI_REG_CMD);
312 }
313
314 if (timeout == 0)
315 device_printf(sc->dev, "giving up aclink reset\n");
316 #if 0
317 if (timeout != 10)
318 device_printf(sc->dev, "aclink hardware reset successful\n");
319 #endif
320
321 /* assert reset and sync for safety */
322 value = atiixp_rd(sc, ATI_REG_CMD);
323 value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET;
324 atiixp_wr(sc, ATI_REG_CMD, value);
325 }
326
327 static void
atiixp_flush_dma(struct atiixp_chinfo * ch)328 atiixp_flush_dma(struct atiixp_chinfo *ch)
329 {
330 atiixp_wr(ch->parent, ATI_REG_FIFO_FLUSH, ch->flush_bit);
331 }
332
333 static void
atiixp_enable_dma(struct atiixp_chinfo * ch)334 atiixp_enable_dma(struct atiixp_chinfo *ch)
335 {
336 uint32_t value;
337
338 value = atiixp_rd(ch->parent, ATI_REG_CMD);
339 if (!(value & ch->enable_bit)) {
340 value |= ch->enable_bit;
341 atiixp_wr(ch->parent, ATI_REG_CMD, value);
342 }
343 }
344
345 static void
atiixp_disable_dma(struct atiixp_chinfo * ch)346 atiixp_disable_dma(struct atiixp_chinfo *ch)
347 {
348 uint32_t value;
349
350 value = atiixp_rd(ch->parent, ATI_REG_CMD);
351 if (value & ch->enable_bit) {
352 value &= ~ch->enable_bit;
353 atiixp_wr(ch->parent, ATI_REG_CMD, value);
354 }
355 }
356
357 /*
358 * AC97 interface
359 */
360 static int
atiixp_waitready_codec(struct atiixp_info * sc)361 atiixp_waitready_codec(struct atiixp_info *sc)
362 {
363 int timeout = 500;
364
365 do {
366 if ((atiixp_rd(sc, ATI_REG_PHYS_OUT_ADDR) &
367 ATI_REG_PHYS_OUT_ADDR_EN) == 0)
368 return (0);
369 DELAY(1);
370 } while (--timeout);
371
372 return (-1);
373 }
374
375 static int
atiixp_rdcd(kobj_t obj,void * devinfo,int reg)376 atiixp_rdcd(kobj_t obj, void *devinfo, int reg)
377 {
378 struct atiixp_info *sc = devinfo;
379 uint32_t data;
380 int timeout;
381
382 if (atiixp_waitready_codec(sc))
383 return (-1);
384
385 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
386 ATI_REG_PHYS_OUT_ADDR_EN | ATI_REG_PHYS_OUT_RW | sc->codec_idx;
387
388 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data);
389
390 if (atiixp_waitready_codec(sc))
391 return (-1);
392
393 timeout = 500;
394 do {
395 data = atiixp_rd(sc, ATI_REG_PHYS_IN_ADDR);
396 if (data & ATI_REG_PHYS_IN_READ_FLAG)
397 return (data >> ATI_REG_PHYS_IN_DATA_SHIFT);
398 DELAY(1);
399 } while (--timeout);
400
401 if (reg < 0x7c)
402 device_printf(sc->dev, "codec read timeout! (reg 0x%x)\n", reg);
403
404 return (-1);
405 }
406
407 static int
atiixp_wrcd(kobj_t obj,void * devinfo,int reg,uint32_t data)408 atiixp_wrcd(kobj_t obj, void *devinfo, int reg, uint32_t data)
409 {
410 struct atiixp_info *sc = devinfo;
411
412 if (atiixp_waitready_codec(sc))
413 return (-1);
414
415 data = (data << ATI_REG_PHYS_OUT_DATA_SHIFT) |
416 (((uint32_t)reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
417 ATI_REG_PHYS_OUT_ADDR_EN | sc->codec_idx;
418
419 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data);
420
421 return (0);
422 }
423
424 static kobj_method_t atiixp_ac97_methods[] = {
425 KOBJMETHOD(ac97_read, atiixp_rdcd),
426 KOBJMETHOD(ac97_write, atiixp_wrcd),
427 KOBJMETHOD_END
428 };
429 AC97_DECLARE(atiixp_ac97);
430
431 /*
432 * Playback / Record channel interface
433 */
434 static void *
atiixp_chan_init(kobj_t obj,void * devinfo,struct snd_dbuf * b,struct pcm_channel * c,int dir)435 atiixp_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
436 struct pcm_channel *c, int dir)
437 {
438 struct atiixp_info *sc = devinfo;
439 struct atiixp_chinfo *ch;
440 int num;
441
442 atiixp_lock(sc);
443
444 if (dir == PCMDIR_PLAY) {
445 ch = &sc->pch;
446 ch->linkptr_bit = ATI_REG_OUT_DMA_LINKPTR;
447 ch->enable_bit = ATI_REG_CMD_OUT_DMA_EN | ATI_REG_CMD_SEND_EN;
448 ch->flush_bit = ATI_REG_FIFO_OUT_FLUSH;
449 ch->dt_cur_bit = ATI_REG_OUT_DMA_DT_CUR;
450 /* Native 32bit playback working properly */
451 ch->caps_32bit = 1;
452 } else {
453 ch = &sc->rch;
454 ch->linkptr_bit = ATI_REG_IN_DMA_LINKPTR;
455 ch->enable_bit = ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_RECEIVE_EN;
456 ch->flush_bit = ATI_REG_FIFO_IN_FLUSH;
457 ch->dt_cur_bit = ATI_REG_IN_DMA_DT_CUR;
458 /* XXX Native 32bit recording appear to be broken */
459 ch->caps_32bit = 1;
460 }
461
462 ch->buffer = b;
463 ch->parent = sc;
464 ch->channel = c;
465 ch->dir = dir;
466 ch->blkcnt = sc->blkcnt;
467 ch->blksz = sc->bufsz / ch->blkcnt;
468
469 atiixp_unlock(sc);
470
471 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) == -1)
472 return (NULL);
473
474 atiixp_lock(sc);
475 num = sc->registered_channels++;
476 ch->sgd_table = &sc->sgd_table[num * ATI_IXP_DMA_CHSEGS_MAX];
477 ch->sgd_addr = sc->sgd_addr + (num * ATI_IXP_DMA_CHSEGS_MAX *
478 sizeof(struct atiixp_dma_op));
479 atiixp_disable_dma(ch);
480 atiixp_unlock(sc);
481
482 return (ch);
483 }
484
485 static int
atiixp_chan_setformat(kobj_t obj,void * data,uint32_t format)486 atiixp_chan_setformat(kobj_t obj, void *data, uint32_t format)
487 {
488 struct atiixp_chinfo *ch = data;
489 struct atiixp_info *sc = ch->parent;
490 uint32_t value;
491
492 atiixp_lock(sc);
493 if (ch->dir == PCMDIR_REC) {
494 value = atiixp_rd(sc, ATI_REG_CMD);
495 value &= ~ATI_REG_CMD_INTERLEAVE_IN;
496 if ((format & AFMT_32BIT) == 0)
497 value |= ATI_REG_CMD_INTERLEAVE_IN;
498 atiixp_wr(sc, ATI_REG_CMD, value);
499 } else {
500 value = atiixp_rd(sc, ATI_REG_OUT_DMA_SLOT);
501 value &= ~ATI_REG_OUT_DMA_SLOT_MASK;
502 /* We do not have support for more than 2 channels, _yet_. */
503 value |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
504 ATI_REG_OUT_DMA_SLOT_BIT(4);
505 value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
506 atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value);
507 value = atiixp_rd(sc, ATI_REG_CMD);
508 value &= ~ATI_REG_CMD_INTERLEAVE_OUT;
509 if ((format & AFMT_32BIT) == 0)
510 value |= ATI_REG_CMD_INTERLEAVE_OUT;
511 atiixp_wr(sc, ATI_REG_CMD, value);
512 value = atiixp_rd(sc, ATI_REG_6CH_REORDER);
513 value &= ~ATI_REG_6CH_REORDER_EN;
514 atiixp_wr(sc, ATI_REG_6CH_REORDER, value);
515 }
516 ch->fmt = format;
517 atiixp_unlock(sc);
518
519 return (0);
520 }
521
522 static uint32_t
atiixp_chan_setspeed(kobj_t obj,void * data,uint32_t spd)523 atiixp_chan_setspeed(kobj_t obj, void *data, uint32_t spd)
524 {
525 /* XXX We're supposed to do VRA/DRA processing right here */
526 return (ATI_IXP_BASE_RATE);
527 }
528
529 static int
atiixp_chan_setfragments(kobj_t obj,void * data,uint32_t blksz,uint32_t blkcnt)530 atiixp_chan_setfragments(kobj_t obj, void *data,
531 uint32_t blksz, uint32_t blkcnt)
532 {
533 struct atiixp_chinfo *ch = data;
534 struct atiixp_info *sc = ch->parent;
535
536 blksz &= ATI_IXP_BLK_ALIGN;
537
538 if (blksz > (ch->buffer->maxsize / ATI_IXP_DMA_CHSEGS_MIN))
539 blksz = ch->buffer->maxsize / ATI_IXP_DMA_CHSEGS_MIN;
540 if (blksz < ATI_IXP_BLK_MIN)
541 blksz = ATI_IXP_BLK_MIN;
542 if (blkcnt > ATI_IXP_DMA_CHSEGS_MAX)
543 blkcnt = ATI_IXP_DMA_CHSEGS_MAX;
544 if (blkcnt < ATI_IXP_DMA_CHSEGS_MIN)
545 blkcnt = ATI_IXP_DMA_CHSEGS_MIN;
546
547 while ((blksz * blkcnt) > ch->buffer->maxsize) {
548 if ((blkcnt >> 1) >= ATI_IXP_DMA_CHSEGS_MIN)
549 blkcnt >>= 1;
550 else if ((blksz >> 1) >= ATI_IXP_BLK_MIN)
551 blksz >>= 1;
552 else
553 break;
554 }
555
556 if ((ch->buffer->blksz != blksz ||
557 ch->buffer->blkcnt != blkcnt) &&
558 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
559 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
560 __func__, blksz, blkcnt);
561
562 ch->blksz = ch->buffer->blksz;
563 ch->blkcnt = ch->buffer->blkcnt;
564
565 return (0);
566 }
567
568 static uint32_t
atiixp_chan_setblocksize(kobj_t obj,void * data,uint32_t blksz)569 atiixp_chan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
570 {
571 struct atiixp_chinfo *ch = data;
572 struct atiixp_info *sc = ch->parent;
573
574 atiixp_chan_setfragments(obj, data, blksz, sc->blkcnt);
575
576 return (ch->blksz);
577 }
578
579 static void
atiixp_buildsgdt(struct atiixp_chinfo * ch)580 atiixp_buildsgdt(struct atiixp_chinfo *ch)
581 {
582 struct atiixp_info *sc = ch->parent;
583 uint32_t addr, blksz, blkcnt;
584 int i;
585
586 addr = ch->buffer->buf_addr;
587
588 if (sc->polling != 0) {
589 blksz = ch->blksz * ch->blkcnt;
590 blkcnt = 1;
591 } else {
592 blksz = ch->blksz;
593 blkcnt = ch->blkcnt;
594 }
595
596 for (i = 0; i < blkcnt; i++) {
597 ch->sgd_table[i].addr = htole32(addr + (i * blksz));
598 ch->sgd_table[i].status = htole16(0);
599 ch->sgd_table[i].size = htole16(blksz >> 2);
600 ch->sgd_table[i].next = htole32((uint32_t)ch->sgd_addr +
601 (((i + 1) % blkcnt) * sizeof(struct atiixp_dma_op)));
602 }
603 }
604
605 static __inline uint32_t
atiixp_dmapos(struct atiixp_chinfo * ch)606 atiixp_dmapos(struct atiixp_chinfo *ch)
607 {
608 struct atiixp_info *sc = ch->parent;
609 uint32_t reg, addr, sz, retry;
610 volatile uint32_t ptr;
611
612 reg = ch->dt_cur_bit;
613 addr = ch->buffer->buf_addr;
614 sz = ch->blkcnt * ch->blksz;
615 retry = ATI_IXP_DMA_RETRY_MAX;
616
617 do {
618 ptr = atiixp_rd(sc, reg);
619 if (ptr < addr)
620 continue;
621 ptr -= addr;
622 if (ptr < sz) {
623 #if 0
624 #ifdef ATI_IXP_DEBUG
625 if ((ptr & ~(ch->blksz - 1)) != ch->ptr) {
626 uint32_t delta;
627
628 delta = (sz + ptr - ch->prevptr) % sz;
629 #ifndef ATI_IXP_DEBUG_VERBOSE
630 if (delta < ch->blksz)
631 #endif
632 device_printf(sc->dev,
633 "PCMDIR_%s: incoherent DMA "
634 "prevptr=%u ptr=%u "
635 "ptr=%u blkcnt=%u "
636 "[delta=%u != blksz=%u] "
637 "(%s)\n",
638 (ch->dir == PCMDIR_PLAY) ?
639 "PLAY" : "REC",
640 ch->prevptr, ptr,
641 ch->ptr, ch->blkcnt,
642 delta, ch->blksz,
643 (delta < ch->blksz) ?
644 "OVERLAPPED!" : "Ok");
645 ch->ptr = ptr & ~(ch->blksz - 1);
646 }
647 ch->prevptr = ptr;
648 #endif
649 #endif
650 return (ptr);
651 }
652 } while (--retry);
653
654 device_printf(sc->dev, "PCMDIR_%s: invalid DMA pointer ptr=%u\n",
655 (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ptr);
656
657 return (0);
658 }
659
660 static __inline int
atiixp_poll_channel(struct atiixp_chinfo * ch)661 atiixp_poll_channel(struct atiixp_chinfo *ch)
662 {
663 uint32_t sz, delta;
664 volatile uint32_t ptr;
665
666 if (!(ch->flags & ATI_IXP_CHN_RUNNING))
667 return (0);
668
669 sz = ch->blksz * ch->blkcnt;
670 ptr = atiixp_dmapos(ch);
671 ch->ptr = ptr;
672 ptr %= sz;
673 ptr &= ~(ch->blksz - 1);
674 delta = (sz + ptr - ch->prevptr) % sz;
675
676 if (delta < ch->blksz)
677 return (0);
678
679 ch->prevptr = ptr;
680
681 return (1);
682 }
683
684 #define atiixp_chan_active(sc) (((sc)->pch.flags | (sc)->rch.flags) & \
685 ATI_IXP_CHN_RUNNING)
686
687 static void
atiixp_poll_callback(void * arg)688 atiixp_poll_callback(void *arg)
689 {
690 struct atiixp_info *sc = arg;
691 uint32_t trigger = 0;
692
693 if (sc == NULL)
694 return;
695
696 atiixp_lock(sc);
697 if (sc->polling == 0 || atiixp_chan_active(sc) == 0) {
698 atiixp_unlock(sc);
699 return;
700 }
701
702 trigger |= (atiixp_poll_channel(&sc->pch) != 0) ? 1 : 0;
703 trigger |= (atiixp_poll_channel(&sc->rch) != 0) ? 2 : 0;
704
705 /* XXX */
706 callout_reset(&sc->poll_timer, 1/*sc->poll_ticks*/,
707 atiixp_poll_callback, sc);
708
709 atiixp_unlock(sc);
710
711 if (trigger & 1)
712 chn_intr(sc->pch.channel);
713 if (trigger & 2)
714 chn_intr(sc->rch.channel);
715 }
716
717 static int
atiixp_chan_trigger(kobj_t obj,void * data,int go)718 atiixp_chan_trigger(kobj_t obj, void *data, int go)
719 {
720 struct atiixp_chinfo *ch = data;
721 struct atiixp_info *sc = ch->parent;
722 uint32_t value;
723 int pollticks;
724
725 if (!PCMTRIG_COMMON(go))
726 return (0);
727
728 atiixp_lock(sc);
729
730 switch (go) {
731 case PCMTRIG_START:
732 atiixp_flush_dma(ch);
733 atiixp_buildsgdt(ch);
734 atiixp_wr(sc, ch->linkptr_bit, 0);
735 atiixp_enable_dma(ch);
736 atiixp_wr(sc, ch->linkptr_bit,
737 (uint32_t)ch->sgd_addr | ATI_REG_LINKPTR_EN);
738 if (sc->polling != 0) {
739 ch->ptr = 0;
740 ch->prevptr = 0;
741 pollticks = ((uint64_t)hz * ch->blksz) /
742 ((uint64_t)ch->buffer->align * ch->buffer->spd);
743 pollticks >>= 2;
744 if (pollticks > hz)
745 pollticks = hz;
746 if (pollticks < 1)
747 pollticks = 1;
748 if (atiixp_chan_active(sc) == 0 ||
749 pollticks < sc->poll_ticks) {
750 if (bootverbose) {
751 if (atiixp_chan_active(sc) == 0)
752 device_printf(sc->dev,
753 "%s: pollticks=%d\n",
754 __func__, pollticks);
755 else
756 device_printf(sc->dev,
757 "%s: pollticks %d -> %d\n",
758 __func__, sc->poll_ticks,
759 pollticks);
760 }
761 sc->poll_ticks = pollticks;
762 callout_reset(&sc->poll_timer, 1,
763 atiixp_poll_callback, sc);
764 }
765 }
766 ch->flags |= ATI_IXP_CHN_RUNNING;
767 break;
768 case PCMTRIG_STOP:
769 case PCMTRIG_ABORT:
770 atiixp_disable_dma(ch);
771 atiixp_flush_dma(ch);
772 ch->flags &= ~ATI_IXP_CHN_RUNNING;
773 if (sc->polling != 0) {
774 if (atiixp_chan_active(sc) == 0) {
775 callout_stop(&sc->poll_timer);
776 sc->poll_ticks = 1;
777 } else {
778 if (sc->pch.flags & ATI_IXP_CHN_RUNNING)
779 ch = &sc->pch;
780 else
781 ch = &sc->rch;
782 pollticks = ((uint64_t)hz * ch->blksz) /
783 ((uint64_t)ch->buffer->align *
784 ch->buffer->spd);
785 pollticks >>= 2;
786 if (pollticks > hz)
787 pollticks = hz;
788 if (pollticks < 1)
789 pollticks = 1;
790 if (pollticks > sc->poll_ticks) {
791 if (bootverbose)
792 device_printf(sc->dev,
793 "%s: pollticks %d -> %d\n",
794 __func__, sc->poll_ticks,
795 pollticks);
796 sc->poll_ticks = pollticks;
797 callout_reset(&sc->poll_timer,
798 1, atiixp_poll_callback,
799 sc);
800 }
801 }
802 }
803 break;
804 default:
805 atiixp_unlock(sc);
806 return (0);
807 break;
808 }
809
810 /* Update bus busy status */
811 value = atiixp_rd(sc, ATI_REG_IER);
812 if (atiixp_rd(sc, ATI_REG_CMD) & (ATI_REG_CMD_SEND_EN |
813 ATI_REG_CMD_RECEIVE_EN | ATI_REG_CMD_SPDF_OUT_EN))
814 value |= ATI_REG_IER_SET_BUS_BUSY;
815 else
816 value &= ~ATI_REG_IER_SET_BUS_BUSY;
817 atiixp_wr(sc, ATI_REG_IER, value);
818
819 atiixp_unlock(sc);
820
821 return (0);
822 }
823
824 static uint32_t
atiixp_chan_getptr(kobj_t obj,void * data)825 atiixp_chan_getptr(kobj_t obj, void *data)
826 {
827 struct atiixp_chinfo *ch = data;
828 struct atiixp_info *sc = ch->parent;
829 uint32_t ptr;
830
831 atiixp_lock(sc);
832 if (sc->polling != 0)
833 ptr = ch->ptr;
834 else
835 ptr = atiixp_dmapos(ch);
836 atiixp_unlock(sc);
837
838 return (ptr);
839 }
840
841 static struct pcmchan_caps *
atiixp_chan_getcaps(kobj_t obj,void * data)842 atiixp_chan_getcaps(kobj_t obj, void *data)
843 {
844 struct atiixp_chinfo *ch = data;
845
846 if (ch->caps_32bit)
847 return (&atiixp_caps_32bit);
848 return (&atiixp_caps);
849 }
850
851 static kobj_method_t atiixp_chan_methods[] = {
852 KOBJMETHOD(channel_init, atiixp_chan_init),
853 KOBJMETHOD(channel_setformat, atiixp_chan_setformat),
854 KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed),
855 KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize),
856 KOBJMETHOD(channel_setfragments, atiixp_chan_setfragments),
857 KOBJMETHOD(channel_trigger, atiixp_chan_trigger),
858 KOBJMETHOD(channel_getptr, atiixp_chan_getptr),
859 KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps),
860 KOBJMETHOD_END
861 };
862 CHANNEL_DECLARE(atiixp_chan);
863
864 /*
865 * PCI driver interface
866 */
867 static void
atiixp_intr(void * p)868 atiixp_intr(void *p)
869 {
870 struct atiixp_info *sc = p;
871 uint32_t status, enable, detected_codecs;
872 uint32_t trigger = 0;
873
874 atiixp_lock(sc);
875 if (sc->polling != 0) {
876 atiixp_unlock(sc);
877 return;
878 }
879 status = atiixp_rd(sc, ATI_REG_ISR);
880
881 if (status == 0) {
882 atiixp_unlock(sc);
883 return;
884 }
885
886 if ((status & ATI_REG_ISR_OUT_STATUS) &&
887 (sc->pch.flags & ATI_IXP_CHN_RUNNING))
888 trigger |= 1;
889 if ((status & ATI_REG_ISR_IN_STATUS) &&
890 (sc->rch.flags & ATI_IXP_CHN_RUNNING))
891 trigger |= 2;
892
893 #if 0
894 if (status & ATI_REG_ISR_IN_XRUN) {
895 device_printf(sc->dev,
896 "Recieve IN XRUN interrupt\n");
897 }
898 if (status & ATI_REG_ISR_OUT_XRUN) {
899 device_printf(sc->dev,
900 "Recieve OUT XRUN interrupt\n");
901 }
902 #endif
903
904 if (status & CODEC_CHECK_BITS) {
905 /* mark missing codecs as not ready */
906 detected_codecs = status & CODEC_CHECK_BITS;
907 sc->codec_not_ready_bits |= detected_codecs;
908
909 /* disable detected interrupt sources */
910 enable = atiixp_rd(sc, ATI_REG_IER);
911 enable &= ~detected_codecs;
912 atiixp_wr(sc, ATI_REG_IER, enable);
913 wakeup(sc);
914 }
915
916 /* acknowledge */
917 atiixp_wr(sc, ATI_REG_ISR, status);
918 atiixp_unlock(sc);
919
920 if (trigger & 1)
921 chn_intr(sc->pch.channel);
922 if (trigger & 2)
923 chn_intr(sc->rch.channel);
924 }
925
926 static void
atiixp_dma_cb(void * p,bus_dma_segment_t * bds,int a,int b)927 atiixp_dma_cb(void *p, bus_dma_segment_t *bds, int a, int b)
928 {
929 struct atiixp_info *sc = (struct atiixp_info *)p;
930 sc->sgd_addr = bds->ds_addr;
931 }
932
933 static void
atiixp_chip_pre_init(struct atiixp_info * sc)934 atiixp_chip_pre_init(struct atiixp_info *sc)
935 {
936 uint32_t value;
937
938 atiixp_lock(sc);
939
940 /* disable interrupts */
941 atiixp_disable_interrupts(sc);
942
943 /* clear all DMA enables (preserving rest of settings) */
944 value = atiixp_rd(sc, ATI_REG_CMD);
945 value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN |
946 ATI_REG_CMD_SPDF_OUT_EN );
947 atiixp_wr(sc, ATI_REG_CMD, value);
948
949 /* reset aclink */
950 atiixp_reset_aclink(sc);
951
952 sc->codec_not_ready_bits = 0;
953
954 /* enable all codecs to interrupt as well as the new frame interrupt */
955 atiixp_wr(sc, ATI_REG_IER, CODEC_CHECK_BITS);
956
957 atiixp_unlock(sc);
958 }
959
960 static int
sysctl_atiixp_polling(SYSCTL_HANDLER_ARGS)961 sysctl_atiixp_polling(SYSCTL_HANDLER_ARGS)
962 {
963 struct atiixp_info *sc;
964 device_t dev;
965 int err, val;
966
967 dev = oidp->oid_arg1;
968 sc = pcm_getdevinfo(dev);
969 if (sc == NULL)
970 return (EINVAL);
971 atiixp_lock(sc);
972 val = sc->polling;
973 atiixp_unlock(sc);
974 err = sysctl_handle_int(oidp, &val, 0, req);
975
976 if (err || req->newptr == NULL)
977 return (err);
978 if (val < 0 || val > 1)
979 return (EINVAL);
980
981 atiixp_lock(sc);
982 if (val != sc->polling) {
983 if (atiixp_chan_active(sc) != 0)
984 err = EBUSY;
985 else if (val == 0) {
986 atiixp_enable_interrupts(sc);
987 sc->polling = 0;
988 DELAY(1000);
989 } else {
990 atiixp_disable_interrupts(sc);
991 sc->polling = 1;
992 DELAY(1000);
993 }
994 }
995 atiixp_unlock(sc);
996
997 return (err);
998 }
999
1000 static void
atiixp_chip_post_init(void * arg)1001 atiixp_chip_post_init(void *arg)
1002 {
1003 struct atiixp_info *sc = (struct atiixp_info *)arg;
1004 uint32_t subdev;
1005 int i, timeout, found, polling;
1006 char status[SND_STATUSLEN];
1007
1008 atiixp_lock(sc);
1009
1010 if (sc->delayed_attach.ich_func) {
1011 config_intrhook_disestablish(&sc->delayed_attach);
1012 sc->delayed_attach.ich_func = NULL;
1013 }
1014
1015 polling = sc->polling;
1016 sc->polling = 0;
1017
1018 timeout = 10;
1019 if (sc->codec_not_ready_bits == 0) {
1020 /* wait for the interrupts to happen */
1021 do {
1022 msleep(sc, sc->lock, PWAIT, "ixpslp", max(hz / 10, 1));
1023 if (sc->codec_not_ready_bits != 0)
1024 break;
1025 } while (--timeout);
1026 }
1027
1028 sc->polling = polling;
1029 atiixp_disable_interrupts(sc);
1030
1031 if (sc->codec_not_ready_bits == 0 && timeout == 0) {
1032 device_printf(sc->dev,
1033 "WARNING: timeout during codec detection; "
1034 "codecs might be present but haven't interrupted\n");
1035 atiixp_unlock(sc);
1036 goto postinitbad;
1037 }
1038
1039 found = 0;
1040
1041 /*
1042 * ATI IXP can have upto 3 codecs, but single codec should be
1043 * suffice for now.
1044 */
1045 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) {
1046 /* codec 0 present */
1047 sc->codec_found++;
1048 sc->codec_idx = 0;
1049 found++;
1050 }
1051
1052 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) {
1053 /* codec 1 present */
1054 sc->codec_found++;
1055 }
1056
1057 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) {
1058 /* codec 2 present */
1059 sc->codec_found++;
1060 }
1061
1062 atiixp_unlock(sc);
1063
1064 if (found == 0)
1065 goto postinitbad;
1066
1067 /* create/init mixer */
1068 sc->codec = AC97_CREATE(sc->dev, sc, atiixp_ac97);
1069 if (sc->codec == NULL)
1070 goto postinitbad;
1071
1072 subdev = (pci_get_subdevice(sc->dev) << 16) |
1073 pci_get_subvendor(sc->dev);
1074 switch (subdev) {
1075 case 0x11831043: /* ASUS A6R */
1076 case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */
1077 ac97_setflags(sc->codec, ac97_getflags(sc->codec) |
1078 AC97_F_EAPD_INV);
1079 break;
1080 default:
1081 break;
1082 }
1083
1084 mixer_init(sc->dev, ac97_getmixerclass(), sc->codec);
1085
1086 pcm_init(sc->dev, sc);
1087
1088 for (i = 0; i < ATI_IXP_NPCHAN; i++)
1089 pcm_addchan(sc->dev, PCMDIR_PLAY, &atiixp_chan_class, sc);
1090 for (i = 0; i < ATI_IXP_NRCHAN; i++)
1091 pcm_addchan(sc->dev, PCMDIR_REC, &atiixp_chan_class, sc);
1092
1093 SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
1094 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
1095 "polling", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc->dev,
1096 sizeof(sc->dev), sysctl_atiixp_polling, "I", "Enable polling mode");
1097
1098 snprintf(status, SND_STATUSLEN, "mem 0x%jx irq %jd on %s",
1099 rman_get_start(sc->reg), rman_get_start(sc->irq),
1100 device_get_nameunit(device_get_parent(sc->dev)));
1101
1102 if (pcm_register(sc->dev, status))
1103 goto postinitbad;
1104
1105 atiixp_lock(sc);
1106 if (sc->polling == 0)
1107 atiixp_enable_interrupts(sc);
1108 atiixp_unlock(sc);
1109
1110 return;
1111
1112 postinitbad:
1113 atiixp_release_resource(sc);
1114 }
1115
1116 static void
atiixp_release_resource(struct atiixp_info * sc)1117 atiixp_release_resource(struct atiixp_info *sc)
1118 {
1119 if (sc == NULL)
1120 return;
1121 if (sc->registered_channels != 0) {
1122 atiixp_lock(sc);
1123 sc->polling = 0;
1124 callout_stop(&sc->poll_timer);
1125 atiixp_unlock(sc);
1126 callout_drain(&sc->poll_timer);
1127 }
1128 if (sc->codec) {
1129 ac97_destroy(sc->codec);
1130 sc->codec = NULL;
1131 }
1132 if (sc->ih) {
1133 bus_teardown_intr(sc->dev, sc->irq, sc->ih);
1134 sc->ih = NULL;
1135 }
1136 if (sc->reg) {
1137 bus_release_resource(sc->dev, sc->regtype, sc->regid, sc->reg);
1138 sc->reg = NULL;
1139 }
1140 if (sc->irq) {
1141 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irqid, sc->irq);
1142 sc->irq = NULL;
1143 }
1144 if (sc->parent_dmat) {
1145 bus_dma_tag_destroy(sc->parent_dmat);
1146 sc->parent_dmat = NULL;
1147 }
1148 if (sc->sgd_addr) {
1149 bus_dmamap_unload(sc->sgd_dmat, sc->sgd_dmamap);
1150 sc->sgd_addr = 0;
1151 }
1152 if (sc->sgd_table) {
1153 bus_dmamem_free(sc->sgd_dmat, sc->sgd_table, sc->sgd_dmamap);
1154 sc->sgd_table = NULL;
1155 }
1156 if (sc->sgd_dmat) {
1157 bus_dma_tag_destroy(sc->sgd_dmat);
1158 sc->sgd_dmat = NULL;
1159 }
1160 if (sc->lock) {
1161 snd_mtxfree(sc->lock);
1162 sc->lock = NULL;
1163 }
1164 free(sc, M_DEVBUF);
1165 }
1166
1167 static int
atiixp_pci_probe(device_t dev)1168 atiixp_pci_probe(device_t dev)
1169 {
1170 size_t i;
1171 uint16_t devid, vendor;
1172
1173 vendor = pci_get_vendor(dev);
1174 devid = pci_get_device(dev);
1175 for (i = 0; i < nitems(atiixp_hw); i++) {
1176 if (vendor == atiixp_hw[i].vendor &&
1177 devid == atiixp_hw[i].devid) {
1178 device_set_desc(dev, atiixp_hw[i].desc);
1179 return (BUS_PROBE_DEFAULT);
1180 }
1181 }
1182
1183 return (ENXIO);
1184 }
1185
1186 static int
atiixp_pci_attach(device_t dev)1187 atiixp_pci_attach(device_t dev)
1188 {
1189 struct atiixp_info *sc;
1190 int i;
1191
1192 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
1193 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_atiixp softc");
1194 sc->dev = dev;
1195
1196 callout_init(&sc->poll_timer, 1);
1197 sc->poll_ticks = 1;
1198
1199 if (resource_int_value(device_get_name(sc->dev),
1200 device_get_unit(sc->dev), "polling", &i) == 0 && i != 0)
1201 sc->polling = 1;
1202 else
1203 sc->polling = 0;
1204
1205 pci_enable_busmaster(dev);
1206
1207 sc->regid = PCIR_BAR(0);
1208 sc->regtype = SYS_RES_MEMORY;
1209 sc->reg = bus_alloc_resource_any(dev, sc->regtype,
1210 &sc->regid, RF_ACTIVE);
1211
1212 if (!sc->reg) {
1213 device_printf(dev, "unable to allocate register space\n");
1214 goto bad;
1215 }
1216
1217 sc->st = rman_get_bustag(sc->reg);
1218 sc->sh = rman_get_bushandle(sc->reg);
1219
1220 sc->bufsz = pcm_getbuffersize(dev, ATI_IXP_BUFSZ_MIN,
1221 ATI_IXP_BUFSZ_DEFAULT, ATI_IXP_BUFSZ_MAX);
1222
1223 sc->irqid = 0;
1224 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
1225 RF_ACTIVE | RF_SHAREABLE);
1226 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE,
1227 atiixp_intr, sc, &sc->ih)) {
1228 device_printf(dev, "unable to map interrupt\n");
1229 goto bad;
1230 }
1231
1232 /*
1233 * Let the user choose the best DMA segments.
1234 */
1235 if (resource_int_value(device_get_name(dev),
1236 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1237 i &= ATI_IXP_BLK_ALIGN;
1238 if (i < ATI_IXP_BLK_MIN)
1239 i = ATI_IXP_BLK_MIN;
1240 sc->blkcnt = sc->bufsz / i;
1241 i = 0;
1242 while (sc->blkcnt >> i)
1243 i++;
1244 sc->blkcnt = 1 << (i - 1);
1245 if (sc->blkcnt < ATI_IXP_DMA_CHSEGS_MIN)
1246 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MIN;
1247 else if (sc->blkcnt > ATI_IXP_DMA_CHSEGS_MAX)
1248 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MAX;
1249
1250 } else
1251 sc->blkcnt = ATI_IXP_DMA_CHSEGS;
1252
1253 /*
1254 * DMA tag for scatter-gather buffers and link pointers
1255 */
1256 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
1257 /*boundary*/0,
1258 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1259 /*highaddr*/BUS_SPACE_MAXADDR,
1260 /*filter*/NULL, /*filterarg*/NULL,
1261 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1262 /*flags*/0, /*lockfunc*/NULL,
1263 /*lockarg*/NULL, &sc->parent_dmat) != 0) {
1264 device_printf(dev, "unable to create dma tag\n");
1265 goto bad;
1266 }
1267
1268 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
1269 /*boundary*/0,
1270 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1271 /*highaddr*/BUS_SPACE_MAXADDR,
1272 /*filter*/NULL, /*filterarg*/NULL,
1273 /*maxsize*/ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS *
1274 sizeof(struct atiixp_dma_op),
1275 /*nsegments*/1, /*maxsegz*/0x3ffff,
1276 /*flags*/0, /*lockfunc*/NULL,
1277 /*lockarg*/NULL, &sc->sgd_dmat) != 0) {
1278 device_printf(dev, "unable to create dma tag\n");
1279 goto bad;
1280 }
1281
1282 if (bus_dmamem_alloc(sc->sgd_dmat, (void **)&sc->sgd_table,
1283 BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1)
1284 goto bad;
1285
1286 if (bus_dmamap_load(sc->sgd_dmat, sc->sgd_dmamap, sc->sgd_table,
1287 ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS *
1288 sizeof(struct atiixp_dma_op), atiixp_dma_cb, sc, 0))
1289 goto bad;
1290
1291 atiixp_chip_pre_init(sc);
1292
1293 sc->delayed_attach.ich_func = atiixp_chip_post_init;
1294 sc->delayed_attach.ich_arg = sc;
1295 if (cold == 0 ||
1296 config_intrhook_establish(&sc->delayed_attach) != 0) {
1297 sc->delayed_attach.ich_func = NULL;
1298 atiixp_chip_post_init(sc);
1299 }
1300
1301 return (0);
1302
1303 bad:
1304 atiixp_release_resource(sc);
1305 return (ENXIO);
1306 }
1307
1308 static int
atiixp_pci_detach(device_t dev)1309 atiixp_pci_detach(device_t dev)
1310 {
1311 int r;
1312 struct atiixp_info *sc;
1313
1314 sc = pcm_getdevinfo(dev);
1315 if (sc != NULL) {
1316 if (sc->codec != NULL) {
1317 r = pcm_unregister(dev);
1318 if (r)
1319 return (r);
1320 }
1321 sc->codec = NULL;
1322 if (sc->st != 0 && sc->sh != 0)
1323 atiixp_disable_interrupts(sc);
1324 atiixp_release_resource(sc);
1325 }
1326 return (0);
1327 }
1328
1329 static int
atiixp_pci_suspend(device_t dev)1330 atiixp_pci_suspend(device_t dev)
1331 {
1332 struct atiixp_info *sc = pcm_getdevinfo(dev);
1333
1334 /* quickly disable interrupts and save channels active state */
1335 atiixp_lock(sc);
1336 atiixp_disable_interrupts(sc);
1337 atiixp_unlock(sc);
1338
1339 /* stop everything */
1340 if (sc->pch.flags & ATI_IXP_CHN_RUNNING) {
1341 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_STOP);
1342 sc->pch.flags |= ATI_IXP_CHN_SUSPEND;
1343 }
1344 if (sc->rch.flags & ATI_IXP_CHN_RUNNING) {
1345 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_STOP);
1346 sc->rch.flags |= ATI_IXP_CHN_SUSPEND;
1347 }
1348
1349 /* power down aclink and pci bus */
1350 atiixp_lock(sc);
1351 atiixp_wr(sc, ATI_REG_CMD, ATI_REG_CMD_POWERDOWN);
1352 atiixp_unlock(sc);
1353
1354 return (0);
1355 }
1356
1357 static int
atiixp_pci_resume(device_t dev)1358 atiixp_pci_resume(device_t dev)
1359 {
1360 struct atiixp_info *sc = pcm_getdevinfo(dev);
1361
1362 atiixp_lock(sc);
1363 /* reset / power up aclink */
1364 atiixp_reset_aclink(sc);
1365 atiixp_unlock(sc);
1366
1367 if (mixer_reinit(dev) == -1) {
1368 device_printf(dev, "unable to reinitialize the mixer\n");
1369 return (ENXIO);
1370 }
1371
1372 /*
1373 * Resume channel activities. Reset channel format regardless
1374 * of its previous state.
1375 */
1376 if (sc->pch.channel != NULL) {
1377 if (sc->pch.fmt != 0)
1378 atiixp_chan_setformat(NULL, &sc->pch, sc->pch.fmt);
1379 if (sc->pch.flags & ATI_IXP_CHN_SUSPEND) {
1380 sc->pch.flags &= ~ATI_IXP_CHN_SUSPEND;
1381 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_START);
1382 }
1383 }
1384 if (sc->rch.channel != NULL) {
1385 if (sc->rch.fmt != 0)
1386 atiixp_chan_setformat(NULL, &sc->rch, sc->rch.fmt);
1387 if (sc->rch.flags & ATI_IXP_CHN_SUSPEND) {
1388 sc->rch.flags &= ~ATI_IXP_CHN_SUSPEND;
1389 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_START);
1390 }
1391 }
1392
1393 /* enable interrupts */
1394 atiixp_lock(sc);
1395 if (sc->polling == 0)
1396 atiixp_enable_interrupts(sc);
1397 atiixp_unlock(sc);
1398
1399 return (0);
1400 }
1401
1402 static device_method_t atiixp_methods[] = {
1403 DEVMETHOD(device_probe, atiixp_pci_probe),
1404 DEVMETHOD(device_attach, atiixp_pci_attach),
1405 DEVMETHOD(device_detach, atiixp_pci_detach),
1406 DEVMETHOD(device_suspend, atiixp_pci_suspend),
1407 DEVMETHOD(device_resume, atiixp_pci_resume),
1408 { 0, 0 }
1409 };
1410
1411 static driver_t atiixp_driver = {
1412 "pcm",
1413 atiixp_methods,
1414 PCM_SOFTC_SIZE,
1415 };
1416
1417 DRIVER_MODULE(snd_atiixp, pci, atiixp_driver, 0, 0);
1418 MODULE_DEPEND(snd_atiixp, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1419 MODULE_VERSION(snd_atiixp, 1);
1420