1d70424edSNicolas Souchu /*- 2d70424edSNicolas Souchu * Copyright (c) 1998 Nicolas Souchu 3d70424edSNicolas Souchu * All rights reserved. 4d70424edSNicolas Souchu * 5d70424edSNicolas Souchu * Redistribution and use in source and binary forms, with or without 6d70424edSNicolas Souchu * modification, are permitted provided that the following conditions 7d70424edSNicolas Souchu * are met: 8d70424edSNicolas Souchu * 1. Redistributions of source code must retain the above copyright 9d70424edSNicolas Souchu * notice, this list of conditions and the following disclaimer. 10d70424edSNicolas Souchu * 2. Redistributions in binary form must reproduce the above copyright 11d70424edSNicolas Souchu * notice, this list of conditions and the following disclaimer in the 12d70424edSNicolas Souchu * documentation and/or other materials provided with the distribution. 13d70424edSNicolas Souchu * 14d70424edSNicolas Souchu * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15d70424edSNicolas Souchu * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16d70424edSNicolas Souchu * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17d70424edSNicolas Souchu * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18d70424edSNicolas Souchu * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19d70424edSNicolas Souchu * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20d70424edSNicolas Souchu * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21d70424edSNicolas Souchu * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22d70424edSNicolas Souchu * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23d70424edSNicolas Souchu * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24d70424edSNicolas Souchu * SUCH DAMAGE. 25d70424edSNicolas Souchu * 26c3aac50fSPeter Wemm * $FreeBSD$ 27d70424edSNicolas Souchu */ 28d70424edSNicolas Souchu #ifndef __SMBONF_H 29d70424edSNicolas Souchu #define __SMBONF_H 30d70424edSNicolas Souchu 31d70424edSNicolas Souchu #include <sys/queue.h> 32d70424edSNicolas Souchu 33d7bcbf63SMatthew Dillon #define SMBPRI (PZERO+8) /* XXX sleep/wakeup queue priority */ 34d70424edSNicolas Souchu 35d70424edSNicolas Souchu #define n(flags) (~(flags) & (flags)) 36d70424edSNicolas Souchu 37d70424edSNicolas Souchu /* 38d70424edSNicolas Souchu * How tsleep() is called in smb_request_bus(). 39d70424edSNicolas Souchu */ 40d70424edSNicolas Souchu #define SMB_DONTWAIT 0 41d70424edSNicolas Souchu #define SMB_NOINTR 0 42d70424edSNicolas Souchu #define SMB_WAIT 0x1 43d70424edSNicolas Souchu #define SMB_INTR 0x2 44d70424edSNicolas Souchu 45d70424edSNicolas Souchu /* 463ab1f056SNicolas Souchu * callback index 473ab1f056SNicolas Souchu */ 483ab1f056SNicolas Souchu #define SMB_REQUEST_BUS 0x1 493ab1f056SNicolas Souchu #define SMB_RELEASE_BUS 0x2 503ab1f056SNicolas Souchu 513ab1f056SNicolas Souchu /* 52d70424edSNicolas Souchu * SMB bus errors 53d70424edSNicolas Souchu */ 54d70424edSNicolas Souchu #define SMB_ENOERR 0x0 55d70424edSNicolas Souchu #define SMB_EBUSERR 0x1 563ab1f056SNicolas Souchu #define SMB_ENOTSUPP 0x2 57ba81c311SNicolas Souchu #define SMB_ENOACK 0x4 58ba81c311SNicolas Souchu #define SMB_ECOLLI 0x8 59ba81c311SNicolas Souchu #define SMB_EABORT 0x10 60ba81c311SNicolas Souchu #define SMB_ETIMEOUT 0x20 61ba81c311SNicolas Souchu #define SMB_EBUSY 0x40 62d70424edSNicolas Souchu 63d70424edSNicolas Souchu /* 64d70424edSNicolas Souchu * How Quick command is executed 65d70424edSNicolas Souchu */ 66d70424edSNicolas Souchu #define SMB_QWRITE 0x0 67d70424edSNicolas Souchu #define SMB_QREAD 0x1 68d70424edSNicolas Souchu 69d70424edSNicolas Souchu /* 70d70424edSNicolas Souchu * ivars codes 71d70424edSNicolas Souchu */ 72d70424edSNicolas Souchu #define SMBUS_IVAR_ADDR 0x1 /* I2C address of the device */ 73d70424edSNicolas Souchu 74d70424edSNicolas Souchu extern int smbus_request_bus(device_t, device_t, int); 75d70424edSNicolas Souchu extern int smbus_release_bus(device_t, device_t); 76d70424edSNicolas Souchu extern device_t smbus_alloc_bus(device_t); 774012f363SNicolas Souchu extern int smbus_error(int error); 78d70424edSNicolas Souchu 79d70424edSNicolas Souchu extern void smbus_intr(device_t, u_char, char low, char high, int error); 80d70424edSNicolas Souchu 81d70424edSNicolas Souchu extern u_char smbus_get_addr(device_t); 82d70424edSNicolas Souchu 83d70424edSNicolas Souchu #define smbus_quick(bus,slave,how) \ 84d70424edSNicolas Souchu (SMBUS_QUICK(device_get_parent(bus), slave, how)) 85d70424edSNicolas Souchu #define smbus_sendb(bus,slave,byte) \ 86d70424edSNicolas Souchu (SMBUS_SENDB(device_get_parent(bus), slave, byte)) 87d70424edSNicolas Souchu #define smbus_recvb(bus,slave,byte) \ 88d70424edSNicolas Souchu (SMBUS_RECVB(device_get_parent(bus), slave, byte)) 89d70424edSNicolas Souchu #define smbus_writeb(bus,slave,cmd,byte) \ 90d70424edSNicolas Souchu (SMBUS_WRITEB(device_get_parent(bus), slave, cmd, byte)) 91d70424edSNicolas Souchu #define smbus_writew(bus,slave,cmd,word) \ 92d70424edSNicolas Souchu (SMBUS_WRITEW(device_get_parent(bus), slave, cmd, word)) 93d70424edSNicolas Souchu #define smbus_readb(bus,slave,cmd,byte) \ 94d70424edSNicolas Souchu (SMBUS_READB(device_get_parent(bus), slave, cmd, byte)) 95d70424edSNicolas Souchu #define smbus_readw(bus,slave,cmd,word) \ 96d70424edSNicolas Souchu (SMBUS_READW(device_get_parent(bus), slave, cmd, word)) 97d70424edSNicolas Souchu #define smbus_pcall(bus,slave,cmd,sdata,rdata) \ 98d70424edSNicolas Souchu (SMBUS_PCALL(device_get_parent(bus), slave, cmd, sdata, rdata)) 99d70424edSNicolas Souchu #define smbus_bwrite(bus,slave,cmd,count,buf) \ 100d70424edSNicolas Souchu (SMBUS_BWRITE(device_get_parent(bus), slave, cmd, count, buf)) 101d70424edSNicolas Souchu #define smbus_bread(bus,slave,cmd,count,buf) \ 102d70424edSNicolas Souchu (SMBUS_BREAD(device_get_parent(bus), slave, cmd, count, buf)) 103d70424edSNicolas Souchu 104c17d4340SNicolas Souchu #define SMBUS_MODVER 1 105c17d4340SNicolas Souchu #define SMBUS_MINVER 1 106c17d4340SNicolas Souchu #define SMBUS_MAXVER 1 107c17d4340SNicolas Souchu #define SMBUS_PREFVER SMBUS_MODVER 108c17d4340SNicolas Souchu 109d70424edSNicolas Souchu #endif 110