1d70424edSNicolas Souchu /*- 2d70424edSNicolas Souchu * Copyright (c) 1998 Nicolas Souchu 3d70424edSNicolas Souchu * All rights reserved. 4d70424edSNicolas Souchu * 5d70424edSNicolas Souchu * Redistribution and use in source and binary forms, with or without 6d70424edSNicolas Souchu * modification, are permitted provided that the following conditions 7d70424edSNicolas Souchu * are met: 8d70424edSNicolas Souchu * 1. Redistributions of source code must retain the above copyright 9d70424edSNicolas Souchu * notice, this list of conditions and the following disclaimer. 10d70424edSNicolas Souchu * 2. Redistributions in binary form must reproduce the above copyright 11d70424edSNicolas Souchu * notice, this list of conditions and the following disclaimer in the 12d70424edSNicolas Souchu * documentation and/or other materials provided with the distribution. 13d70424edSNicolas Souchu * 14d70424edSNicolas Souchu * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15d70424edSNicolas Souchu * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16d70424edSNicolas Souchu * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17d70424edSNicolas Souchu * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18d70424edSNicolas Souchu * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19d70424edSNicolas Souchu * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20d70424edSNicolas Souchu * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21d70424edSNicolas Souchu * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22d70424edSNicolas Souchu * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23d70424edSNicolas Souchu * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24d70424edSNicolas Souchu * SUCH DAMAGE. 25d70424edSNicolas Souchu * 26c3aac50fSPeter Wemm * $FreeBSD$ 27d70424edSNicolas Souchu */ 28d70424edSNicolas Souchu #ifndef __SMBONF_H 29d70424edSNicolas Souchu #define __SMBONF_H 30d70424edSNicolas Souchu 31d70424edSNicolas Souchu #include <sys/queue.h> 32d70424edSNicolas Souchu 33d7bcbf63SMatthew Dillon #define SMBPRI (PZERO+8) /* XXX sleep/wakeup queue priority */ 34d70424edSNicolas Souchu 35d70424edSNicolas Souchu #define n(flags) (~(flags) & (flags)) 36d70424edSNicolas Souchu 37d70424edSNicolas Souchu /* 38d70424edSNicolas Souchu * How tsleep() is called in smb_request_bus(). 39d70424edSNicolas Souchu */ 40d70424edSNicolas Souchu #define SMB_DONTWAIT 0 41d70424edSNicolas Souchu #define SMB_NOINTR 0 42d70424edSNicolas Souchu #define SMB_WAIT 0x1 43d70424edSNicolas Souchu #define SMB_INTR 0x2 44d70424edSNicolas Souchu 45d70424edSNicolas Souchu /* 463ab1f056SNicolas Souchu * callback index 473ab1f056SNicolas Souchu */ 483ab1f056SNicolas Souchu #define SMB_REQUEST_BUS 0x1 493ab1f056SNicolas Souchu #define SMB_RELEASE_BUS 0x2 503ab1f056SNicolas Souchu 513ab1f056SNicolas Souchu /* 52d70424edSNicolas Souchu * SMB bus errors 53d70424edSNicolas Souchu */ 54d70424edSNicolas Souchu #define SMB_ENOERR 0x0 55d70424edSNicolas Souchu #define SMB_EBUSERR 0x1 563ab1f056SNicolas Souchu #define SMB_ENOTSUPP 0x2 57ba81c311SNicolas Souchu #define SMB_ENOACK 0x4 58ba81c311SNicolas Souchu #define SMB_ECOLLI 0x8 59ba81c311SNicolas Souchu #define SMB_EABORT 0x10 60ba81c311SNicolas Souchu #define SMB_ETIMEOUT 0x20 61ba81c311SNicolas Souchu #define SMB_EBUSY 0x40 627048a99cSJohn Baldwin #define SMB_EINVAL 0x100 63d70424edSNicolas Souchu 64d70424edSNicolas Souchu /* 65d70424edSNicolas Souchu * How Quick command is executed 66d70424edSNicolas Souchu */ 67d70424edSNicolas Souchu #define SMB_QWRITE 0x0 68d70424edSNicolas Souchu #define SMB_QREAD 0x1 69d70424edSNicolas Souchu 70d70424edSNicolas Souchu /* 71*202379afSMichael Gmelin * smbus transction op with pass-thru capabilities 72*202379afSMichael Gmelin * 73*202379afSMichael Gmelin * This smbus function is capable of doing a smbus command transaction 74*202379afSMichael Gmelin * (read or write), and can be flagged to not issue the 'cmd' and/or 75*202379afSMichael Gmelin * issue or expect a count field as well as flagged for chaining (no STOP), 76*202379afSMichael Gmelin * which gives it an i2c pass-through capability. 77*202379afSMichael Gmelin * 78*202379afSMichael Gmelin * NOSTOP- Caller chaining transactions, do not issue STOP 79*202379afSMichael Gmelin * NOCMD- Do not transmit the command field 80*202379afSMichael Gmelin * NOCNT- Do not transmit (wr) or expect (rd) the count field 81*202379afSMichael Gmelin */ 82*202379afSMichael Gmelin #define SMB_TRANS_NOSTOP 0x0001 /* do not send STOP at end */ 83*202379afSMichael Gmelin #define SMB_TRANS_NOCMD 0x0002 /* ignore cmd field (do not tx) */ 84*202379afSMichael Gmelin #define SMB_TRANS_NOCNT 0x0004 /* do not tx or rx count field */ 85*202379afSMichael Gmelin #define SMB_TRANS_7BIT 0x0008 /* change address mode to 7-bit */ 86*202379afSMichael Gmelin #define SMB_TRANS_10BIT 0x0010 /* change address mode to 10-bit */ 87*202379afSMichael Gmelin #define SMB_TRANS_NOREPORT 0x0020 /* do not report errors */ 88*202379afSMichael Gmelin 89*202379afSMichael Gmelin /* 90d70424edSNicolas Souchu * ivars codes 91d70424edSNicolas Souchu */ 92*202379afSMichael Gmelin enum smbus_ivars { 93*202379afSMichael Gmelin SMBUS_IVAR_ADDR, /* slave address of the device */ 94*202379afSMichael Gmelin }; 95d70424edSNicolas Souchu 967048a99cSJohn Baldwin int smbus_request_bus(device_t, device_t, int); 977048a99cSJohn Baldwin int smbus_release_bus(device_t, device_t); 987048a99cSJohn Baldwin device_t smbus_alloc_bus(device_t); 997048a99cSJohn Baldwin int smbus_error(int error); 100d70424edSNicolas Souchu 1017048a99cSJohn Baldwin void smbus_intr(device_t, u_char, char low, char high, int error); 102d70424edSNicolas Souchu 103*202379afSMichael Gmelin #define SMBUS_ACCESSOR(var, ivar, type) \ 104*202379afSMichael Gmelin __BUS_ACCESSOR(smbus, var, SMBUS, ivar, type) 105*202379afSMichael Gmelin 106*202379afSMichael Gmelin SMBUS_ACCESSOR(addr, ADDR, int) 107*202379afSMichael Gmelin 108*202379afSMichael Gmelin #undef SMBUS_ACCESSOR 1097048a99cSJohn Baldwin 1107048a99cSJohn Baldwin extern driver_t smbus_driver; 1117048a99cSJohn Baldwin extern devclass_t smbus_devclass; 112d70424edSNicolas Souchu 113d70424edSNicolas Souchu #define smbus_quick(bus,slave,how) \ 114d70424edSNicolas Souchu (SMBUS_QUICK(device_get_parent(bus), slave, how)) 115d70424edSNicolas Souchu #define smbus_sendb(bus,slave,byte) \ 116d70424edSNicolas Souchu (SMBUS_SENDB(device_get_parent(bus), slave, byte)) 117d70424edSNicolas Souchu #define smbus_recvb(bus,slave,byte) \ 118d70424edSNicolas Souchu (SMBUS_RECVB(device_get_parent(bus), slave, byte)) 119d70424edSNicolas Souchu #define smbus_writeb(bus,slave,cmd,byte) \ 120d70424edSNicolas Souchu (SMBUS_WRITEB(device_get_parent(bus), slave, cmd, byte)) 121d70424edSNicolas Souchu #define smbus_writew(bus,slave,cmd,word) \ 122d70424edSNicolas Souchu (SMBUS_WRITEW(device_get_parent(bus), slave, cmd, word)) 123d70424edSNicolas Souchu #define smbus_readb(bus,slave,cmd,byte) \ 124d70424edSNicolas Souchu (SMBUS_READB(device_get_parent(bus), slave, cmd, byte)) 125d70424edSNicolas Souchu #define smbus_readw(bus,slave,cmd,word) \ 126d70424edSNicolas Souchu (SMBUS_READW(device_get_parent(bus), slave, cmd, word)) 127d70424edSNicolas Souchu #define smbus_pcall(bus,slave,cmd,sdata,rdata) \ 128d70424edSNicolas Souchu (SMBUS_PCALL(device_get_parent(bus), slave, cmd, sdata, rdata)) 129d70424edSNicolas Souchu #define smbus_bwrite(bus,slave,cmd,count,buf) \ 130d70424edSNicolas Souchu (SMBUS_BWRITE(device_get_parent(bus), slave, cmd, count, buf)) 131d70424edSNicolas Souchu #define smbus_bread(bus,slave,cmd,count,buf) \ 132d70424edSNicolas Souchu (SMBUS_BREAD(device_get_parent(bus), slave, cmd, count, buf)) 133*202379afSMichael Gmelin #define smbus_trans(bus,slave,cmd,op,wbuf,wcount,rbuf,rcount,actualp) \ 134*202379afSMichael Gmelin (SMBUS_TRANS(device_get_parent(bus), slave, cmd, op, \ 135*202379afSMichael Gmelin wbuf, wcount, rbuf, rcount, actualp)) 136d70424edSNicolas Souchu 137c17d4340SNicolas Souchu #define SMBUS_MODVER 1 138c17d4340SNicolas Souchu #define SMBUS_MINVER 1 139c17d4340SNicolas Souchu #define SMBUS_MAXVER 1 140c17d4340SNicolas Souchu #define SMBUS_PREFVER SMBUS_MODVER 141c17d4340SNicolas Souchu 142d70424edSNicolas Souchu #endif 143