xref: /freebsd/sys/dev/smbus/smbconf.c (revision 2ad872c5794e4c26fdf6ed219ad3f09ca0d5304a)
1 /*-
2  * Copyright (c) 1998 Nicolas Souchu
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  *	$Id: smbconf.c,v 1.3 1998/11/22 22:01:42 nsouch Exp $
27  *
28  */
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/kernel.h>
32 #include <sys/malloc.h>
33 #include <sys/module.h>
34 #include <sys/bus.h>
35 
36 #include <dev/smbus/smbconf.h>
37 #include <dev/smbus/smbus.h>
38 #include "smbus_if.h"
39 
40 /*
41  * smbus_intr()
42  */
43 void
44 smbus_intr(device_t bus, u_char devaddr, char low, char high, int error)
45 {
46 	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
47 
48 	/* call owner's intr routine */
49 	if (sc->owner)
50 		SMBUS_INTR(sc->owner, devaddr, low, high, error);
51 
52 	return;
53 }
54 
55 /*
56  * smbus_alloc_bus()
57  *
58  * Allocate a new bus connected to the given parent device
59  */
60 device_t
61 smbus_alloc_bus(device_t parent)
62 {
63 	device_t child;
64 
65 	/* add the bus to the parent */
66 	child = device_add_child(parent, "smbus", -1, NULL);
67 
68 	return (child);
69 }
70 
71 static int
72 smbus_poll(struct smbus_softc *sc, int how)
73 {
74 	int error;
75 
76 	switch (how) {
77 	case (SMB_WAIT | SMB_INTR):
78 		error = tsleep(sc, SMBPRI|PCATCH, "smbreq", 0);
79 		break;
80 
81 	case (SMB_WAIT | SMB_NOINTR):
82 		error = tsleep(sc, SMBPRI, "smbreq", 0);
83 		break;
84 
85 	default:
86 		return (EWOULDBLOCK);
87 		break;
88 	}
89 
90 	return (error);
91 }
92 
93 /*
94  * smbus_request_bus()
95  *
96  * Allocate the device to perform transfers.
97  *
98  * how	: SMB_WAIT or SMB_DONTWAIT
99  */
100 int
101 smbus_request_bus(device_t bus, device_t dev, int how)
102 {
103 	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
104 	int s, error = 0;
105 
106 	/* first, ask the underlying layers if the request is ok */
107 	do {
108 		error = SMBUS_CALLBACK(device_get_parent(bus),
109 						SMB_REQUEST_BUS, (caddr_t)&how);
110 		if (error)
111 			error = smbus_poll(sc, how);
112 	} while (error);
113 
114 	while (!error) {
115 		s = splhigh();
116 		if (sc->owner) {
117 			splx(s);
118 
119 			error = smbus_poll(sc, how);
120 		} else {
121 			sc->owner = dev;
122 
123 			splx(s);
124 			return (0);
125 		}
126 	}
127 
128 	return (error);
129 }
130 
131 /*
132  * smbus_release_bus()
133  *
134  * Release the device allocated with smbus_request_dev()
135  */
136 int
137 smbus_release_bus(device_t bus, device_t dev)
138 {
139 	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
140 	int s, error;
141 
142 	/* first, ask the underlying layers if the release is ok */
143 	error = SMBUS_CALLBACK(device_get_parent(bus), SMB_RELEASE_BUS, NULL);
144 
145 	if (error)
146 		return (error);
147 
148 	s = splhigh();
149 	if (sc->owner != dev) {
150 		splx(s);
151 		return (EACCES);
152 	}
153 
154 	sc->owner = 0;
155 	splx(s);
156 
157 	/* wakeup waiting processes */
158 	wakeup(sc);
159 
160 	return (0);
161 }
162 
163 /*
164  * smbus_get_addr()
165  *
166  * Get the I2C 7 bits address of the device
167  */
168 u_char
169 smbus_get_addr(device_t dev)
170 {
171 	uintptr_t addr;
172 	device_t parent = device_get_parent(dev);
173 
174 	BUS_READ_IVAR(parent, dev, SMBUS_IVAR_ADDR, &addr);
175 
176 	return ((u_char)addr);
177 }
178